18f6d5bbbSryan_chen // SPDX-License-Identifier: GPL-2.0
28f6d5bbbSryan_chen /*
38f6d5bbbSryan_chen * Copyright 2017 Google, Inc
48f6d5bbbSryan_chen */
58f6d5bbbSryan_chen
68f6d5bbbSryan_chen #include <common.h>
78f6d5bbbSryan_chen #include <dm.h>
88f6d5bbbSryan_chen #include <misc.h>
98f6d5bbbSryan_chen #include <reset.h>
108f6d5bbbSryan_chen #include <reset-uclass.h>
118f6d5bbbSryan_chen #include <wdt.h>
128f6d5bbbSryan_chen #include <asm/io.h>
133ddf1a0dSryan_chen #include <asm/arch/scu_ast2500.h>
148f6d5bbbSryan_chen
153ddf1a0dSryan_chen struct ast2500_reset_priv {
168f6d5bbbSryan_chen /* WDT used to perform resets. */
178f6d5bbbSryan_chen struct udevice *wdt;
188f6d5bbbSryan_chen struct ast2500_scu *scu;
198f6d5bbbSryan_chen };
208f6d5bbbSryan_chen
ast2500_reset_deassert(struct reset_ctl * reset_ctl)21*f9aa0ee1Sryan_chen static int ast2500_reset_deassert(struct reset_ctl *reset_ctl)
22*f9aa0ee1Sryan_chen {
23*f9aa0ee1Sryan_chen struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
24*f9aa0ee1Sryan_chen struct ast2500_scu *scu = priv->scu;
25*f9aa0ee1Sryan_chen int ret = 0;
26*f9aa0ee1Sryan_chen
27*f9aa0ee1Sryan_chen debug("ast2500_reset_deassert reset_ctl->id %ld \n", reset_ctl->id);
28*f9aa0ee1Sryan_chen
29*f9aa0ee1Sryan_chen if(reset_ctl->id >= 32)
30*f9aa0ee1Sryan_chen clrbits_le32(&scu->sysreset_ctrl2 , BIT(reset_ctl->id - 32));
31*f9aa0ee1Sryan_chen else
32*f9aa0ee1Sryan_chen clrbits_le32(&scu->sysreset_ctrl1 , BIT(reset_ctl->id));
33*f9aa0ee1Sryan_chen
34*f9aa0ee1Sryan_chen return ret;
35*f9aa0ee1Sryan_chen }
36*f9aa0ee1Sryan_chen
ast2500_reset_assert(struct reset_ctl * reset_ctl)3739283ea7Sryan_chen static int ast2500_reset_assert(struct reset_ctl *reset_ctl)
388f6d5bbbSryan_chen {
393ddf1a0dSryan_chen struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
4039283ea7Sryan_chen struct ast2500_scu *scu = priv->scu;
41e96b919cSryan_chen // u32 reset_mode, reset_mask;
4205366f7bSryan_chen // bool reset_sdram;
4339283ea7Sryan_chen int ret = 0;
448f6d5bbbSryan_chen
4505366f7bSryan_chen debug("ast2500_reset_assert reset_ctl->id %ld \n", reset_ctl->id);
468f6d5bbbSryan_chen /*
478f6d5bbbSryan_chen * To reset SDRAM, a specifal flag in SYSRESET register
488f6d5bbbSryan_chen * needs to be enabled first
498f6d5bbbSryan_chen */
50e96b919cSryan_chen #if 0
518f6d5bbbSryan_chen reset_mode = ast_reset_mode_from_flags(reset_ctl->id);
528f6d5bbbSryan_chen reset_mask = ast_reset_mask_from_flags(reset_ctl->id);
538f6d5bbbSryan_chen reset_sdram = reset_mode == WDT_CTRL_RESET_SOC &&
548f6d5bbbSryan_chen (reset_mask & WDT_RESET_SDRAM);
55e96b919cSryan_chen
568f6d5bbbSryan_chen if (reset_sdram) {
578f6d5bbbSryan_chen ast_scu_unlock(priv->scu);
588f6d5bbbSryan_chen setbits_le32(&priv->scu->sysreset_ctrl1,
598f6d5bbbSryan_chen SCU_SYSRESET_SDRAM_WDT);
608f6d5bbbSryan_chen ret = wdt_expire_now(priv->wdt, reset_ctl->id);
618f6d5bbbSryan_chen clrbits_le32(&priv->scu->sysreset_ctrl1,
628f6d5bbbSryan_chen SCU_SYSRESET_SDRAM_WDT);
638f6d5bbbSryan_chen ast_scu_lock(priv->scu);
648f6d5bbbSryan_chen } else {
658f6d5bbbSryan_chen ret = wdt_expire_now(priv->wdt, reset_ctl->id);
668f6d5bbbSryan_chen }
678f6d5bbbSryan_chen #endif
6839283ea7Sryan_chen if(reset_ctl->id >= 32)
69e96b919cSryan_chen setbits_le32(&scu->sysreset_ctrl2 , BIT(reset_ctl->id - 32));
7039283ea7Sryan_chen else
71e96b919cSryan_chen setbits_le32(&scu->sysreset_ctrl1 , BIT(reset_ctl->id));
72e96b919cSryan_chen
73e96b919cSryan_chen return ret;
74e96b919cSryan_chen }
75e96b919cSryan_chen
768f6d5bbbSryan_chen
ast2500_reset_request(struct reset_ctl * reset_ctl)7739283ea7Sryan_chen static int ast2500_reset_request(struct reset_ctl *reset_ctl)
788f6d5bbbSryan_chen {
793ddf1a0dSryan_chen debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
808f6d5bbbSryan_chen reset_ctl->dev, reset_ctl->id);
818f6d5bbbSryan_chen
828f6d5bbbSryan_chen return 0;
838f6d5bbbSryan_chen }
848f6d5bbbSryan_chen
ast2500_reset_probe(struct udevice * dev)8539283ea7Sryan_chen static int ast2500_reset_probe(struct udevice *dev)
868f6d5bbbSryan_chen {
873ddf1a0dSryan_chen struct ast2500_reset_priv *priv = dev_get_priv(dev);
883ddf1a0dSryan_chen struct udevice *clk_dev;
893ddf1a0dSryan_chen int ret = 0;
908f6d5bbbSryan_chen
913ddf1a0dSryan_chen /* find SCU base address from clock device */
923ddf1a0dSryan_chen ret = uclass_get_device_by_driver(UCLASS_CLK, DM_GET_DRIVER(aspeed_scu),
933ddf1a0dSryan_chen &clk_dev);
943ddf1a0dSryan_chen if (ret) {
953ddf1a0dSryan_chen debug("clock device not found\n");
963ddf1a0dSryan_chen return ret;
973ddf1a0dSryan_chen }
983ddf1a0dSryan_chen
993ddf1a0dSryan_chen priv->scu = devfdt_get_addr_ptr(clk_dev);
1003ddf1a0dSryan_chen if (IS_ERR(priv->scu)) {
1013ddf1a0dSryan_chen debug("%s(): can't get SCU\n", __func__);
1023ddf1a0dSryan_chen return PTR_ERR(priv->scu);
1033ddf1a0dSryan_chen }
1043ddf1a0dSryan_chen
1053ddf1a0dSryan_chen return 0;
1063ddf1a0dSryan_chen }
1072fa13dd8Sryan_chen
ast2500_ofdata_to_platdata(struct udevice * dev)1082fa13dd8Sryan_chen static int ast2500_ofdata_to_platdata(struct udevice *dev)
1093ddf1a0dSryan_chen {
1103ddf1a0dSryan_chen struct ast2500_reset_priv *priv = dev_get_priv(dev);
1113ddf1a0dSryan_chen int ret;
1123ddf1a0dSryan_chen
1133ddf1a0dSryan_chen ret = uclass_get_device_by_phandle(UCLASS_WDT, dev, "aspeed,wdt",
1143ddf1a0dSryan_chen &priv->wdt);
1153ddf1a0dSryan_chen if (ret) {
1163ddf1a0dSryan_chen debug("%s: can't find WDT for reset controller", __func__);
1173ddf1a0dSryan_chen return ret;
1183ddf1a0dSryan_chen }
1198f6d5bbbSryan_chen
1208f6d5bbbSryan_chen return 0;
1218f6d5bbbSryan_chen }
1228f6d5bbbSryan_chen
1238f6d5bbbSryan_chen static const struct udevice_id aspeed_reset_ids[] = {
1248f6d5bbbSryan_chen { .compatible = "aspeed,ast2500-reset" },
1258f6d5bbbSryan_chen { }
1268f6d5bbbSryan_chen };
1278f6d5bbbSryan_chen
1288f6d5bbbSryan_chen struct reset_ops aspeed_reset_ops = {
12939283ea7Sryan_chen .rst_assert = ast2500_reset_assert,
130e96b919cSryan_chen .rst_deassert = ast2500_reset_deassert,
13139283ea7Sryan_chen .request = ast2500_reset_request,
1328f6d5bbbSryan_chen };
1338f6d5bbbSryan_chen
1348f6d5bbbSryan_chen U_BOOT_DRIVER(aspeed_reset) = {
1358f6d5bbbSryan_chen .name = "aspeed_reset",
1368f6d5bbbSryan_chen .id = UCLASS_RESET,
1378f6d5bbbSryan_chen .of_match = aspeed_reset_ids,
13839283ea7Sryan_chen .probe = ast2500_reset_probe,
1398f6d5bbbSryan_chen .ops = &aspeed_reset_ops,
1402fa13dd8Sryan_chen .ofdata_to_platdata = ast2500_ofdata_to_platdata,
1413ddf1a0dSryan_chen .priv_auto_alloc_size = sizeof(struct ast2500_reset_priv),
1428f6d5bbbSryan_chen };
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