189c1e2daSStephen Warrenmenu "Reset Controller Support" 289c1e2daSStephen Warren 389c1e2daSStephen Warrenconfig DM_RESET 489c1e2daSStephen Warren bool "Enable reset controllers using Driver Model" 589c1e2daSStephen Warren depends on DM && OF_CONTROL 689c1e2daSStephen Warren help 789c1e2daSStephen Warren Enable support for the reset controller driver class. Many hardware 889c1e2daSStephen Warren modules are equipped with a reset signal, typically driven by some 989c1e2daSStephen Warren reset controller hardware module within the chip. In U-Boot, reset 1089c1e2daSStephen Warren controller drivers allow control over these reset signals. In some 1189c1e2daSStephen Warren cases this API is applicable to chips outside the CPU as well, 1289c1e2daSStephen Warren although driving such reset isgnals using GPIOs may be more 1389c1e2daSStephen Warren appropriate in this case. 1489c1e2daSStephen Warren 154581b717SStephen Warrenconfig SANDBOX_RESET 164581b717SStephen Warren bool "Enable the sandbox reset test driver" 174581b717SStephen Warren depends on DM_MAILBOX && SANDBOX 184581b717SStephen Warren help 194581b717SStephen Warren Enable support for a test reset controller implementation, which 204581b717SStephen Warren simply accepts requests to reset various HW modules without actually 214581b717SStephen Warren doing anything beyond a little error checking. 224581b717SStephen Warren 23584861ffSPatrice Chotardconfig STI_RESET 24584861ffSPatrice Chotard bool "Enable the STi reset" 25584861ffSPatrice Chotard depends on ARCH_STI 26584861ffSPatrice Chotard help 27584861ffSPatrice Chotard Support for reset controllers on STMicroelectronics STiH407 family SoCs. 28584861ffSPatrice Chotard Say Y if you want to control reset signals provided by system config 29584861ffSPatrice Chotard block. 30584861ffSPatrice Chotard 3123a06416SPatrice Chotardconfig STM32_RESET 3223a06416SPatrice Chotard bool "Enable the STM32 reset" 33a7519b33SPatrick Delaunay depends on STM32 || ARCH_STM32MP 3423a06416SPatrice Chotard help 3523a06416SPatrice Chotard Support for reset controllers on STMicroelectronics STM32 family SoCs. 3623a06416SPatrice Chotard This resset driver is compatible with STM32 F4/F7 and H7 SoCs. 3723a06416SPatrice Chotard 38fe60f06dSStephen Warrenconfig TEGRA_CAR_RESET 39fe60f06dSStephen Warren bool "Enable Tegra CAR-based reset driver" 40fe60f06dSStephen Warren depends on TEGRA_CAR 41fe60f06dSStephen Warren help 42fe60f06dSStephen Warren Enable support for manipulating Tegra's on-SoC reset signals via 43fe60f06dSStephen Warren direct register access to the Tegra CAR (Clock And Reset controller). 44fe60f06dSStephen Warren 454dd99d14SStephen Warrenconfig TEGRA186_RESET 464dd99d14SStephen Warren bool "Enable Tegra186 BPMP-based reset driver" 474dd99d14SStephen Warren depends on TEGRA186_BPMP 484dd99d14SStephen Warren help 494dd99d14SStephen Warren Enable support for manipulating Tegra's on-SoC reset signals via IPC 504dd99d14SStephen Warren requests to the BPMP (Boot and Power Management Processor). 514dd99d14SStephen Warren 5265c8a798SAndreas Dannenbergconfig RESET_TI_SCI 5365c8a798SAndreas Dannenberg bool "TI System Control Interface (TI SCI) reset driver" 5465c8a798SAndreas Dannenberg depends on DM_RESET && TI_SCI_PROTOCOL 5565c8a798SAndreas Dannenberg help 5665c8a798SAndreas Dannenberg This enables the reset driver support over TI System Control Interface 5765c8a798SAndreas Dannenberg available on some new TI's SoCs. If you wish to use reset resources 5865c8a798SAndreas Dannenberg managed by the TI System Controller, say Y here. Otherwise, say N. 5965c8a798SAndreas Dannenberg 6018393f70SÁlvaro Fernández Rojasconfig RESET_BCM6345 6118393f70SÁlvaro Fernández Rojas bool "Reset controller driver for BCM6345" 6218393f70SÁlvaro Fernández Rojas depends on DM_RESET && ARCH_BMIPS 6318393f70SÁlvaro Fernández Rojas help 6418393f70SÁlvaro Fernández Rojas Support reset controller on BCM6345. 6518393f70SÁlvaro Fernández Rojas 664fb96c48SMasahiro Yamadaconfig RESET_UNIPHIER 674fb96c48SMasahiro Yamada bool "Reset controller driver for UniPhier SoCs" 684fb96c48SMasahiro Yamada depends on ARCH_UNIPHIER 694fb96c48SMasahiro Yamada default y 704fb96c48SMasahiro Yamada help 714fb96c48SMasahiro Yamada Support for reset controllers on UniPhier SoCs. 724fb96c48SMasahiro Yamada Say Y if you want to control reset signals provided by System Control 734fb96c48SMasahiro Yamada block, Media I/O block, Peripheral Block. 744fb96c48SMasahiro Yamada 75858d4976Smaxims@google.comconfig AST2500_RESET 76858d4976Smaxims@google.com bool "Reset controller driver for AST2500 SoCs" 77858d4976Smaxims@google.com depends on DM_RESET && WDT_ASPEED 78858d4976Smaxims@google.com default y if ASPEED_AST2500 79858d4976Smaxims@google.com help 80858d4976Smaxims@google.com Support for reset controller on AST2500 SoC. This controller uses 81858d4976Smaxims@google.com watchdog to reset different peripherals and thus only supports 82858d4976Smaxims@google.com resets that are supported by watchdog. The main limitation though 83858d4976Smaxims@google.com is that some reset signals, like I2C or MISC reset multiple devices. 84858d4976Smaxims@google.com 85760188c1SElaine Zhangconfig RESET_ROCKCHIP 86760188c1SElaine Zhang bool "Reset controller driver for Rockchip SoCs" 87760188c1SElaine Zhang depends on DM_RESET && ARCH_ROCKCHIP && CLK 88760188c1SElaine Zhang default y 89760188c1SElaine Zhang help 90760188c1SElaine Zhang Support for reset controller on rockchip SoC. The main limitation 91760188c1SElaine Zhang though is that some reset signals, like I2C or MISC reset multiple 92760188c1SElaine Zhang devices. 93760188c1SElaine Zhang 9420367bb5SNeil Armstrongconfig RESET_MESON 9520367bb5SNeil Armstrong bool "Reset controller driver for Amlogic Meson SoCs" 9620367bb5SNeil Armstrong depends on DM_RESET && ARCH_MESON 9720367bb5SNeil Armstrong imply REGMAP 9820367bb5SNeil Armstrong default y 9920367bb5SNeil Armstrong help 10020367bb5SNeil Armstrong Support for reset controller on Amlogic Meson SoC. 10120367bb5SNeil Armstrong 1022ac71882SDinh Nguyenconfig RESET_SOCFPGA 1032ac71882SDinh Nguyen bool "Reset controller driver for SoCFPGA" 1042ac71882SDinh Nguyen depends on DM_RESET && ARCH_SOCFPGA 1052ac71882SDinh Nguyen default y 1062ac71882SDinh Nguyen help 1072ac71882SDinh Nguyen Support for reset controller on SoCFPGA platform. 1082ac71882SDinh Nguyen 1093e066bcaSWeijie Gaoconfig RESET_MEDIATEK 1103e066bcaSWeijie Gao bool "Reset controller driver for MediaTek SoCs" 1113e066bcaSWeijie Gao depends on DM_RESET && ARCH_MEDIATEK && CLK 1123e066bcaSWeijie Gao default y 1133e066bcaSWeijie Gao help 1143e066bcaSWeijie Gao Support for reset controller on MediaTek SoCs. 1153e066bcaSWeijie Gao 116*99ba4308SJagan Tekiconfig RESET_SUNXI 117*99ba4308SJagan Teki bool "RESET support for Allwinner SoCs" 118*99ba4308SJagan Teki depends on DM_RESET && ARCH_SUNXI 119*99ba4308SJagan Teki default y 120*99ba4308SJagan Teki help 121*99ba4308SJagan Teki This enables support for common reset driver for 122*99ba4308SJagan Teki Allwinner SoCs. 123*99ba4308SJagan Teki 12489c1e2daSStephen Warrenendmenu 125