xref: /openbmc/u-boot/drivers/ram/stm32mp1/Kconfig (revision cd71b1d5)
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2config STM32MP1_DDR
3	bool "STM32MP1 DDR driver"
4	depends on DM && OF_CONTROL && ARCH_STM32MP
5	select RAM
6	select SPL_RAM if SPL
7	default y
8	help
9		activate STM32MP1 DDR controller driver for STM32MP1 soc
10		family:	support for LPDDR2, LPDDR3 and DDR3
11		the SDRAM parameters for controleur and phy need to be provided
12		in device tree (computed by DDR tuning tools)
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