xref: /openbmc/u-boot/drivers/ram/aspeed/Kconfig (revision fd8b1ad3)
1if RAM || SPL_RAM
2
3choice
4	prompt "DDR4 target data rate"
5	default ASPEED_DDR4_1600
6
7config ASPEED_DDR4_400
8	bool "DDR4 targets at 400Mbps"
9	depends on DM && OF_CONTROL && ARCH_ASPEED
10	help
11	  select DDR4 target data rate at 400M
12
13config ASPEED_DDR4_800
14	bool "DDR4 targets at 800Mbps"
15	depends on DM && OF_CONTROL && ARCH_ASPEED
16	help
17	  select DDR4 target data rate at 800M
18
19config ASPEED_DDR4_1333
20	bool "DDR4 targets at 1333Mbps"
21	depends on DM && OF_CONTROL && ARCH_ASPEED
22	help
23	  select DDR4 target data rate at 1333M
24
25config ASPEED_DDR4_1600
26	bool "DDR4 targets at 1600Mbps"
27	depends on DM && OF_CONTROL && ARCH_ASPEED
28	help
29	  select DDR4 target data rate at 1600M
30endchoice
31
32config ASPEED_DDR4_DUALX8
33	bool "dual X8 DDR4 die"
34	depends on DM && OF_CONTROL && ARCH_ASPEED
35	default n
36	help
37	  select dual X8 DDR4 die
38
39config ASPEED_PALLADIUM
40	bool "aspeed palladium RAM model"
41	default n
42	help
43	  Say Y here to enable the Aspeed Palladium driver
44
45	  This provides configurations specific for Aspeed Palladium SDRAM
46	  model
47
48config ASPEED_BYPASS_SELFTEST
49	bool "bypass self test during DRAM initialization"
50	default n
51	help
52	  Say Y here to bypass DRAM self test to speed up the boot time
53
54config ASPEED_ECC
55	bool "aspeed SDRAM error correcting code"
56	depends on DM && OF_CONTROL && ARCH_ASPEED
57	default n
58	help
59	  enable SDRAM ECC function
60
61if ASPEED_ECC
62config ASPEED_ECC_SIZE
63	int "ECC size: 0=driver auto-caluated"
64	depends on ASPEED_ECC
65	default 0
66	help
67	  SDRAM size with the error correcting code enabled. The unit is
68	  in Megabytes.  Noted that only the 8/9 of the configured size
69	  can be used by the system.  The remaining 1/9 will be used by
70	  the ECC engine.  If the size is set to 0, the sdram driver will
71	  calculate the SDRAM size and set the whole range be ECC enabled.
72endif
73endif
74