xref: /openbmc/u-boot/drivers/ram/aspeed/Kconfig (revision 26026662)
1if RAM || SPL_RAM
2
3if ASPEED_AST2600
4choice
5	prompt "DDR4 target data rate"
6	default ASPEED_DDR4_1600
7
8config ASPEED_DDR4_400
9	bool "DDR4 targets at 400Mbps"
10	depends on DM && OF_CONTROL && ARCH_ASPEED
11	help
12	  select DDR4 target data rate at 400M
13
14config ASPEED_DDR4_800
15	bool "DDR4 targets at 800Mbps"
16	depends on DM && OF_CONTROL && ARCH_ASPEED
17	help
18	  select DDR4 target data rate at 800M
19
20config ASPEED_DDR4_1333
21	bool "DDR4 targets at 1333Mbps"
22	depends on DM && OF_CONTROL && ARCH_ASPEED
23	help
24	  select DDR4 target data rate at 1333M
25
26config ASPEED_DDR4_1600
27	bool "DDR4 targets at 1600Mbps"
28	depends on DM && OF_CONTROL && ARCH_ASPEED
29	help
30	  select DDR4 target data rate at 1600M
31endchoice
32
33config ASPEED_DDR4_DUALX8
34	bool "dual X8 DDR4 die"
35	depends on DM && OF_CONTROL && ARCH_ASPEED
36	default n
37	help
38	  select dual X8 DDR4 die
39
40config ASPEED_BYPASS_SELFTEST
41	bool "bypass self test during DRAM initialization"
42	default n
43	help
44	  Say Y here to bypass DRAM self test to speed up the boot time
45endif
46
47config ASPEED_ECC
48	bool "aspeed SDRAM error correcting code"
49	depends on DM && OF_CONTROL && ARCH_ASPEED
50	default n
51	help
52	  enable SDRAM ECC function
53
54if ASPEED_ECC
55config ASPEED_ECC_SIZE
56	int "ECC size: 0=driver auto-caluated"
57	depends on ASPEED_ECC
58	default 0
59	help
60	  SDRAM size with the error correcting code enabled. The unit is
61	  in Megabytes.  Noted that only the 8/9 of the configured size
62	  can be used by the system.  The remaining 1/9 will be used by
63	  the ECC engine.  If the size is set to 0, the sdram driver will
64	  calculate the SDRAM size and set the whole range be ECC enabled.
65endif
66
67choice
68	prompt "DDR4 PHY side ODT"
69	default ASPEED_DDR4_PHY_ODT80
70
71config ASPEED_DDR4_PHY_ODT80
72	bool "DDR4 PHY side ODT 80 ohm"
73	depends on DM && OF_CONTROL && ARCH_ASPEED
74	help
75	  select DDR4 PHY side ODT 80 ohm
76
77config ASPEED_DDR4_PHY_ODT60
78	bool "DDR4 PHY side ODT 60 ohm"
79	depends on DM && OF_CONTROL && ARCH_ASPEED
80	help
81	  select DDR4 PHY side ODT 60 ohm
82
83config ASPEED_DDR4_PHY_ODT48
84	bool "DDR4 PHY side ODT 48 ohm"
85	depends on DM && OF_CONTROL && ARCH_ASPEED
86	help
87	  select DDR4 PHY side ODT 48 ohm
88
89config ASPEED_DDR4_PHY_ODT40
90	bool "DDR4 PHY side ODT 40 ohm"
91	depends on DM && OF_CONTROL && ARCH_ASPEED
92	help
93	  select DDR4 PHY side ODT 40 ohm
94endchoice
95
96choice
97	prompt "DDR4 DRAM side ODT"
98	default ASPEED_DDR4_DRAM_ODT48
99
100config ASPEED_DDR4_DRAM_ODT60
101	bool "DDR4 DRAM side ODT 60 ohm"
102	depends on DM && OF_CONTROL && ARCH_ASPEED
103	help
104	  select DDR4 DRAM side ODT 60 ohm
105
106config ASPEED_DDR4_DRAM_ODT48
107	bool "DDR4 DRAM side ODT 48 ohm"
108	depends on DM && OF_CONTROL && ARCH_ASPEED
109	help
110	  select DDR4 DRAM side ODT 48 ohm
111
112config ASPEED_DDR4_DRAM_ODT40
113	bool "DDR4 DRAM side ODT 40 ohm"
114	depends on DM && OF_CONTROL && ARCH_ASPEED
115	help
116	  select DDR4 DRAM side ODT 40 ohm
117endchoice
118
119choice
120	prompt "DDR4 DRAM output driver impedance"
121	default ASPEED_DDR4_DRAM_RON_34
122
123config ASPEED_DDR4_DRAM_RON_34
124	bool "DDR4 DRAM output driver impedance 34 ohm"
125	depends on DM && OF_CONTROL && ARCH_ASPEED
126	help
127	  select DDR4 DRAM output driver impedance 34 ohm
128
129config ASPEED_DDR4_DRAM_RON_48
130	bool "DDR4 DRAM output driver impedance 48 ohm"
131	depends on DM && OF_CONTROL && ARCH_ASPEED
132	help
133	  select DDR4 DRAM output driver impedance 48 ohm
134endchoice
135endif
136