192a5848dSChia-Wei, Wangif RAM || SPL_RAM 292a5848dSChia-Wei, Wang 379088fd5SDylan Hungchoice 479088fd5SDylan Hung prompt "DDR4 target data rate" 579088fd5SDylan Hung default ASPEED_DDR4_1600 679088fd5SDylan Hung 7489b054eSDylan Hungconfig ASPEED_DDR4_400 8489b054eSDylan Hung bool "DDR4 targets at 400Mbps" 9489b054eSDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 10489b054eSDylan Hung help 11489b054eSDylan Hung select DDR4 target data rate at 400M 12489b054eSDylan Hung 1379088fd5SDylan Hungconfig ASPEED_DDR4_800 1479088fd5SDylan Hung bool "DDR4 targets at 800Mbps" 1579088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 1679088fd5SDylan Hung help 1779088fd5SDylan Hung select DDR4 target data rate at 800M 1879088fd5SDylan Hung 1979088fd5SDylan Hungconfig ASPEED_DDR4_1600 2079088fd5SDylan Hung bool "DDR4 targets at 1600Mbps" 2179088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 2279088fd5SDylan Hung help 2379088fd5SDylan Hung select DDR4 target data rate at 1600M 2479088fd5SDylan Hungendchoice 2579088fd5SDylan Hung 2679088fd5SDylan Hungconfig ASPEED_DDR4_DUALX8 2779088fd5SDylan Hung bool "dual X8 DDR4 die" 2879088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 2979088fd5SDylan Hung default n 3079088fd5SDylan Hung help 3179088fd5SDylan Hung select dual X8 DDR4 die 32420e65f8SDylan Hung 33420e65f8SDylan Hungconfig ASPEED_PALLADIUM 34420e65f8SDylan Hung bool "aspeed palladium RAM model" 35857027a2SDylan Hung default n 36420e65f8SDylan Hung help 37420e65f8SDylan Hung Say Y here to enable the Aspeed Palladium driver 38420e65f8SDylan Hung 39420e65f8SDylan Hung This provides configurations specific for Aspeed Palladium SDRAM 40420e65f8SDylan Hung model 41d6f57adbSDylan Hung 42*23156602SDylan Hungconfig ASPEED_BYPASS_SELFTEST 43*23156602SDylan Hung bool "bypass self test during DRAM initialization" 44*23156602SDylan Hung default n 45*23156602SDylan Hung help 46*23156602SDylan Hung Say Y here to bypass DRAM self test to speed up the boot time 47*23156602SDylan Hung 48d6f57adbSDylan Hungconfig ASPEED_ECC 49d6f57adbSDylan Hung bool "aspeed SDRAM error correcting code" 50d6f57adbSDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 51ecb4ad9fSDylan Hung default n 52d6f57adbSDylan Hung help 53d6f57adbSDylan Hung enable SDRAM ECC function 540bef06a6SDylan Hung 55cbb11045SDylan Hungif ASPEED_ECC 56cbb11045SDylan Hungconfig ASPEED_ECC_SIZE 57cbb11045SDylan Hung int "ECC size: 0=driver auto-caluated" 580bef06a6SDylan Hung depends on ASPEED_ECC 59cbb11045SDylan Hung default 0 600bef06a6SDylan Hung help 61cbb11045SDylan Hung SDRAM size with the error correcting code enabled. The unit is 62cbb11045SDylan Hung in Megabytes. Noted that only the 8/9 of the configured size 63cbb11045SDylan Hung can be used by the system. The remaining 1/9 will be used by 64cbb11045SDylan Hung the ECC engine. If the size is set to 0, the sdram driver will 65cbb11045SDylan Hung calculate the SDRAM size and set the whole range be ECC enabled. 66cbb11045SDylan Hungendif 6792a5848dSChia-Wei, Wangendif 68