192a5848dSChia-Wei, Wangif RAM || SPL_RAM 292a5848dSChia-Wei, Wang 3c3d7eb06SDylan Hungif ASPEED_AST2600 479088fd5SDylan Hungchoice 579088fd5SDylan Hung prompt "DDR4 target data rate" 679088fd5SDylan Hung default ASPEED_DDR4_1600 779088fd5SDylan Hung 8489b054eSDylan Hungconfig ASPEED_DDR4_400 9489b054eSDylan Hung bool "DDR4 targets at 400Mbps" 10489b054eSDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 11489b054eSDylan Hung help 12489b054eSDylan Hung select DDR4 target data rate at 400M 13489b054eSDylan Hung 1479088fd5SDylan Hungconfig ASPEED_DDR4_800 1579088fd5SDylan Hung bool "DDR4 targets at 800Mbps" 1679088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 1779088fd5SDylan Hung help 1879088fd5SDylan Hung select DDR4 target data rate at 800M 1979088fd5SDylan Hung 20fd8b1ad3SDylan Hungconfig ASPEED_DDR4_1333 21fd8b1ad3SDylan Hung bool "DDR4 targets at 1333Mbps" 22fd8b1ad3SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 23fd8b1ad3SDylan Hung help 24fd8b1ad3SDylan Hung select DDR4 target data rate at 1333M 25fd8b1ad3SDylan Hung 2679088fd5SDylan Hungconfig ASPEED_DDR4_1600 2779088fd5SDylan Hung bool "DDR4 targets at 1600Mbps" 2879088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 2979088fd5SDylan Hung help 3079088fd5SDylan Hung select DDR4 target data rate at 1600M 3179088fd5SDylan Hungendchoice 3279088fd5SDylan Hung 3379088fd5SDylan Hungconfig ASPEED_DDR4_DUALX8 3479088fd5SDylan Hung bool "dual X8 DDR4 die" 3579088fd5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 3679088fd5SDylan Hung default n 3779088fd5SDylan Hung help 3879088fd5SDylan Hung select dual X8 DDR4 die 39420e65f8SDylan Hung 4023156602SDylan Hungconfig ASPEED_BYPASS_SELFTEST 4123156602SDylan Hung bool "bypass self test during DRAM initialization" 4223156602SDylan Hung default n 4323156602SDylan Hung help 4423156602SDylan Hung Say Y here to bypass DRAM self test to speed up the boot time 45b415f713SDylan Hung 46b415f713SDylan Hungchoice 47b415f713SDylan Hung prompt "DDR4 PHY side ODT" 48323f39fbSDylan Hung default ASPEED_DDR4_PHY_ODT80 49b415f713SDylan Hung 50dd3a6e11SDylan Hungconfig ASPEED_DDR4_PHY_ODT80 51dd3a6e11SDylan Hung bool "DDR4 PHY side ODT 80 ohm" 52dd3a6e11SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 53dd3a6e11SDylan Hung help 54dd3a6e11SDylan Hung select DDR4 PHY side ODT 80 ohm 55dd3a6e11SDylan Hung 56b415f713SDylan Hungconfig ASPEED_DDR4_PHY_ODT60 57b415f713SDylan Hung bool "DDR4 PHY side ODT 60 ohm" 58b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 59b415f713SDylan Hung help 60b415f713SDylan Hung select DDR4 PHY side ODT 60 ohm 61b415f713SDylan Hung 62b415f713SDylan Hungconfig ASPEED_DDR4_PHY_ODT48 63b415f713SDylan Hung bool "DDR4 PHY side ODT 48 ohm" 64b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 65b415f713SDylan Hung help 66b415f713SDylan Hung select DDR4 PHY side ODT 48 ohm 67b415f713SDylan Hung 68b415f713SDylan Hungconfig ASPEED_DDR4_PHY_ODT40 69b415f713SDylan Hung bool "DDR4 PHY side ODT 40 ohm" 70b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 71b415f713SDylan Hung help 72b415f713SDylan Hung select DDR4 PHY side ODT 40 ohm 73b415f713SDylan Hungendchoice 74b415f713SDylan Hung 75b415f713SDylan Hungchoice 76b415f713SDylan Hung prompt "DDR4 DRAM side ODT" 77323f39fbSDylan Hung default ASPEED_DDR4_DRAM_ODT48 78b415f713SDylan Hung 7923bcb5d2SDylan Hungconfig ASPEED_DDR4_DRAM_ODT80 8023bcb5d2SDylan Hung bool "DDR4 DRAM side ODT 80 ohm" 8123bcb5d2SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 8223bcb5d2SDylan Hung help 8323bcb5d2SDylan Hung select DDR4 DRAM side ODT 80 ohm 8423bcb5d2SDylan Hung 85b415f713SDylan Hungconfig ASPEED_DDR4_DRAM_ODT60 86b415f713SDylan Hung bool "DDR4 DRAM side ODT 60 ohm" 87b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 88b415f713SDylan Hung help 89b415f713SDylan Hung select DDR4 DRAM side ODT 60 ohm 90b415f713SDylan Hung 91b415f713SDylan Hungconfig ASPEED_DDR4_DRAM_ODT48 92b415f713SDylan Hung bool "DDR4 DRAM side ODT 48 ohm" 93b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 94b415f713SDylan Hung help 95b415f713SDylan Hung select DDR4 DRAM side ODT 48 ohm 96b415f713SDylan Hung 97b415f713SDylan Hungconfig ASPEED_DDR4_DRAM_ODT40 98b415f713SDylan Hung bool "DDR4 DRAM side ODT 40 ohm" 99b415f713SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 100b415f713SDylan Hung help 101b415f713SDylan Hung select DDR4 DRAM side ODT 40 ohm 102b415f713SDylan Hungendchoice 103cb2cc580SDylan Hung 104cb2cc580SDylan Hungchoice 105cb2cc580SDylan Hung prompt "DDR4 DRAM output driver impedance" 106cb2cc580SDylan Hung default ASPEED_DDR4_DRAM_RON_34 107cb2cc580SDylan Hung 108cb2cc580SDylan Hungconfig ASPEED_DDR4_DRAM_RON_34 109cb2cc580SDylan Hung bool "DDR4 DRAM output driver impedance 34 ohm" 110cb2cc580SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 111cb2cc580SDylan Hung help 112cb2cc580SDylan Hung select DDR4 DRAM output driver impedance 34 ohm 113cb2cc580SDylan Hung 114cb2cc580SDylan Hungconfig ASPEED_DDR4_DRAM_RON_48 115cb2cc580SDylan Hung bool "DDR4 DRAM output driver impedance 48 ohm" 116cb2cc580SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 117cb2cc580SDylan Hung help 118cb2cc580SDylan Hung select DDR4 DRAM output driver impedance 48 ohm 119cb2cc580SDylan Hungendchoice 12016261a32SDylan Hung 12116261a32SDylan Hungconfig ASPEED_DDR4_WR_DATA_EYE_TRAINING_RESULT_OFFSET 12216261a32SDylan Hung hex "DDR PHY write data eye training result offset" 12316261a32SDylan Hung default 0x10 12416261a32SDylan Hung help 12516261a32SDylan Hung The offset value applied to the DDR PHY write data eye training result 12616261a32SDylan Hung to fine-tune the write DQ/DQS alignment. Please don't change it if you 12716261a32SDylan Hung are not sure what is the best value in your system. 12892a5848dSChia-Wei, Wangendif 129*058de9e5SDylan Hung 130*058de9e5SDylan Hungconfig ASPEED_ECC 131*058de9e5SDylan Hung bool "aspeed SDRAM error correcting code" 132*058de9e5SDylan Hung depends on DM && OF_CONTROL && ARCH_ASPEED 133*058de9e5SDylan Hung default n 134*058de9e5SDylan Hung help 135*058de9e5SDylan Hung enable SDRAM ECC function 136*058de9e5SDylan Hung 137*058de9e5SDylan Hungif ASPEED_ECC 138*058de9e5SDylan Hungconfig ASPEED_ECC_SIZE 139*058de9e5SDylan Hung int "ECC size: 0=driver auto-caluated" 140*058de9e5SDylan Hung depends on ASPEED_ECC 141*058de9e5SDylan Hung default 0 142*058de9e5SDylan Hung help 143*058de9e5SDylan Hung SDRAM size with the error correcting code enabled. The unit is 144*058de9e5SDylan Hung in Megabytes. Noted that only the 8/9 of the configured size 145*058de9e5SDylan Hung can be used by the system. The remaining 1/9 will be used by 146*058de9e5SDylan Hung the ECC engine. If the size is set to 0, the sdram driver will 147*058de9e5SDylan Hung calculate the SDRAM size and set the whole range be ECC enabled. 148*058de9e5SDylan Hungendif 149*058de9e5SDylan Hungendif 150