1 /* 2 * Copyright (c) 2009 Wind River Systems, Inc. 3 * Tom Rix <Tom.Rix at windriver.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * twl4030_power_reset_init is derived from code on omapzoom, 8 * git://git.omapzoom.com/repo/u-boot.git 9 * 10 * Copyright (C) 2007-2009 Texas Instruments, Inc. 11 * 12 * twl4030_power_init is from cpu/omap3/common.c, power_init_r 13 * 14 * (C) Copyright 2004-2008 15 * Texas Instruments, <www.ti.com> 16 * 17 * Author : 18 * Sunil Kumar <sunilsaini05 at gmail.com> 19 * Shashi Ranjan <shashiranjanmca05 at gmail.com> 20 * 21 * Derived from Beagle Board and 3430 SDP code by 22 * Richard Woodruff <r-woodruff2 at ti.com> 23 * Syed Mohammed Khasim <khasim at ti.com> 24 */ 25 26 #include <twl4030.h> 27 28 /* 29 * Power Reset 30 */ 31 void twl4030_power_reset_init(void) 32 { 33 u8 val = 0; 34 if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, 35 TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) { 36 printf("Error:TWL4030: failed to read the power register\n"); 37 printf("Could not initialize hardware reset\n"); 38 } else { 39 val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON; 40 if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 41 TWL4030_PM_MASTER_P1_SW_EVENTS, val)) { 42 printf("Error:TWL4030: failed to write the power register\n"); 43 printf("Could not initialize hardware reset\n"); 44 } 45 } 46 } 47 48 /* 49 * Set Device Group and Voltage 50 */ 51 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, 52 u8 dev_grp, u8 dev_grp_sel) 53 { 54 int ret; 55 56 /* Select the Voltage */ 57 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg, 58 vsel_val); 59 if (ret != 0) { 60 printf("Could not write vsel to reg %02x (%d)\n", 61 vsel_reg, ret); 62 return; 63 } 64 65 /* Select the Device Group (enable the supply if dev_grp_sel != 0) */ 66 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp, 67 dev_grp_sel); 68 if (ret != 0) 69 printf("Could not write grp_sel to reg %02x (%d)\n", 70 dev_grp, ret); 71 } 72 73 void twl4030_power_init(void) 74 { 75 /* set VAUX3 to 2.8V */ 76 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED, 77 TWL4030_PM_RECEIVER_VAUX3_VSEL_28, 78 TWL4030_PM_RECEIVER_VAUX3_DEV_GRP, 79 TWL4030_PM_RECEIVER_DEV_GRP_P1); 80 81 /* set VPLL2 to 1.8V */ 82 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED, 83 TWL4030_PM_RECEIVER_VPLL2_VSEL_18, 84 TWL4030_PM_RECEIVER_VPLL2_DEV_GRP, 85 TWL4030_PM_RECEIVER_DEV_GRP_ALL); 86 87 /* set VDAC to 1.8V */ 88 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED, 89 TWL4030_PM_RECEIVER_VDAC_VSEL_18, 90 TWL4030_PM_RECEIVER_VDAC_DEV_GRP, 91 TWL4030_PM_RECEIVER_DEV_GRP_P1); 92 } 93 94 void twl4030_power_mmc_init(int dev_index) 95 { 96 if (dev_index == 0) { 97 /* Set VMMC1 to 3.15 Volts */ 98 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED, 99 TWL4030_PM_RECEIVER_VMMC1_VSEL_32, 100 TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, 101 TWL4030_PM_RECEIVER_DEV_GRP_P1); 102 103 mdelay(100); /* ramp-up delay from Linux code */ 104 } else if (dev_index == 1) { 105 /* Set VMMC2 to 3.15 Volts */ 106 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED, 107 TWL4030_PM_RECEIVER_VMMC2_VSEL_32, 108 TWL4030_PM_RECEIVER_VMMC2_DEV_GRP, 109 TWL4030_PM_RECEIVER_DEV_GRP_P1); 110 111 mdelay(100); /* ramp-up delay from Linux code */ 112 } 113 } 114