1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Copyright (C) 2015 Linaro
4  *  Peter Griffin <peter.griffin@linaro.org>
5  */
6 #include <asm/io.h>
7 #include <common.h>
8 #include <power/pmic.h>
9 #include <power/max8997_muic.h>
10 #include <power/hi6553_pmic.h>
11 #include <errno.h>
12 
13 u8 *pmussi_base;
14 
15 uint8_t hi6553_readb(u32 offset)
16 {
17 	return readb(pmussi_base + (offset << 2));
18 }
19 
20 void hi6553_writeb(u32 offset, uint8_t value)
21 {
22 	writeb(value, pmussi_base + (offset << 2));
23 }
24 
25 int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
26 {
27 	if (check_reg(p, reg))
28 		return -EINVAL;
29 
30 	hi6553_writeb(reg, (uint8_t)val);
31 
32 	return 0;
33 }
34 
35 int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
36 {
37 	if (check_reg(p, reg))
38 		return -EINVAL;
39 
40 	*val = (u32)hi6553_readb(reg);
41 
42 	return 0;
43 }
44 
45 static void hi6553_init(void)
46 {
47 	int data;
48 
49 	hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
50 	hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
51 	data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC |
52 		HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2;
53 	hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
54 
55 	/* configure BUCK0 & BUCK1 */
56 	hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
57 	hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
58 	hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
59 	hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
60 	hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
61 	hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
62 	hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
63 
64 	/* configure BUCK2 */
65 	hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
66 	hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
67 	hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
68 	mdelay(1);
69 	hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
70 	mdelay(1);
71 
72 	/* configure BUCK3 */
73 	hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
74 	hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
75 	hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
76 	hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
77 	mdelay(1);
78 
79 	/* configure BUCK4 */
80 	hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
81 	hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
82 	hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
83 
84 	/* configure LDO20 */
85 	hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
86 
87 	hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
88 	hi6553_writeb(HI6553_CLK_TOP0, 0x06);
89 	hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
90 	hi6553_writeb(HI6553_CLK_TOP4, 0x00);
91 
92 	/* configure LDO7 & LDO10 for SD slot */
93 	data = hi6553_readb(HI6553_LDO7_REG_ADJ);
94 	data = (data & 0xf8) | 0x2;
95 	hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
96 	mdelay(5);
97 	/* enable LDO7 */
98 	hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
99 	mdelay(5);
100 	data = hi6553_readb(HI6553_LDO10_REG_ADJ);
101 	data = (data & 0xf8) | 0x5;
102 	hi6553_writeb(HI6553_LDO10_REG_ADJ, data);
103 	mdelay(5);
104 	/* enable LDO10 */
105 	hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1);
106 	mdelay(5);
107 
108 	/* select 32.764KHz */
109 	hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01);
110 }
111 
112 int power_hi6553_init(u8 *base)
113 {
114 	static const char name[] = "HI6553 PMIC";
115 	struct pmic *p = pmic_alloc();
116 
117 	if (!p) {
118 		printf("%s: POWER allocation error!\n", __func__);
119 		return -ENOMEM;
120 	}
121 
122 	p->name = name;
123 	p->interface = PMIC_NONE;
124 	p->number_of_regs = 44;
125 	pmussi_base = base;
126 
127 	hi6553_init();
128 
129 	puts("HI6553 PMIC init\n");
130 
131 	return 0;
132 }
133