1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2242b2f0cSPeter Griffin /*
3242b2f0cSPeter Griffin  *  Copyright (C) 2015 Linaro
4242b2f0cSPeter Griffin  *  Peter Griffin <peter.griffin@linaro.org>
5242b2f0cSPeter Griffin  */
6242b2f0cSPeter Griffin #include <asm/io.h>
7242b2f0cSPeter Griffin #include <common.h>
8242b2f0cSPeter Griffin #include <power/pmic.h>
9242b2f0cSPeter Griffin #include <power/max8997_muic.h>
10242b2f0cSPeter Griffin #include <power/hi6553_pmic.h>
11242b2f0cSPeter Griffin #include <errno.h>
12242b2f0cSPeter Griffin 
13242b2f0cSPeter Griffin u8 *pmussi_base;
14242b2f0cSPeter Griffin 
hi6553_readb(u32 offset)15242b2f0cSPeter Griffin uint8_t hi6553_readb(u32 offset)
16242b2f0cSPeter Griffin {
17242b2f0cSPeter Griffin 	return readb(pmussi_base + (offset << 2));
18242b2f0cSPeter Griffin }
19242b2f0cSPeter Griffin 
hi6553_writeb(u32 offset,uint8_t value)20242b2f0cSPeter Griffin void hi6553_writeb(u32 offset, uint8_t value)
21242b2f0cSPeter Griffin {
22242b2f0cSPeter Griffin 	writeb(value, pmussi_base + (offset << 2));
23242b2f0cSPeter Griffin }
24242b2f0cSPeter Griffin 
pmic_reg_write(struct pmic * p,u32 reg,u32 val)25242b2f0cSPeter Griffin int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
26242b2f0cSPeter Griffin {
27242b2f0cSPeter Griffin 	if (check_reg(p, reg))
28505cf475SJaehoon Chung 		return -EINVAL;
29242b2f0cSPeter Griffin 
30242b2f0cSPeter Griffin 	hi6553_writeb(reg, (uint8_t)val);
31242b2f0cSPeter Griffin 
32242b2f0cSPeter Griffin 	return 0;
33242b2f0cSPeter Griffin }
34242b2f0cSPeter Griffin 
pmic_reg_read(struct pmic * p,u32 reg,u32 * val)35242b2f0cSPeter Griffin int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
36242b2f0cSPeter Griffin {
37242b2f0cSPeter Griffin 	if (check_reg(p, reg))
38505cf475SJaehoon Chung 		return -EINVAL;
39242b2f0cSPeter Griffin 
40242b2f0cSPeter Griffin 	*val = (u32)hi6553_readb(reg);
41242b2f0cSPeter Griffin 
42242b2f0cSPeter Griffin 	return 0;
43242b2f0cSPeter Griffin }
44242b2f0cSPeter Griffin 
hi6553_init(void)45242b2f0cSPeter Griffin static void hi6553_init(void)
46242b2f0cSPeter Griffin {
47242b2f0cSPeter Griffin 	int data;
48242b2f0cSPeter Griffin 
49242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
50242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
51242b2f0cSPeter Griffin 	data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC |
52242b2f0cSPeter Griffin 		HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2;
53242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
54242b2f0cSPeter Griffin 
55242b2f0cSPeter Griffin 	/* configure BUCK0 & BUCK1 */
56242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
57242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
58242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
59242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
60242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
61242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
62242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
63242b2f0cSPeter Griffin 
64242b2f0cSPeter Griffin 	/* configure BUCK2 */
65242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
66242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
67242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
68242b2f0cSPeter Griffin 	mdelay(1);
69242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
70242b2f0cSPeter Griffin 	mdelay(1);
71242b2f0cSPeter Griffin 
72242b2f0cSPeter Griffin 	/* configure BUCK3 */
73242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
74242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
75242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
76242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
77242b2f0cSPeter Griffin 	mdelay(1);
78242b2f0cSPeter Griffin 
79242b2f0cSPeter Griffin 	/* configure BUCK4 */
80242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
81242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
82242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
83242b2f0cSPeter Griffin 
84242b2f0cSPeter Griffin 	/* configure LDO20 */
85242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
86242b2f0cSPeter Griffin 
87242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
88242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_CLK_TOP0, 0x06);
89242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
90242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_CLK_TOP4, 0x00);
91242b2f0cSPeter Griffin 
92242b2f0cSPeter Griffin 	/* configure LDO7 & LDO10 for SD slot */
93242b2f0cSPeter Griffin 	data = hi6553_readb(HI6553_LDO7_REG_ADJ);
94242b2f0cSPeter Griffin 	data = (data & 0xf8) | 0x2;
95242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
96242b2f0cSPeter Griffin 	mdelay(5);
97242b2f0cSPeter Griffin 	/* enable LDO7 */
98242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
99242b2f0cSPeter Griffin 	mdelay(5);
100242b2f0cSPeter Griffin 	data = hi6553_readb(HI6553_LDO10_REG_ADJ);
101242b2f0cSPeter Griffin 	data = (data & 0xf8) | 0x5;
102242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_LDO10_REG_ADJ, data);
103242b2f0cSPeter Griffin 	mdelay(5);
104242b2f0cSPeter Griffin 	/* enable LDO10 */
105242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1);
106242b2f0cSPeter Griffin 	mdelay(5);
107242b2f0cSPeter Griffin 
108242b2f0cSPeter Griffin 	/* select 32.764KHz */
109242b2f0cSPeter Griffin 	hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01);
110242b2f0cSPeter Griffin }
111242b2f0cSPeter Griffin 
power_hi6553_init(u8 * base)112242b2f0cSPeter Griffin int power_hi6553_init(u8 *base)
113242b2f0cSPeter Griffin {
114242b2f0cSPeter Griffin 	static const char name[] = "HI6553 PMIC";
115242b2f0cSPeter Griffin 	struct pmic *p = pmic_alloc();
116242b2f0cSPeter Griffin 
117242b2f0cSPeter Griffin 	if (!p) {
118242b2f0cSPeter Griffin 		printf("%s: POWER allocation error!\n", __func__);
119242b2f0cSPeter Griffin 		return -ENOMEM;
120242b2f0cSPeter Griffin 	}
121242b2f0cSPeter Griffin 
122242b2f0cSPeter Griffin 	p->name = name;
123242b2f0cSPeter Griffin 	p->interface = PMIC_NONE;
124242b2f0cSPeter Griffin 	p->number_of_regs = 44;
125242b2f0cSPeter Griffin 	pmussi_base = base;
126242b2f0cSPeter Griffin 
127242b2f0cSPeter Griffin 	hi6553_init();
128242b2f0cSPeter Griffin 
129242b2f0cSPeter Griffin 	puts("HI6553 PMIC init\n");
130242b2f0cSPeter Griffin 
131242b2f0cSPeter Griffin 	return 0;
132242b2f0cSPeter Griffin }
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