1 /* 2 * (C) Copyright 2009 Faraday Technology 3 * Po-Yu Chuang <ratbert@faraday-tech.com> 4 * 5 * Copyright (C) 2010 Andes Technology Corporation 6 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 7 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 #include <common.h> 25 #include <asm/io.h> 26 #include <faraday/ftpmu010.h> 27 28 /* OSCC: OSC Control Register */ 29 void ftpmu010_32768osc_enable(void) 30 { 31 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 32 unsigned int oscc; 33 34 /* enable the 32768Hz oscillator */ 35 oscc = readl(&pmu->OSCC); 36 oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI); 37 writel(oscc, &pmu->OSCC); 38 39 /* wait until ready */ 40 while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE)) 41 ; 42 43 /* select 32768Hz oscillator */ 44 oscc = readl(&pmu->OSCC); 45 oscc |= FTPMU010_OSCC_OSCL_RTCLSEL; 46 writel(oscc, &pmu->OSCC); 47 } 48 49 /* MFPSR: Multi-Function Port Setting Register */ 50 void ftpmu010_mfpsr_select_dev(unsigned int dev) 51 { 52 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 53 unsigned int mfpsr; 54 55 mfpsr = readl(&pmu->MFPSR); 56 mfpsr |= dev; 57 writel(mfpsr, &pmu->MFPSR); 58 } 59 60 void ftpmu010_mfpsr_diselect_dev(unsigned int dev) 61 { 62 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 63 unsigned int mfpsr; 64 65 mfpsr = readl(&pmu->MFPSR); 66 mfpsr &= ~dev; 67 writel(mfpsr, &pmu->MFPSR); 68 } 69 70 /* PDLLCR0: PLL/DLL Control Register 0 */ 71 void ftpmu010_dlldis_disable(void) 72 { 73 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 74 unsigned int pdllcr0; 75 76 pdllcr0 = readl(&pmu->PDLLCR0); 77 pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS; 78 writel(pdllcr0, &pmu->PDLLCR0); 79 } 80 81 void ftpmu010_sdram_clk_disable(unsigned int cr0) 82 { 83 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 84 unsigned int pdllcr0; 85 86 pdllcr0 = readl(&pmu->PDLLCR0); 87 pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); 88 writel(pdllcr0, &pmu->PDLLCR0); 89 } 90 91 /* SDRAMHTC: SDRAM Signal Hold Time Control */ 92 void ftpmu010_sdramhtc_set(unsigned int val) 93 { 94 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 95 unsigned int sdramhtc; 96 97 sdramhtc = readl(&pmu->SDRAMHTC); 98 sdramhtc |= val; 99 writel(sdramhtc, &pmu->SDRAMHTC); 100 } 101