1 /* 2 * Copyright (C) 2017 Socionext Inc. 3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <dm/device.h> 9 #include <dm/pinctrl.h> 10 11 #include "pinctrl-uniphier.h" 12 13 static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38}; 14 static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; 15 static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42}; 16 static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; 17 static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60, 18 61, 62, 63, 64, 65, 66, 67}; 19 static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20 0, 0, 0, 0}; 21 static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61, 22 63, 64, 67}; 23 static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; 24 static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76, 25 77, 78, 79, 80, 81, 82, 83}; 26 static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 27 0, 0, 0, 0}; 28 static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77, 29 79, 80, 83}; 30 static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; 31 static const unsigned i2c0_pins[] = {104, 105}; 32 static const int i2c0_muxvals[] = {0, 0}; 33 static const unsigned i2c1_pins[] = {106, 107}; 34 static const int i2c1_muxvals[] = {0, 0}; 35 static const unsigned i2c2_pins[] = {108, 109}; 36 static const int i2c2_muxvals[] = {0, 0}; 37 static const unsigned i2c3_pins[] = {110, 111}; 38 static const int i2c3_muxvals[] = {0, 0}; 39 static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 40 27, 28, 29, 30}; 41 static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 42 static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; 43 static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; 44 static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 45 12, 13, 14}; 46 static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 47 0}; 48 static const unsigned system_bus_cs1_pins[] = {15}; 49 static const int system_bus_cs1_muxvals[] = {0}; 50 static const unsigned uart0_pins[] = {92, 93}; 51 static const int uart0_muxvals[] = {0, 0}; 52 static const unsigned uart1_pins[] = {94, 95}; 53 static const int uart1_muxvals[] = {0, 0}; 54 static const unsigned uart2_pins[] = {96, 97}; 55 static const int uart2_muxvals[] = {0, 0}; 56 static const unsigned uart3_pins[] = {98, 99}; 57 static const int uart3_muxvals[] = {0, 0}; 58 static const unsigned usb0_pins[] = {84, 85}; 59 static const int usb0_muxvals[] = {0, 0}; 60 static const unsigned usb1_pins[] = {86, 87}; 61 static const int usb1_muxvals[] = {0, 0}; 62 static const unsigned usb2_pins[] = {88, 89}; 63 static const int usb2_muxvals[] = {0, 0}; 64 static const unsigned usb3_pins[] = {90, 91}; 65 static const int usb3_muxvals[] = {0, 0}; 66 67 static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { 68 UNIPHIER_PINCTRL_GROUP(emmc), 69 UNIPHIER_PINCTRL_GROUP(emmc_dat8), 70 UNIPHIER_PINCTRL_GROUP(ether_rgmii), 71 UNIPHIER_PINCTRL_GROUP(ether_rmii), 72 UNIPHIER_PINCTRL_GROUP(ether1_rgmii), 73 UNIPHIER_PINCTRL_GROUP(ether1_rmii), 74 UNIPHIER_PINCTRL_GROUP(i2c0), 75 UNIPHIER_PINCTRL_GROUP(i2c1), 76 UNIPHIER_PINCTRL_GROUP(i2c2), 77 UNIPHIER_PINCTRL_GROUP(i2c3), 78 UNIPHIER_PINCTRL_GROUP(nand), 79 UNIPHIER_PINCTRL_GROUP(sd), 80 UNIPHIER_PINCTRL_GROUP_SPL(system_bus), 81 UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), 82 UNIPHIER_PINCTRL_GROUP_SPL(uart0), 83 UNIPHIER_PINCTRL_GROUP_SPL(uart1), 84 UNIPHIER_PINCTRL_GROUP_SPL(uart2), 85 UNIPHIER_PINCTRL_GROUP_SPL(uart3), 86 UNIPHIER_PINCTRL_GROUP(usb0), 87 UNIPHIER_PINCTRL_GROUP(usb1), 88 UNIPHIER_PINCTRL_GROUP(usb2), 89 UNIPHIER_PINCTRL_GROUP(usb3), 90 }; 91 92 static const char * const uniphier_pxs3_functions[] = { 93 UNIPHIER_PINMUX_FUNCTION(emmc), 94 UNIPHIER_PINMUX_FUNCTION(ether_rgmii), 95 UNIPHIER_PINMUX_FUNCTION(ether_rmii), 96 UNIPHIER_PINMUX_FUNCTION(ether1_rgmii), 97 UNIPHIER_PINMUX_FUNCTION(ether1_rmii), 98 UNIPHIER_PINMUX_FUNCTION(i2c0), 99 UNIPHIER_PINMUX_FUNCTION(i2c1), 100 UNIPHIER_PINMUX_FUNCTION(i2c2), 101 UNIPHIER_PINMUX_FUNCTION(i2c3), 102 UNIPHIER_PINMUX_FUNCTION(nand), 103 UNIPHIER_PINMUX_FUNCTION(sd), 104 UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), 105 UNIPHIER_PINMUX_FUNCTION_SPL(uart0), 106 UNIPHIER_PINMUX_FUNCTION_SPL(uart1), 107 UNIPHIER_PINMUX_FUNCTION_SPL(uart2), 108 UNIPHIER_PINMUX_FUNCTION_SPL(uart3), 109 UNIPHIER_PINMUX_FUNCTION(usb0), 110 UNIPHIER_PINMUX_FUNCTION(usb1), 111 UNIPHIER_PINMUX_FUNCTION(usb2), 112 UNIPHIER_PINMUX_FUNCTION(usb3), 113 }; 114 115 static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { 116 .groups = uniphier_pxs3_groups, 117 .groups_count = ARRAY_SIZE(uniphier_pxs3_groups), 118 .functions = uniphier_pxs3_functions, 119 .functions_count = ARRAY_SIZE(uniphier_pxs3_functions), 120 .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, 121 }; 122 123 static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) 124 { 125 return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata); 126 } 127 128 static const struct udevice_id uniphier_pxs3_pinctrl_match[] = { 129 { .compatible = "socionext,uniphier-pxs3-pinctrl" }, 130 { /* sentinel */ } 131 }; 132 133 U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = { 134 .name = "uniphier-pxs3-pinctrl", 135 .id = UCLASS_PINCTRL, 136 .of_match = of_match_ptr(uniphier_pxs3_pinctrl_match), 137 .probe = uniphier_pxs3_pinctrl_probe, 138 .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), 139 .ops = &uniphier_pinctrl_ops, 140 }; 141