1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <dm/pinctrl.h>
9 #include <regmap.h>
10 #include <syscon.h>
11 
12 #include "pinctrl-rockchip.h"
13 
14 #define RK3036_PULL_OFFSET		0x118
15 #define RK3036_PULL_PINS_PER_REG	16
16 #define RK3036_PULL_BANK_STRIDE		8
17 
18 static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
19 					 int pin_num, struct regmap **regmap,
20 					 int *reg, u8 *bit)
21 {
22 	struct rockchip_pinctrl_priv *priv = bank->priv;
23 
24 	*regmap = priv->regmap_base;
25 	*reg = RK3036_PULL_OFFSET;
26 	*reg += bank->bank_num * RK3036_PULL_BANK_STRIDE;
27 	*reg += (pin_num / RK3036_PULL_PINS_PER_REG) * 4;
28 
29 	*bit = pin_num % RK3036_PULL_PINS_PER_REG;
30 };
31 
32 static struct rockchip_pin_bank rk3036_pin_banks[] = {
33 	PIN_BANK(0, 32, "gpio0"),
34 	PIN_BANK(1, 32, "gpio1"),
35 	PIN_BANK(2, 32, "gpio2"),
36 };
37 
38 static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
39 		.pin_banks		= rk3036_pin_banks,
40 		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
41 		.label			= "RK3036-GPIO",
42 		.type			= RK3036,
43 		.grf_mux_offset		= 0xa8,
44 		.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
45 };
46 
47 static const struct udevice_id rk3036_pinctrl_ids[] = {
48 	{
49 		.compatible = "rockchip,rk3036-pinctrl",
50 		.data = (ulong)&rk3036_pin_ctrl
51 	},
52 	{}
53 };
54 
55 U_BOOT_DRIVER(pinctrl_rockchip) = {
56 	.name		= "rk3036-pinctrl",
57 	.id		= UCLASS_PINCTRL,
58 	.of_match	= rk3036_pinctrl_ids,
59 	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
60 	.ops		= &rockchip_pinctrl_ops,
61 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
62 	.bind		= dm_scan_fdt_dev,
63 #endif
64 	.probe		= rockchip_pinctrl_probe,
65 };
66