xref: /openbmc/u-boot/drivers/pinctrl/renesas/Kconfig (revision cbd2fba1)
1if ARCH_RMOBILE
2
3config PINCTRL_PFC
4	bool "Renesas pin control drivers"
5	depends on DM && ARCH_RMOBILE
6	help
7	  Enable support for clock present on Renesas RCar SoCs.
8
9config PINCTRL_PFC_R8A7790
10	bool "Renesas RCar Gen2 R8A7790 pin control driver"
11	def_bool y if R8A7790
12	depends on PINCTRL_PFC
13	help
14	  Support pin multiplexing control on Renesas RCar Gen3 R8A7790 SoCs.
15
16	  The driver is controlled by a device tree node which contains both
17	  the GPIO definitions and pin control functions for each available
18	  multiplex function.
19
20config PINCTRL_PFC_R8A7791
21	bool "Renesas RCar Gen2 R8A7791 pin control driver"
22	def_bool y if R8A7791
23	depends on PINCTRL_PFC
24	help
25	  Support pin multiplexing control on Renesas RCar Gen3 R8A7791 SoCs.
26
27	  The driver is controlled by a device tree node which contains both
28	  the GPIO definitions and pin control functions for each available
29	  multiplex function.
30
31config PINCTRL_PFC_R8A7792
32	bool "Renesas RCar Gen2 R8A7792 pin control driver"
33	def_bool y if R8A7792
34	depends on PINCTRL_PFC
35	help
36	  Support pin multiplexing control on Renesas RCar Gen3 R8A7792 SoCs.
37
38	  The driver is controlled by a device tree node which contains both
39	  the GPIO definitions and pin control functions for each available
40	  multiplex function.
41
42config PINCTRL_PFC_R8A7793
43	bool "Renesas RCar Gen2 R8A7793 pin control driver"
44	def_bool y if R8A7793
45	depends on PINCTRL_PFC
46	help
47	  Support pin multiplexing control on Renesas RCar Gen3 R8A7793 SoCs.
48
49	  The driver is controlled by a device tree node which contains both
50	  the GPIO definitions and pin control functions for each available
51	  multiplex function.
52
53config PINCTRL_PFC_R8A7794
54	bool "Renesas RCar Gen2 R8A7794 pin control driver"
55	def_bool y if R8A7794
56	depends on PINCTRL_PFC
57	help
58	  Support pin multiplexing control on Renesas RCar Gen3 R8A7794 SoCs.
59
60	  The driver is controlled by a device tree node which contains both
61	  the GPIO definitions and pin control functions for each available
62	  multiplex function.
63
64config PINCTRL_PFC_R8A7795
65	bool "Renesas RCar Gen3 R8A7795 pin control driver"
66	def_bool y if R8A7795
67	depends on PINCTRL_PFC
68	help
69	  Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs.
70
71	  The driver is controlled by a device tree node which contains both
72	  the GPIO definitions and pin control functions for each available
73	  multiplex function.
74
75config PINCTRL_PFC_R8A7796
76	bool "Renesas RCar Gen3 R8A7796 pin control driver"
77	def_bool y if R8A7796
78	depends on PINCTRL_PFC
79	help
80	  Support pin multiplexing control on Renesas RCar Gen3 R8A7796 SoCs.
81
82	  The driver is controlled by a device tree node which contains both
83	  the GPIO definitions and pin control functions for each available
84	  multiplex function.
85
86config PINCTRL_PFC_R8A77970
87	bool "Renesas RCar Gen3 R8A77970 pin control driver"
88	def_bool y if R8A77970
89	depends on PINCTRL_PFC
90	help
91	  Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs.
92
93	  The driver is controlled by a device tree node which contains both
94	  the GPIO definitions and pin control functions for each available
95	  multiplex function.
96
97config PINCTRL_PFC_R8A77990
98	bool "Renesas RCar Gen3 R8A77990 pin control driver"
99	def_bool y if R8A77990
100	depends on PINCTRL_PFC
101	help
102	  Support pin multiplexing control on Renesas RCar Gen3 R8A77990 SoCs.
103
104	  The driver is controlled by a device tree node which contains both
105	  the GPIO definitions and pin control functions for each available
106	  multiplex function.
107
108config PINCTRL_PFC_R8A77995
109	bool "Renesas RCar Gen3 R8A77995 pin control driver"
110	def_bool y if R8A77995
111	depends on PINCTRL_PFC
112	help
113	  Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs.
114
115	  The driver is controlled by a device tree node which contains both
116	  the GPIO definitions and pin control functions for each available
117	  multiplex function.
118
119endif
120