xref: /openbmc/u-boot/drivers/pinctrl/renesas/Kconfig (revision 7547ad4c)
1if ARCH_RMOBILE
2
3config PINCTRL_PFC
4	bool "Renesas pin control drivers"
5	depends on DM && ARCH_RMOBILE
6	help
7	  Enable support for clock present on Renesas RCar SoCs.
8
9config PINCTRL_PFC_R8A7790
10	bool "Renesas RCar Gen2 R8A7790 pin control driver"
11	def_bool y if R8A7790
12	depends on PINCTRL_PFC
13	help
14	  Support pin multiplexing control on Renesas RCar Gen3 R8A7790 SoCs.
15
16	  The driver is controlled by a device tree node which contains both
17	  the GPIO definitions and pin control functions for each available
18	  multiplex function.
19
20config PINCTRL_PFC_R8A7795
21	bool "Renesas RCar Gen3 R8A7795 pin control driver"
22	def_bool y if R8A7795
23	depends on PINCTRL_PFC
24	help
25	  Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs.
26
27	  The driver is controlled by a device tree node which contains both
28	  the GPIO definitions and pin control functions for each available
29	  multiplex function.
30
31config PINCTRL_PFC_R8A7796
32	bool "Renesas RCar Gen3 R8A7796 pin control driver"
33	def_bool y if R8A7796
34	depends on PINCTRL_PFC
35	help
36	  Support pin multiplexing control on Renesas RCar Gen3 R8A7796 SoCs.
37
38	  The driver is controlled by a device tree node which contains both
39	  the GPIO definitions and pin control functions for each available
40	  multiplex function.
41
42config PINCTRL_PFC_R8A77970
43	bool "Renesas RCar Gen3 R8A77970 pin control driver"
44	def_bool y if R8A77970
45	depends on PINCTRL_PFC
46	help
47	  Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs.
48
49	  The driver is controlled by a device tree node which contains both
50	  the GPIO definitions and pin control functions for each available
51	  multiplex function.
52
53config PINCTRL_PFC_R8A77995
54	bool "Renesas RCar Gen3 R8A77995 pin control driver"
55	def_bool y if R8A77995
56	depends on PINCTRL_PFC
57	help
58	  Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs.
59
60	  The driver is controlled by a device tree node which contains both
61	  the GPIO definitions and pin control functions for each available
62	  multiplex function.
63
64endif
65