1 /* 2 * Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm/device.h> 9 #include <dm/pinctrl.h> 10 #include <libfdt.h> 11 #include <asm/io.h> 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 struct single_pdata { 16 fdt_addr_t base; /* first configuration register */ 17 int offset; /* index of last configuration register */ 18 u32 mask; /* configuration-value mask bits */ 19 int width; /* configuration register bit width */ 20 }; 21 22 struct single_fdt_pin_cfg { 23 fdt32_t reg; /* configuration register offset */ 24 fdt32_t val; /* configuration register value */ 25 }; 26 27 /** 28 * single_configure_pins() - Configure pins based on FDT data 29 * 30 * @dev: Pointer to single pin configuration device which is the parent of 31 * the pins node holding the pin configuration data. 32 * @pins: Pointer to the first element of an array of register/value pairs 33 * of type 'struct single_fdt_pin_cfg'. Each such pair describes the 34 * the pin to be configured and the value to be used for configuration. 35 * This pointer points to a 'pinctrl-single,pins' property in the 36 * device-tree. 37 * @size: Size of the 'pins' array in bytes. 38 * The number of register/value pairs in the 'pins' array therefore 39 * equals to 'size / sizeof(struct single_fdt_pin_cfg)'. 40 */ 41 static int single_configure_pins(struct udevice *dev, 42 const struct single_fdt_pin_cfg *pins, 43 int size) 44 { 45 struct single_pdata *pdata = dev->platdata; 46 int count = size / sizeof(struct single_fdt_pin_cfg); 47 int n, reg; 48 u32 val; 49 50 for (n = 0; n < count; n++) { 51 reg = fdt32_to_cpu(pins->reg); 52 if ((reg < 0) || (reg > pdata->offset)) { 53 dev_dbg(dev, " invalid register offset 0x%08x\n", reg); 54 pins++; 55 continue; 56 } 57 reg += pdata->base; 58 switch (pdata->width) { 59 case 32: 60 val = readl(reg) & ~pdata->mask; 61 val |= fdt32_to_cpu(pins->val) & pdata->mask; 62 writel(val, reg); 63 dev_dbg(dev, " reg/val 0x%08x/0x%08x\n", 64 reg, val); 65 break; 66 default: 67 dev_warn(dev, "unsupported register width %i\n", 68 pdata->width); 69 } 70 pins++; 71 } 72 return 0; 73 } 74 75 static int single_set_state(struct udevice *dev, 76 struct udevice *config) 77 { 78 const void *fdt = gd->fdt_blob; 79 const struct single_fdt_pin_cfg *prop; 80 int len; 81 82 prop = fdt_getprop(fdt, config->of_offset, "pinctrl-single,pins", &len); 83 if (prop) { 84 dev_dbg(dev, "configuring pins for %s\n", config->name); 85 if (len % sizeof(struct single_fdt_pin_cfg)) { 86 dev_dbg(dev, " invalid pin configuration in fdt\n"); 87 return -FDT_ERR_BADSTRUCTURE; 88 } 89 single_configure_pins(dev, prop, len); 90 len = 0; 91 } 92 93 return len; 94 } 95 96 static int single_ofdata_to_platdata(struct udevice *dev) 97 { 98 fdt_addr_t addr; 99 u32 of_reg[2]; 100 int res; 101 struct single_pdata *pdata = dev->platdata; 102 103 pdata->width = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 104 "pinctrl-single,register-width", 0); 105 106 res = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, 107 "reg", of_reg, 2); 108 if (res) 109 return res; 110 pdata->offset = of_reg[1] - pdata->width / 8; 111 112 addr = dev_get_addr(dev); 113 if (addr == FDT_ADDR_T_NONE) { 114 dev_dbg(dev, "no valid base register address\n"); 115 return -EINVAL; 116 } 117 pdata->base = addr; 118 119 pdata->mask = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 120 "pinctrl-single,function-mask", 121 0xffffffff); 122 return 0; 123 } 124 125 const struct pinctrl_ops single_pinctrl_ops = { 126 .set_state = single_set_state, 127 }; 128 129 static const struct udevice_id single_pinctrl_match[] = { 130 { .compatible = "pinctrl-single" }, 131 { /* sentinel */ } 132 }; 133 134 U_BOOT_DRIVER(single_pinctrl) = { 135 .name = "single-pinctrl", 136 .id = UCLASS_PINCTRL, 137 .of_match = single_pinctrl_match, 138 .ops = &single_pinctrl_ops, 139 .flags = DM_FLAG_PRE_RELOC, 140 .platdata_auto_alloc_size = sizeof(struct single_pdata), 141 .ofdata_to_platdata = single_ofdata_to_platdata, 142 }; 143