1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2 /*
3  * Microsemi SoCs pinctrl driver
4  *
5  * Author: <alexandre.belloni@free-electrons.com>
6  * License: Dual MIT/GPL
7  * Copyright (c) 2017 Microsemi Corporation
8  */
9 
10 #define MSCC_FUNC_PER_PIN	4
11 
12 enum mscc_regs_gpio {
13 	MSCC_GPIO_OUT_SET,
14 	MSCC_GPIO_OUT_CLR,
15 	MSCC_GPIO_OUT,
16 	MSCC_GPIO_IN,
17 	MSCC_GPIO_OE,
18 	MSCC_GPIO_INTR,
19 	MSCC_GPIO_INTR_ENA,
20 	MSCC_GPIO_INTR_IDENT,
21 	MSCC_GPIO_ALT0,
22 	MSCC_GPIO_ALT1,
23 };
24 
25 struct mscc_pin_caps {
26 	unsigned int pin;
27 	unsigned char functions[MSCC_FUNC_PER_PIN];
28 };
29 
30 struct mscc_pin_data {
31 	const char *name;
32 	struct mscc_pin_caps *drv_data;
33 };
34 
35 #define MSCC_P(p, f0, f1, f2)						\
36 static struct mscc_pin_caps mscc_pin_##p = {				\
37 	.pin = p,							\
38 	.functions = {							\
39 			FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2,	\
40 	},								\
41 }
42 
43 struct mscc_pmx_func {
44 	const char **groups;
45 	unsigned int ngroups;
46 };
47 
48 struct mscc_pinctrl {
49 	struct udevice *dev;
50 	struct pinctrl_dev *pctl;
51 	void __iomem *regs;
52 	struct mscc_pmx_func *func;
53 	int num_func;
54 	const struct mscc_pin_data *mscc_pins;
55 	int num_pins;
56 	char * const *function_names;
57 	const unsigned long *mscc_gpios;
58 };
59 
60 int mscc_pinctrl_probe(struct udevice *dev, int num_func,
61 		       const struct mscc_pin_data *mscc_pins, int num_pins,
62 		       char * const *function_names,
63 		       const unsigned long *mscc_gpios);
64 const struct pinctrl_ops mscc_pinctrl_ops;
65 
66 const struct dm_gpio_ops mscc_gpio_ops;
67