1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* 3 * Microsemi SoCs pinctrl driver 4 * 5 * Author: <alexandre.belloni@free-electrons.com> 6 * Author: <gregory.clement@bootlin.com> 7 * License: Dual MIT/GPL 8 * Copyright (c) 2017 Microsemi Corporation 9 */ 10 11 #include <asm/gpio.h> 12 #include <asm/system.h> 13 #include <common.h> 14 #include <config.h> 15 #include <dm.h> 16 #include <dm/device-internal.h> 17 #include <dm/lists.h> 18 #include <dm/pinctrl.h> 19 #include <dm/root.h> 20 #include <errno.h> 21 #include <fdtdec.h> 22 #include <linux/io.h> 23 #include "mscc-common.h" 24 25 static void mscc_writel(unsigned int offset, void *addr) 26 { 27 if (offset < 32) 28 writel(BIT(offset), addr); 29 else 30 writel(BIT(offset % 32), addr + 4); 31 } 32 33 static unsigned int mscc_readl(unsigned int offset, void *addr) 34 { 35 if (offset < 32) 36 return readl(addr); 37 else 38 return readl(addr + 4); 39 } 40 41 static void mscc_setbits(unsigned int offset, void *addr) 42 { 43 if (offset < 32) 44 writel(readl(addr) | BIT(offset), addr); 45 else 46 writel(readl(addr + 4) | BIT(offset % 32), addr + 4); 47 } 48 49 static void mscc_clrbits(unsigned int offset, void *addr) 50 { 51 if (offset < 32) 52 writel(readl(addr) & ~BIT(offset), addr); 53 else 54 writel(readl(addr + 4) & ~BIT(offset % 32), addr + 4); 55 } 56 57 static int mscc_get_functions_count(struct udevice *dev) 58 { 59 struct mscc_pinctrl *info = dev_get_priv(dev); 60 61 return info->num_func; 62 } 63 64 static const char *mscc_get_function_name(struct udevice *dev, 65 unsigned int function) 66 { 67 struct mscc_pinctrl *info = dev_get_priv(dev); 68 69 return info->function_names[function]; 70 } 71 72 static int mscc_pin_function_idx(unsigned int pin, unsigned int function, 73 const struct mscc_pin_data *mscc_pins) 74 { 75 struct mscc_pin_caps *p = mscc_pins[pin].drv_data; 76 int i; 77 78 for (i = 0; i < MSCC_FUNC_PER_PIN; i++) { 79 if (function == p->functions[i]) 80 return i; 81 } 82 83 return -1; 84 } 85 86 static int mscc_pinmux_set_mux(struct udevice *dev, 87 unsigned int pin_selector, unsigned int selector) 88 { 89 struct mscc_pinctrl *info = dev_get_priv(dev); 90 struct mscc_pin_caps *pin = info->mscc_pins[pin_selector].drv_data; 91 int f, offset, regoff; 92 93 f = mscc_pin_function_idx(pin_selector, selector, info->mscc_pins); 94 if (f < 0) 95 return -EINVAL; 96 /* 97 * f is encoded on two bits. 98 * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of 99 * ALT1 100 * This is racy because both registers can't be updated at the same time 101 * but it doesn't matter much for now. 102 */ 103 offset = pin->pin; 104 regoff = info->mscc_gpios[MSCC_GPIO_ALT0]; 105 if (offset >= 32) { 106 offset = offset % 32; 107 regoff = info->mscc_gpios[MSCC_GPIO_ALT1]; 108 } 109 110 if (f & BIT(0)) 111 mscc_setbits(offset, info->regs + regoff); 112 else 113 mscc_clrbits(offset, info->regs + regoff); 114 115 if (f & BIT(1)) 116 mscc_setbits(offset, info->regs + regoff + 4); 117 else 118 mscc_clrbits(offset, info->regs + regoff + 4); 119 120 return 0; 121 } 122 123 static int mscc_pctl_get_groups_count(struct udevice *dev) 124 { 125 struct mscc_pinctrl *info = dev_get_priv(dev); 126 127 return info->num_pins; 128 } 129 130 static const char *mscc_pctl_get_group_name(struct udevice *dev, 131 unsigned int group) 132 { 133 struct mscc_pinctrl *info = dev_get_priv(dev); 134 135 return info->mscc_pins[group].name; 136 } 137 138 static int mscc_create_group_func_map(struct udevice *dev, 139 struct mscc_pinctrl *info) 140 { 141 u16 pins[info->num_pins]; 142 int f, npins, i; 143 144 for (f = 0; f < info->num_func; f++) { 145 for (npins = 0, i = 0; i < info->num_pins; i++) { 146 if (mscc_pin_function_idx(i, f, info->mscc_pins) >= 0) 147 pins[npins++] = i; 148 } 149 150 info->func[f].ngroups = npins; 151 info->func[f].groups = devm_kzalloc(dev, npins * sizeof(char *), 152 GFP_KERNEL); 153 if (!info->func[f].groups) 154 return -ENOMEM; 155 156 for (i = 0; i < npins; i++) 157 info->func[f].groups[i] = info->mscc_pins[pins[i]].name; 158 } 159 160 return 0; 161 } 162 163 static int mscc_pinctrl_register(struct udevice *dev, struct mscc_pinctrl *info) 164 { 165 int ret; 166 167 ret = mscc_create_group_func_map(dev, info); 168 if (ret) { 169 dev_err(dev, "Unable to create group func map.\n"); 170 return ret; 171 } 172 173 return 0; 174 } 175 176 static int mscc_gpio_get(struct udevice *dev, unsigned int offset) 177 { 178 struct mscc_pinctrl *info = dev_get_priv(dev->parent); 179 unsigned int val; 180 181 if (mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]) & 182 BIT(offset % 32)) 183 val = mscc_readl(offset, 184 info->regs + info->mscc_gpios[MSCC_GPIO_OUT]); 185 else 186 val = mscc_readl(offset, 187 info->regs + info->mscc_gpios[MSCC_GPIO_IN]); 188 189 return !!(val & BIT(offset % 32)); 190 } 191 192 static int mscc_gpio_set(struct udevice *dev, unsigned int offset, int value) 193 { 194 struct mscc_pinctrl *info = dev_get_priv(dev->parent); 195 196 if (value) 197 mscc_writel(offset, 198 info->regs + info->mscc_gpios[MSCC_GPIO_OUT_SET]); 199 else 200 mscc_writel(offset, 201 info->regs + info->mscc_gpios[MSCC_GPIO_OUT_CLR]); 202 203 return 0; 204 } 205 206 static int mscc_gpio_get_direction(struct udevice *dev, unsigned int offset) 207 { 208 struct mscc_pinctrl *info = dev_get_priv(dev->parent); 209 unsigned int val; 210 211 val = mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]); 212 213 return (val & BIT(offset % 32)) ? GPIOF_OUTPUT : GPIOF_INPUT; 214 } 215 216 static int mscc_gpio_direction_input(struct udevice *dev, unsigned int offset) 217 { 218 struct mscc_pinctrl *info = dev_get_priv(dev->parent); 219 220 mscc_clrbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]); 221 222 return 0; 223 } 224 225 static int mscc_gpio_direction_output(struct udevice *dev, 226 unsigned int offset, int value) 227 { 228 struct mscc_pinctrl *info = dev_get_priv(dev->parent); 229 230 mscc_setbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]); 231 232 return mscc_gpio_set(dev, offset, value); 233 } 234 235 const struct dm_gpio_ops mscc_gpio_ops = { 236 .set_value = mscc_gpio_set, 237 .get_value = mscc_gpio_get, 238 .get_function = mscc_gpio_get_direction, 239 .direction_input = mscc_gpio_direction_input, 240 .direction_output = mscc_gpio_direction_output, 241 }; 242 243 const struct pinctrl_ops mscc_pinctrl_ops = { 244 .get_pins_count = mscc_pctl_get_groups_count, 245 .get_pin_name = mscc_pctl_get_group_name, 246 .get_functions_count = mscc_get_functions_count, 247 .get_function_name = mscc_get_function_name, 248 .pinmux_set = mscc_pinmux_set_mux, 249 .set_state = pinctrl_generic_set_state, 250 }; 251 252 int mscc_pinctrl_probe(struct udevice *dev, int num_func, 253 const struct mscc_pin_data *mscc_pins, int num_pins, 254 char * const *function_names, 255 const unsigned long *mscc_gpios) 256 { 257 struct mscc_pinctrl *priv = dev_get_priv(dev); 258 int ret; 259 260 priv->regs = dev_remap_addr(dev); 261 if (!priv->regs) 262 return -EINVAL; 263 264 priv->func = devm_kzalloc(dev, num_func * sizeof(struct mscc_pmx_func), 265 GFP_KERNEL); 266 priv->num_func = num_func; 267 priv->mscc_pins = mscc_pins; 268 priv->num_pins = num_pins; 269 priv->function_names = function_names; 270 priv->mscc_gpios = mscc_gpios; 271 ret = mscc_pinctrl_register(dev, priv); 272 273 return ret; 274 } 275