1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * Author: Ryder Lee <ryder.lee@mediatek.com> 5 */ 6 7 #ifndef __PINCTRL_MEDIATEK_H__ 8 #define __PINCTRL_MEDIATEK_H__ 9 10 #define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), } 11 #define MTK_PIN(_number, _name, _drv_n) { \ 12 .number = _number, \ 13 .name = _name, \ 14 .drv_n = _drv_n, \ 15 } 16 17 #define PINCTRL_PIN_GROUP(name, id) \ 18 { \ 19 name, \ 20 id##_pins, \ 21 ARRAY_SIZE(id##_pins), \ 22 id##_funcs, \ 23 } 24 25 #define PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \ 26 _x_bits, _sz_reg, _fixed) { \ 27 .s_pin = _s_pin, \ 28 .e_pin = _e_pin, \ 29 .s_addr = _s_addr, \ 30 .x_addrs = _x_addrs, \ 31 .s_bit = _s_bit, \ 32 .x_bits = _x_bits, \ 33 .sz_reg = _sz_reg, \ 34 .fixed = _fixed, \ 35 } 36 37 /* List these attributes which could be modified for the pin */ 38 enum { 39 PINCTRL_PIN_REG_MODE, 40 PINCTRL_PIN_REG_DIR, 41 PINCTRL_PIN_REG_DI, 42 PINCTRL_PIN_REG_DO, 43 PINCTRL_PIN_REG_IES, 44 PINCTRL_PIN_REG_SMT, 45 PINCTRL_PIN_REG_PULLEN, 46 PINCTRL_PIN_REG_PULLSEL, 47 PINCTRL_PIN_REG_DRV, 48 PINCTRL_PIN_REG_MAX, 49 }; 50 51 /* Group the pins by the driving current */ 52 enum { 53 DRV_FIXED, 54 DRV_GRP0, 55 DRV_GRP1, 56 DRV_GRP2, 57 DRV_GRP3, 58 DRV_GRP4, 59 }; 60 61 /** 62 * struct mtk_pin_field - the structure that holds the information of the field 63 * used to describe the attribute for the pin 64 * @offset: the register offset relative to the base address 65 * @mask: the mask used to filter out the field from the register 66 * @bitpos: the start bit relative to the register 67 * @next: the indication that the field would be extended to the 68 next register 69 */ 70 struct mtk_pin_field { 71 u32 offset; 72 u32 mask; 73 u8 bitpos; 74 u8 next; 75 }; 76 77 /** 78 * struct mtk_pin_field_calc - the structure that holds the range providing 79 * the guide used to look up the relevant field 80 * @s_pin: the start pin within the range 81 * @e_pin: the end pin within the range 82 * @s_addr: the start address for the range 83 * @x_addrs: the address distance between two consecutive registers 84 * within the range 85 * @s_bit: the start bit for the first register within the range 86 * @x_bits: the bit distance between two consecutive pins within 87 * the range 88 * @sz_reg: the size of bits in a register 89 * @fixed: the consecutive pins share the same bits with the 1st 90 * pin 91 */ 92 struct mtk_pin_field_calc { 93 u16 s_pin; 94 u16 e_pin; 95 u32 s_addr; 96 u8 x_addrs; 97 u8 s_bit; 98 u8 x_bits; 99 u8 sz_reg; 100 u8 fixed; 101 }; 102 103 /** 104 * struct mtk_pin_reg_calc - the structure that holds all ranges used to 105 * determine which register the pin would make use of 106 * for certain pin attribute. 107 * @range: the start address for the range 108 * @nranges: the number of items in the range 109 */ 110 struct mtk_pin_reg_calc { 111 const struct mtk_pin_field_calc *range; 112 unsigned int nranges; 113 }; 114 115 /** 116 * struct mtk_pin_desc - the structure that providing information 117 * for each pin of chips 118 * @number: unique pin number from the global pin number space 119 * @name: name for this pin 120 * @drv_n: the index with the driving group 121 */ 122 struct mtk_pin_desc { 123 unsigned int number; 124 const char *name; 125 u8 drv_n; 126 }; 127 128 /** 129 * struct mtk_group_desc - generic pin group descriptor 130 * @name: name of the pin group 131 * @pins: array of pins that belong to the group 132 * @num_pins: number of pins in the group 133 * @data: pin controller driver specific data 134 */ 135 struct mtk_group_desc { 136 const char *name; 137 int *pins; 138 int num_pins; 139 void *data; 140 }; 141 142 /** 143 * struct mtk_function_desc - generic function descriptor 144 * @name: name of the function 145 * @group_names: array of pin group names 146 * @num_group_names: number of pin group names 147 */ 148 struct mtk_function_desc { 149 const char *name; 150 const char * const *group_names; 151 int num_group_names; 152 }; 153 154 /* struct mtk_pin_soc - the structure that holds SoC-specific data */ 155 struct mtk_pinctrl_soc { 156 const char *name; 157 const struct mtk_pin_reg_calc *reg_cal; 158 const struct mtk_pin_desc *pins; 159 int npins; 160 const struct mtk_group_desc *grps; 161 int ngrps; 162 const struct mtk_function_desc *funcs; 163 int nfuncs; 164 }; 165 166 /** 167 * struct mtk_pinctrl_priv - private data for MTK pinctrl driver 168 * 169 * @base: base address of the pinctrl device 170 * @soc: SoC specific data 171 */ 172 struct mtk_pinctrl_priv { 173 void __iomem *base; 174 struct mtk_pinctrl_soc *soc; 175 }; 176 177 extern const struct pinctrl_ops mtk_pinctrl_ops; 178 179 /* A common read-modify-write helper for MediaTek chips */ 180 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set); 181 int mtk_pinctrl_common_probe(struct udevice *dev, 182 struct mtk_pinctrl_soc *soc); 183 184 #endif /* __PINCTRL_MEDIATEK_H__ */ 185