1 /*
2  * Exynos7420 pinctrl driver.
3  * Copyright (C) 2016 Samsung Electronics
4  * Thomas Abraham <thomas.ab@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <asm/io.h>
13 #include <dm/pinctrl.h>
14 #include <dm/root.h>
15 #include <fdtdec.h>
16 #include <asm/arch/pinmux.h>
17 #include "pinctrl-exynos.h"
18 
19 #define	GPD1_OFFSET	0xc0
20 
21 static struct exynos_pinctrl_config_data serial2_conf[] = {
22 	{
23 		.offset	= GPD1_OFFSET + PIN_CON,
24 		.mask	= 0x00ff0000,
25 		.value	= 0x00220000,
26 	}, {
27 		.offset	= GPD1_OFFSET + PIN_PUD,
28 		.mask	= 0x00000f00,
29 		.value	= 0x00000f00,
30 	},
31 };
32 
33 static int exynos7420_pinctrl_request(struct udevice *dev, int peripheral,
34 						int flags)
35 {
36 	struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
37 	unsigned long base = priv->base;
38 
39 	switch (PERIPH_ID_UART2) {
40 	case PERIPH_ID_UART2:
41 		exynos_pinctrl_setup_peri(serial2_conf,
42 					  ARRAY_SIZE(serial2_conf), base);
43 		break;
44 	default:
45 		return -ENODEV;
46 	}
47 
48 	return 0;
49 }
50 
51 static struct pinctrl_ops exynos7420_pinctrl_ops = {
52 	.set_state	= exynos_pinctrl_set_state,
53 	.request	= exynos7420_pinctrl_request,
54 };
55 
56 /* pin banks of Exynos7420 pin-controller - BUS0 */
57 static const struct samsung_pin_bank_data exynos7420_pin_banks0[] = {
58 	EXYNOS_PIN_BANK(5, 0x000, "gpb0"),
59 	EXYNOS_PIN_BANK(8, 0x020, "gpc0"),
60 	EXYNOS_PIN_BANK(2, 0x040, "gpc1"),
61 	EXYNOS_PIN_BANK(6, 0x060, "gpc2"),
62 	EXYNOS_PIN_BANK(8, 0x080, "gpc3"),
63 	EXYNOS_PIN_BANK(4, 0x0a0, "gpd0"),
64 	EXYNOS_PIN_BANK(6, 0x0c0, "gpd1"),
65 	EXYNOS_PIN_BANK(8, 0x0e0, "gpd2"),
66 	EXYNOS_PIN_BANK(5, 0x100, "gpd4"),
67 	EXYNOS_PIN_BANK(4, 0x120, "gpd5"),
68 	EXYNOS_PIN_BANK(6, 0x140, "gpd6"),
69 	EXYNOS_PIN_BANK(3, 0x160, "gpd7"),
70 	EXYNOS_PIN_BANK(2, 0x180, "gpd8"),
71 	EXYNOS_PIN_BANK(2, 0x1a0, "gpg0"),
72 	EXYNOS_PIN_BANK(4, 0x1c0, "gpg3"),
73 };
74 
75 /* pin banks of Exynos7420 pin-controller - FSYS0 */
76 static const struct samsung_pin_bank_data exynos7420_pin_banks1[] = {
77 	EXYNOS_PIN_BANK(7, 0x000, "gpr4"),
78 };
79 
80 /* pin banks of Exynos7420 pin-controller - FSYS1 */
81 static const struct samsung_pin_bank_data exynos7420_pin_banks2[] = {
82 	EXYNOS_PIN_BANK(4, 0x000, "gpr0"),
83 	EXYNOS_PIN_BANK(8, 0x020, "gpr1"),
84 	EXYNOS_PIN_BANK(5, 0x040, "gpr2"),
85 	EXYNOS_PIN_BANK(8, 0x060, "gpr3"),
86 };
87 
88 const struct samsung_pin_ctrl exynos7420_pin_ctrl[] = {
89 	{
90 		/* pin-controller instance BUS0 data */
91 		.pin_banks	= exynos7420_pin_banks0,
92 		.nr_banks	= ARRAY_SIZE(exynos7420_pin_banks0),
93 	}, {
94 		/* pin-controller instance FSYS0 data */
95 		.pin_banks	= exynos7420_pin_banks1,
96 		.nr_banks	= ARRAY_SIZE(exynos7420_pin_banks1),
97 	}, {
98 		/* pin-controller instance FSYS1 data */
99 		.pin_banks	= exynos7420_pin_banks2,
100 		.nr_banks	= ARRAY_SIZE(exynos7420_pin_banks2),
101 	},
102 };
103 
104 static const struct udevice_id exynos7420_pinctrl_ids[] = {
105 	{ .compatible = "samsung,exynos7420-pinctrl",
106 		.data = (ulong)exynos7420_pin_ctrl },
107 	{ }
108 };
109 
110 U_BOOT_DRIVER(pinctrl_exynos7420) = {
111 	.name		= "pinctrl_exynos7420",
112 	.id		= UCLASS_PINCTRL,
113 	.of_match	= exynos7420_pinctrl_ids,
114 	.priv_auto_alloc_size = sizeof(struct exynos_pinctrl_priv),
115 	.ops		= &exynos7420_pinctrl_ops,
116 	.probe		= exynos_pinctrl_probe,
117 	.flags		= DM_FLAG_PRE_RELOC
118 };
119