1 /* 2 * SH4 PCI Controller (PCIC) for U-Boot. 3 * (C) Dustin McIntire (dustin@sensoria.com) 4 * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * u-boot/arch/sh/cpu/sh4/pci-sh4.c 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #include <common.h> 29 30 #include <asm/processor.h> 31 #include <asm/io.h> 32 #include <asm/pci.h> 33 #include <pci.h> 34 35 int pci_sh4_init(struct pci_controller *hose) 36 { 37 hose->first_busno = 0; 38 hose->region_count = 0; 39 hose->last_busno = 0xff; 40 41 /* PCI memory space */ 42 pci_set_region(hose->regions + 0, 43 CONFIG_PCI_MEM_BUS, 44 CONFIG_PCI_MEM_PHYS, 45 CONFIG_PCI_MEM_SIZE, 46 PCI_REGION_MEM); 47 hose->region_count++; 48 49 /* PCI IO space */ 50 pci_set_region(hose->regions + 1, 51 CONFIG_PCI_IO_BUS, 52 CONFIG_PCI_IO_PHYS, 53 CONFIG_PCI_IO_SIZE, 54 PCI_REGION_IO); 55 hose->region_count++; 56 57 #if defined(CONFIG_PCI_SYS_BUS) 58 /* PCI System Memory space */ 59 pci_set_region(hose->regions + 2, 60 CONFIG_PCI_SYS_BUS, 61 CONFIG_PCI_SYS_PHYS, 62 CONFIG_PCI_SYS_SIZE, 63 PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); 64 hose->region_count++; 65 #endif 66 67 udelay(1000); 68 69 pci_set_ops(hose, 70 pci_hose_read_config_byte_via_dword, 71 pci_hose_read_config_word_via_dword, 72 pci_sh4_read_config_dword, 73 pci_hose_write_config_byte_via_dword, 74 pci_hose_write_config_word_via_dword, 75 pci_sh4_write_config_dword); 76 77 pci_register_hose(hose); 78 79 udelay(1000); 80 81 #ifdef CONFIG_PCI_SCAN_SHOW 82 printf("PCI: Bus Dev VenId DevId Class Int\n"); 83 #endif 84 hose->last_busno = pci_hose_scan(hose); 85 return 0; 86 } 87 88 int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) 89 { 90 return 0; 91 } 92 93 #ifdef CONFIG_PCI_SCAN_SHOW 94 int pci_print_dev(struct pci_controller *hose, pci_dev_t dev) 95 { 96 return 1; 97 } 98 #endif /* CONFIG_PCI_SCAN_SHOW */ 99