xref: /openbmc/u-boot/drivers/pci/pci_rom.c (revision d66ff4ba)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2014 Google, Inc
4  *
5  * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6  *
7  * Modifications are:
8  * Copyright (C) 2003-2004 Linux Networx
9  * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10  * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11  * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12  * Copyright (C) 2005-2006 Tyan
13  * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14  * Copyright (C) 2005-2009 coresystems GmbH
15  * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16  *
17  * PCI Bus Services, see include/linux/pci.h for further explanation.
18  *
19  * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20  * David Mosberger-Tang
21  *
22  * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
23  */
24 
25 #include <common.h>
26 #include <bios_emul.h>
27 #include <dm.h>
28 #include <errno.h>
29 #include <malloc.h>
30 #include <pci.h>
31 #include <pci_rom.h>
32 #include <vbe.h>
33 #include <video.h>
34 #include <video_fb.h>
35 #include <linux/screen_info.h>
36 
37 #ifdef CONFIG_X86
38 #include <asm/acpi_s3.h>
39 DECLARE_GLOBAL_DATA_PTR;
40 #endif
41 
42 __weak bool board_should_run_oprom(struct udevice *dev)
43 {
44 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
45 	if (gd->arch.prev_sleep_state == ACPI_S3) {
46 		if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
47 			return true;
48 		else
49 			return false;
50 	}
51 #endif
52 
53 	return true;
54 }
55 
56 __weak bool board_should_load_oprom(struct udevice *dev)
57 {
58 	return true;
59 }
60 
61 __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
62 {
63 	return vendev;
64 }
65 
66 static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
67 {
68 	struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
69 	struct pci_rom_header *rom_header;
70 	struct pci_rom_data *rom_data;
71 	u16 rom_vendor, rom_device;
72 	u32 rom_class;
73 	u32 vendev;
74 	u32 mapped_vendev;
75 	u32 rom_address;
76 
77 	vendev = pplat->vendor << 16 | pplat->device;
78 	mapped_vendev = board_map_oprom_vendev(vendev);
79 	if (vendev != mapped_vendev)
80 		debug("Device ID mapped to %#08x\n", mapped_vendev);
81 
82 #ifdef CONFIG_VGA_BIOS_ADDR
83 	rom_address = CONFIG_VGA_BIOS_ADDR;
84 #else
85 
86 	dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
87 	if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
88 		debug("%s: rom_address=%x\n", __func__, rom_address);
89 		return -ENOENT;
90 	}
91 
92 	/* Enable expansion ROM address decoding. */
93 	dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
94 			      rom_address | PCI_ROM_ADDRESS_ENABLE);
95 #endif
96 	debug("Option ROM address %x\n", rom_address);
97 	rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
98 
99 	debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
100 	      le16_to_cpu(rom_header->signature),
101 	      rom_header->size * 512, le16_to_cpu(rom_header->data));
102 
103 	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
104 		printf("Incorrect expansion ROM header signature %04x\n",
105 		       le16_to_cpu(rom_header->signature));
106 #ifndef CONFIG_VGA_BIOS_ADDR
107 		/* Disable expansion ROM address decoding */
108 		dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
109 #endif
110 		return -EINVAL;
111 	}
112 
113 	rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
114 	rom_vendor = le16_to_cpu(rom_data->vendor);
115 	rom_device = le16_to_cpu(rom_data->device);
116 
117 	debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
118 	      rom_vendor, rom_device);
119 
120 	/* If the device id is mapped, a mismatch is expected */
121 	if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
122 	    (vendev == mapped_vendev)) {
123 		printf("ID mismatch: vendor ID %04x, device ID %04x\n",
124 		       rom_vendor, rom_device);
125 		/* Continue anyway */
126 	}
127 
128 	rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
129 	debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
130 	      rom_class, rom_data->type);
131 
132 	if (pplat->class != rom_class) {
133 		debug("Class Code mismatch ROM %06x, dev %06x\n",
134 		      rom_class, pplat->class);
135 	}
136 	*hdrp = rom_header;
137 
138 	return 0;
139 }
140 
141 /**
142  * pci_rom_load() - Load a ROM image and return a pointer to it
143  *
144  * @rom_header:		Pointer to ROM image
145  * @ram_headerp:	Returns a pointer to the image in RAM
146  * @allocedp:		Returns true if @ram_headerp was allocated and needs
147  *			to be freed
148  * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
149  * the error state. Even if this function returns an error, it may have
150  * allocated memory.
151  */
152 static int pci_rom_load(struct pci_rom_header *rom_header,
153 			struct pci_rom_header **ram_headerp, bool *allocedp)
154 {
155 	struct pci_rom_data *rom_data;
156 	unsigned int rom_size;
157 	unsigned int image_size = 0;
158 	void *target;
159 
160 	*allocedp = false;
161 	do {
162 		/* Get next image, until we see an x86 version */
163 		rom_header = (struct pci_rom_header *)((void *)rom_header +
164 							    image_size);
165 
166 		rom_data = (struct pci_rom_data *)((void *)rom_header +
167 				le16_to_cpu(rom_header->data));
168 
169 		image_size = le16_to_cpu(rom_data->ilen) * 512;
170 	} while ((rom_data->type != 0) && (rom_data->indicator == 0));
171 
172 	if (rom_data->type != 0)
173 		return -EACCES;
174 
175 	rom_size = rom_header->size * 512;
176 
177 #ifdef PCI_VGA_RAM_IMAGE_START
178 	target = (void *)PCI_VGA_RAM_IMAGE_START;
179 #else
180 	target = (void *)malloc(rom_size);
181 	if (!target)
182 		return -ENOMEM;
183 	*allocedp = true;
184 #endif
185 	if (target != rom_header) {
186 		ulong start = get_timer(0);
187 
188 		debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
189 		      rom_header, target, rom_size);
190 		memcpy(target, rom_header, rom_size);
191 		if (memcmp(target, rom_header, rom_size)) {
192 			printf("VGA ROM copy failed\n");
193 			return -EFAULT;
194 		}
195 		debug("Copy took %lums\n", get_timer(start));
196 	}
197 	*ram_headerp = target;
198 
199 	return 0;
200 }
201 
202 struct vbe_mode_info mode_info;
203 
204 void setup_video(struct screen_info *screen_info)
205 {
206 	struct vesa_mode_info *vesa = &mode_info.vesa;
207 
208 	/* Sanity test on VESA parameters */
209 	if (!vesa->x_resolution || !vesa->y_resolution)
210 		return;
211 
212 	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
213 
214 	screen_info->lfb_width = vesa->x_resolution;
215 	screen_info->lfb_height = vesa->y_resolution;
216 	screen_info->lfb_depth = vesa->bits_per_pixel;
217 	screen_info->lfb_linelength = vesa->bytes_per_scanline;
218 	screen_info->lfb_base = vesa->phys_base_ptr;
219 	screen_info->lfb_size =
220 		ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
221 		      65536);
222 	screen_info->lfb_size >>= 16;
223 	screen_info->red_size = vesa->red_mask_size;
224 	screen_info->red_pos = vesa->red_mask_pos;
225 	screen_info->green_size = vesa->green_mask_size;
226 	screen_info->green_pos = vesa->green_mask_pos;
227 	screen_info->blue_size = vesa->blue_mask_size;
228 	screen_info->blue_pos = vesa->blue_mask_pos;
229 	screen_info->rsvd_size = vesa->reserved_mask_size;
230 	screen_info->rsvd_pos = vesa->reserved_mask_pos;
231 }
232 
233 int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
234 			int exec_method)
235 {
236 	struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
237 	struct pci_rom_header *rom = NULL, *ram = NULL;
238 	int vesa_mode = -1;
239 	bool emulate, alloced;
240 	int ret;
241 
242 	/* Only execute VGA ROMs */
243 	if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
244 		debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
245 		      PCI_CLASS_DISPLAY_VGA);
246 		return -ENODEV;
247 	}
248 
249 	if (!board_should_load_oprom(dev))
250 		return log_msg_ret("Should not load OPROM", -ENXIO);
251 
252 	ret = pci_rom_probe(dev, &rom);
253 	if (ret)
254 		return ret;
255 
256 	ret = pci_rom_load(rom, &ram, &alloced);
257 	if (ret)
258 		goto err;
259 
260 	if (!board_should_run_oprom(dev)) {
261 		ret = -ENXIO;
262 		goto err;
263 	}
264 
265 #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
266 		defined(CONFIG_FRAMEBUFFER_VESA_MODE)
267 	vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
268 #endif
269 	debug("Selected vesa mode %#x\n", vesa_mode);
270 
271 	if (exec_method & PCI_ROM_USE_NATIVE) {
272 #ifdef CONFIG_X86
273 		emulate = false;
274 #else
275 		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
276 			printf("BIOS native execution is only available on x86\n");
277 			ret = -ENOSYS;
278 			goto err;
279 		}
280 		emulate = true;
281 #endif
282 	} else {
283 #ifdef CONFIG_BIOSEMU
284 		emulate = true;
285 #else
286 		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
287 			printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
288 			ret = -ENOSYS;
289 			goto err;
290 		}
291 		emulate = false;
292 #endif
293 	}
294 
295 	if (emulate) {
296 #ifdef CONFIG_BIOSEMU
297 		BE_VGAInfo *info;
298 
299 		ret = biosemu_setup(dev, &info);
300 		if (ret)
301 			goto err;
302 		biosemu_set_interrupt_handler(0x15, int15_handler);
303 		ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
304 				  true, vesa_mode, &mode_info);
305 		if (ret)
306 			goto err;
307 #endif
308 	} else {
309 #if defined(CONFIG_X86) && CONFIG_IS_ENABLED(X86_32BIT_INIT)
310 		bios_set_interrupt_handler(0x15, int15_handler);
311 
312 		bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
313 				&mode_info);
314 #endif
315 	}
316 	debug("Final vesa mode %#x\n", mode_info.video_mode);
317 	ret = 0;
318 
319 err:
320 	if (alloced)
321 		free(ram);
322 	return ret;
323 }
324 
325 #ifdef CONFIG_DM_VIDEO
326 int vbe_setup_video_priv(struct vesa_mode_info *vesa,
327 			 struct video_priv *uc_priv,
328 			 struct video_uc_platdata *plat)
329 {
330 	if (!vesa->x_resolution)
331 		return log_msg_ret("No x resolution", -ENXIO);
332 	uc_priv->xsize = vesa->x_resolution;
333 	uc_priv->ysize = vesa->y_resolution;
334 	uc_priv->line_length = vesa->bytes_per_scanline;
335 	switch (vesa->bits_per_pixel) {
336 	case 32:
337 	case 24:
338 		uc_priv->bpix = VIDEO_BPP32;
339 		break;
340 	case 16:
341 		uc_priv->bpix = VIDEO_BPP16;
342 		break;
343 	default:
344 		return -EPROTONOSUPPORT;
345 	}
346 	plat->base = vesa->phys_base_ptr;
347 	plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
348 
349 	return 0;
350 }
351 
352 int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
353 {
354 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
355 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
356 	int ret;
357 
358 	/* If we are running from EFI or coreboot, this can't work */
359 	if (!ll_boot_init()) {
360 		printf("Not available (previous bootloader prevents it)\n");
361 		return -EPERM;
362 	}
363 	bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
364 	ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
365 					PCI_ROM_ALLOW_FALLBACK);
366 	bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
367 	if (ret) {
368 		debug("failed to run video BIOS: %d\n", ret);
369 		return ret;
370 	}
371 
372 	ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
373 	if (ret) {
374 		debug("No video mode configured\n");
375 		return ret;
376 	}
377 
378 	printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
379 	       mode_info.vesa.bits_per_pixel);
380 
381 	return 0;
382 }
383 #endif
384