1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2baf37f06SPaul Burton /*
3baf37f06SPaul Burton * Copyright (C) 2013 Imagination Technologies
4c5bf161fSPaul Burton * Author: Paul Burton <paul.burton@mips.com>
5baf37f06SPaul Burton */
6baf37f06SPaul Burton
7baf37f06SPaul Burton #include <common.h>
8baf37f06SPaul Burton #include <msc01.h>
9baf37f06SPaul Burton #include <pci.h>
10baf37f06SPaul Burton #include <pci_msc01.h>
11baf37f06SPaul Burton #include <asm/io.h>
12baf37f06SPaul Burton
13baf37f06SPaul Burton #define PCI_ACCESS_READ 0
14baf37f06SPaul Burton #define PCI_ACCESS_WRITE 1
15baf37f06SPaul Burton
16baf37f06SPaul Burton struct msc01_pci_controller {
17baf37f06SPaul Burton struct pci_controller hose;
18baf37f06SPaul Burton void *base;
19baf37f06SPaul Burton };
20baf37f06SPaul Burton
21baf37f06SPaul Burton static inline struct msc01_pci_controller *
hose_to_msc01(struct pci_controller * hose)22baf37f06SPaul Burton hose_to_msc01(struct pci_controller *hose)
23baf37f06SPaul Burton {
24baf37f06SPaul Burton return container_of(hose, struct msc01_pci_controller, hose);
25baf37f06SPaul Burton }
26baf37f06SPaul Burton
msc01_config_access(struct msc01_pci_controller * msc01,unsigned char access_type,pci_dev_t bdf,int where,u32 * data)27baf37f06SPaul Burton static int msc01_config_access(struct msc01_pci_controller *msc01,
28baf37f06SPaul Burton unsigned char access_type, pci_dev_t bdf,
29baf37f06SPaul Burton int where, u32 *data)
30baf37f06SPaul Burton {
31baf37f06SPaul Burton const u32 aborts = MSC01_PCI_INTSTAT_MA_MSK | MSC01_PCI_INTSTAT_TA_MSK;
32baf37f06SPaul Burton void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS;
33baf37f06SPaul Burton void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS;
34baf37f06SPaul Burton unsigned int bus = PCI_BUS(bdf);
35baf37f06SPaul Burton unsigned int dev = PCI_DEV(bdf);
36baf37f06SPaul Burton unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
37baf37f06SPaul Burton
38baf37f06SPaul Burton /* clear abort status */
39baf37f06SPaul Burton __raw_writel(aborts, intstat);
40baf37f06SPaul Burton
41baf37f06SPaul Burton /* setup address */
42baf37f06SPaul Burton __raw_writel((bus << MSC01_PCI_CFGADDR_BNUM_SHF) |
43baf37f06SPaul Burton (dev << MSC01_PCI_CFGADDR_DNUM_SHF) |
44baf37f06SPaul Burton (devfn << MSC01_PCI_CFGADDR_FNUM_SHF) |
45baf37f06SPaul Burton ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF),
46baf37f06SPaul Burton msc01->base + MSC01_PCI_CFGADDR_OFS);
47baf37f06SPaul Burton
48baf37f06SPaul Burton /* perform access */
49baf37f06SPaul Burton if (access_type == PCI_ACCESS_WRITE)
50baf37f06SPaul Burton __raw_writel(*data, cfgdata);
51baf37f06SPaul Burton else
52baf37f06SPaul Burton *data = __raw_readl(cfgdata);
53baf37f06SPaul Burton
54baf37f06SPaul Burton /* check for aborts */
55baf37f06SPaul Burton if (__raw_readl(intstat) & aborts) {
56baf37f06SPaul Burton /* clear abort status */
57baf37f06SPaul Burton __raw_writel(aborts, intstat);
58baf37f06SPaul Burton return -1;
59baf37f06SPaul Burton }
60baf37f06SPaul Burton
61baf37f06SPaul Burton return 0;
62baf37f06SPaul Burton }
63baf37f06SPaul Burton
msc01_read_config_dword(struct pci_controller * hose,pci_dev_t dev,int where,u32 * value)64baf37f06SPaul Burton static int msc01_read_config_dword(struct pci_controller *hose, pci_dev_t dev,
65baf37f06SPaul Burton int where, u32 *value)
66baf37f06SPaul Burton {
67baf37f06SPaul Burton struct msc01_pci_controller *msc01 = hose_to_msc01(hose);
68baf37f06SPaul Burton
69baf37f06SPaul Burton *value = 0xffffffff;
70baf37f06SPaul Burton return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value);
71baf37f06SPaul Burton }
72baf37f06SPaul Burton
msc01_write_config_dword(struct pci_controller * hose,pci_dev_t dev,int where,u32 value)73baf37f06SPaul Burton static int msc01_write_config_dword(struct pci_controller *hose, pci_dev_t dev,
74baf37f06SPaul Burton int where, u32 value)
75baf37f06SPaul Burton {
76baf37f06SPaul Burton struct msc01_pci_controller *gt = hose_to_msc01(hose);
77baf37f06SPaul Burton u32 data = value;
78baf37f06SPaul Burton
79baf37f06SPaul Burton return msc01_config_access(gt, PCI_ACCESS_WRITE, dev, where, &data);
80baf37f06SPaul Burton }
81baf37f06SPaul Burton
msc01_pci_init(void * base,unsigned long sys_bus,unsigned long sys_phys,unsigned long sys_size,unsigned long mem_bus,unsigned long mem_phys,unsigned long mem_size,unsigned long io_bus,unsigned long io_phys,unsigned long io_size)82baf37f06SPaul Burton void msc01_pci_init(void *base, unsigned long sys_bus, unsigned long sys_phys,
83baf37f06SPaul Burton unsigned long sys_size, unsigned long mem_bus,
84baf37f06SPaul Burton unsigned long mem_phys, unsigned long mem_size,
85baf37f06SPaul Burton unsigned long io_bus, unsigned long io_phys,
86baf37f06SPaul Burton unsigned long io_size)
87baf37f06SPaul Burton {
88baf37f06SPaul Burton static struct msc01_pci_controller global_msc01;
89baf37f06SPaul Burton struct msc01_pci_controller *msc01;
90baf37f06SPaul Burton struct pci_controller *hose;
91baf37f06SPaul Burton
92baf37f06SPaul Burton msc01 = &global_msc01;
93baf37f06SPaul Burton msc01->base = base;
94baf37f06SPaul Burton
95baf37f06SPaul Burton hose = &msc01->hose;
96baf37f06SPaul Burton
97baf37f06SPaul Burton hose->first_busno = 0;
98baf37f06SPaul Burton hose->last_busno = 0;
99baf37f06SPaul Burton
100baf37f06SPaul Burton /* System memory space */
101baf37f06SPaul Burton pci_set_region(&hose->regions[0], sys_bus, sys_phys, sys_size,
102baf37f06SPaul Burton PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
103baf37f06SPaul Burton
104baf37f06SPaul Burton /* PCI memory space */
105baf37f06SPaul Burton pci_set_region(&hose->regions[1], mem_bus, mem_phys, mem_size,
106baf37f06SPaul Burton PCI_REGION_MEM);
107baf37f06SPaul Burton
108baf37f06SPaul Burton /* PCI I/O space */
109baf37f06SPaul Burton pci_set_region(&hose->regions[2], io_bus, io_phys, io_size,
110baf37f06SPaul Burton PCI_REGION_IO);
111baf37f06SPaul Burton
112baf37f06SPaul Burton hose->region_count = 3;
113baf37f06SPaul Burton
114baf37f06SPaul Burton pci_set_ops(hose,
115baf37f06SPaul Burton pci_hose_read_config_byte_via_dword,
116baf37f06SPaul Burton pci_hose_read_config_word_via_dword,
117baf37f06SPaul Burton msc01_read_config_dword,
118baf37f06SPaul Burton pci_hose_write_config_byte_via_dword,
119baf37f06SPaul Burton pci_hose_write_config_word_via_dword,
120baf37f06SPaul Burton msc01_write_config_dword);
121baf37f06SPaul Burton
122baf37f06SPaul Burton pci_register_hose(hose);
123baf37f06SPaul Burton hose->last_busno = pci_hose_scan(hose);
124baf37f06SPaul Burton }
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