1 /* 2 * Vitesse 7385 Switch Firmware Upload 3 * 4 * Author: Timur Tabi <timur@freescale.com> 5 * 6 * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed 7 * under the terms of the GNU General Public License version 2. This 8 * program is licensed "as is" without any warranty of any kind, whether 9 * express or implied. 10 * 11 * This module uploads proprietary firmware for the Vitesse VSC7385 5-port 12 * switch. 13 */ 14 15 #include <config.h> 16 17 #ifdef CONFIG_VSC7385_ENET 18 19 #include <common.h> 20 #include <asm/io.h> 21 #include <asm/errno.h> 22 23 /* 24 * Upload a Vitesse VSC7385 firmware image to the hardware 25 * 26 * This function takes a pointer to a VSC7385 firmware image and a size, and 27 * uploads that firmware to the VSC7385. 28 * 29 * This firmware is typically located at a board-specific flash address, 30 * and the size is typically 8KB. 31 * 32 * The firmware is Vitesse proprietary. 33 * 34 * Further details on the register information can be obtained from Vitesse. 35 */ 36 int vsc7385_upload_firmware(void *firmware, unsigned int size) 37 { 38 u8 *fw = firmware; 39 unsigned int i; 40 41 u32 *gloreset = (u32 *) (CFG_VSC7385_BASE + 0x1c050); 42 u32 *icpu_ctrl = (u32 *) (CFG_VSC7385_BASE + 0x1c040); 43 u32 *icpu_addr = (u32 *) (CFG_VSC7385_BASE + 0x1c044); 44 u32 *icpu_data = (u32 *) (CFG_VSC7385_BASE + 0x1c048); 45 u32 *icpu_rom_map = (u32 *) (CFG_VSC7385_BASE + 0x1c070); 46 #ifdef DEBUG 47 u32 *chipid = (u32 *) (CFG_VSC7385_BASE + 0x1c060); 48 #endif 49 50 out_be32(gloreset, 3); 51 udelay(200); 52 53 out_be32(icpu_ctrl, 0x8E); 54 udelay(20); 55 56 out_be32(icpu_rom_map, 1); 57 udelay(20); 58 59 /* Write the firmware to I-RAM */ 60 out_be32(icpu_addr, 0); 61 udelay(20); 62 63 for (i = 0; i < size; i++) { 64 out_be32(icpu_data, fw[i]); 65 udelay(20); 66 if (ctrlc()) 67 return -EINTR; 68 } 69 70 /* Read back and compare */ 71 out_be32(icpu_addr, 0); 72 udelay(20); 73 74 for (i = 0; i < size; i++) { 75 u8 value; 76 77 value = (u8) in_be32(icpu_data); 78 udelay(20); 79 if (value != fw[i]) { 80 debug("VSC7385: Upload mismatch: address 0x%x, " 81 "read value 0x%x, image value 0x%x\n", 82 i, value, fw[i]); 83 84 return -EIO; 85 } 86 if (ctrlc()) 87 break; 88 } 89 90 out_be32(icpu_ctrl, 0x0B); 91 udelay(20); 92 93 #ifdef DEBUG 94 printf("VSC7385: Chip ID is %08x\n", in_be32(chipid)); 95 udelay(20); 96 #endif 97 98 return 0; 99 } 100 101 #endif 102