1 /* 2 * Vitesse 7385 Switch Firmware Upload 3 * 4 * Author: Timur Tabi <timur@freescale.com> 5 * 6 * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed 7 * under the terms of the GNU General Public License version 2. This 8 * program is licensed "as is" without any warranty of any kind, whether 9 * express or implied. 10 * 11 * This module uploads proprietary firmware for the Vitesse VSC7385 5-port 12 * switch. 13 */ 14 15 #include <config.h> 16 #include <common.h> 17 #include <console.h> 18 #include <asm/io.h> 19 #include <asm/errno.h> 20 #include "vsc7385.h" 21 22 /* 23 * Upload a Vitesse VSC7385 firmware image to the hardware 24 * 25 * This function takes a pointer to a VSC7385 firmware image and a size, and 26 * uploads that firmware to the VSC7385. 27 * 28 * This firmware is typically located at a board-specific flash address, 29 * and the size is typically 8KB. 30 * 31 * The firmware is Vitesse proprietary. 32 * 33 * Further details on the register information can be obtained from Vitesse. 34 */ 35 int vsc7385_upload_firmware(void *firmware, unsigned int size) 36 { 37 u8 *fw = firmware; 38 unsigned int i; 39 40 u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050); 41 u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040); 42 u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044); 43 u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048); 44 u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070); 45 #ifdef DEBUG 46 u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060); 47 #endif 48 49 out_be32(gloreset, 3); 50 udelay(200); 51 52 out_be32(icpu_ctrl, 0x8E); 53 udelay(20); 54 55 out_be32(icpu_rom_map, 1); 56 udelay(20); 57 58 /* Write the firmware to I-RAM */ 59 out_be32(icpu_addr, 0); 60 udelay(20); 61 62 for (i = 0; i < size; i++) { 63 out_be32(icpu_data, fw[i]); 64 udelay(20); 65 if (ctrlc()) 66 return -EINTR; 67 } 68 69 /* Read back and compare */ 70 out_be32(icpu_addr, 0); 71 udelay(20); 72 73 for (i = 0; i < size; i++) { 74 u8 value; 75 76 value = (u8) in_be32(icpu_data); 77 udelay(20); 78 if (value != fw[i]) { 79 debug("VSC7385: Upload mismatch: address 0x%x, " 80 "read value 0x%x, image value 0x%x\n", 81 i, value, fw[i]); 82 83 return -EIO; 84 } 85 if (ctrlc()) 86 break; 87 } 88 89 out_be32(icpu_ctrl, 0x0B); 90 udelay(20); 91 92 #ifdef DEBUG 93 printf("VSC7385: Chip ID is %08x\n", in_be32(chipid)); 94 udelay(20); 95 #endif 96 97 return 0; 98 } 99