1 /* 2 * Teranetics PHY drivers 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 * 19 * Copyright 2010-2011 Freescale Semiconductor, Inc. 20 * author Andy Fleming 21 * 22 */ 23 #include <config.h> 24 #include <common.h> 25 #include <phy.h> 26 27 #ifndef CONFIG_PHYLIB_10G 28 #error The Teranetics PHY needs 10G support 29 #endif 30 31 int tn2020_config(struct phy_device *phydev) 32 { 33 if (phydev->port == PORT_FIBRE) { 34 unsigned short restart_an = (MDIO_AN_CTRL1_RESTART | 35 MDIO_AN_CTRL1_ENABLE | 36 MDIO_AN_CTRL1_XNP); 37 u8 phy_hwversion; 38 39 /* 40 * bit 15:12 of register 30.32 indicates PHY hardware 41 * version. It can be used to distinguish TN80xx from 42 * TN2020. TN2020 needs write 0x2 to 30.93, but TN80xx 43 * needs 0x1. 44 */ 45 phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf; 46 if (phy_hwversion <= 3) { 47 phy_write(phydev, 30, 93, 2); 48 phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an); 49 } else { 50 phy_write(phydev, 30, 93, 1); 51 } 52 } 53 54 return 0; 55 } 56 57 int tn2020_startup(struct phy_device *phydev) 58 { 59 unsigned int timeout = 5 * 1000; /* 5 second timeout */ 60 61 #define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \ 62 MDIO_PHYXS_LNSTAT_SYNC1 | \ 63 MDIO_PHYXS_LNSTAT_SYNC2 | \ 64 MDIO_PHYXS_LNSTAT_SYNC3 | \ 65 MDIO_PHYXS_LNSTAT_ALIGN) 66 67 /* 68 * Wait for the XAUI-SERDES lanes to align first. Under normal 69 * circumstances, this can take up to three seconds. 70 */ 71 while (--timeout) { 72 int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); 73 if (reg < 0) { 74 printf("TN2020: Error reading from PHY at " 75 "address %u\n", phydev->addr); 76 break; 77 } 78 if ((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY) 79 break; 80 udelay(1000); 81 } 82 if (!timeout) { 83 /* 84 * A timeout is bad, but it may not be fatal, so don't 85 * return an error. Display a warning instead. 86 */ 87 printf("TN2020: Timeout waiting for PHY at address %u to " 88 "align.\n", phydev->addr); 89 } 90 91 if (phydev->port != PORT_FIBRE) 92 return gen10g_startup(phydev); 93 94 /* 95 * The TN2020 only pretends to support fiber. 96 * It works, but it doesn't look like it works, 97 * so the link status reports no link. 98 */ 99 phydev->link = 1; 100 101 /* For now just lie and say it's 10G all the time */ 102 phydev->speed = SPEED_10000; 103 phydev->duplex = DUPLEX_FULL; 104 105 return 0; 106 } 107 108 struct phy_driver tn2020_driver = { 109 .name = "Teranetics TN2020", 110 .uid = PHY_UID_TN2020, 111 .mask = 0xfffffff0, 112 .features = PHY_10G_FEATURES, 113 .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | 114 MDIO_DEVS_PHYXS | MDIO_DEVS_AN | 115 MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2), 116 .config = &tn2020_config, 117 .startup = &tn2020_startup, 118 .shutdown = &gen10g_shutdown, 119 }; 120 121 int phy_teranetics_init(void) 122 { 123 phy_register(&tn2020_driver); 124 125 return 0; 126 } 127