xref: /openbmc/u-boot/drivers/net/phy/phy.c (revision f13606b7)
1 /*
2  * Generic PHY Management code
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  * Copyright 2011 Freescale Semiconductor, Inc.
7  * author Andy Fleming
8  *
9  * Based loosely off of Linux's PHY Lib
10  */
11 
12 #include <config.h>
13 #include <common.h>
14 #include <malloc.h>
15 #include <net.h>
16 #include <command.h>
17 #include <miiphy.h>
18 #include <phy.h>
19 #include <errno.h>
20 #include <linux/err.h>
21 #include <linux/compiler.h>
22 
23 /* Generic PHY support and helper functions */
24 
25 /**
26  * genphy_config_advert - sanitize and advertise auto-negotation parameters
27  * @phydev: target phy_device struct
28  *
29  * Description: Writes MII_ADVERTISE with the appropriate values,
30  *   after sanitizing the values to make sure we only advertise
31  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
32  *   hasn't changed, and > 0 if it has changed.
33  */
34 static int genphy_config_advert(struct phy_device *phydev)
35 {
36 	u32 advertise;
37 	int oldadv, adv;
38 	int err, changed = 0;
39 
40 	/* Only allow advertising what
41 	 * this PHY supports */
42 	phydev->advertising &= phydev->supported;
43 	advertise = phydev->advertising;
44 
45 	/* Setup standard advertisement */
46 	oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
47 
48 	if (adv < 0)
49 		return adv;
50 
51 	adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
52 		 ADVERTISE_PAUSE_ASYM);
53 	if (advertise & ADVERTISED_10baseT_Half)
54 		adv |= ADVERTISE_10HALF;
55 	if (advertise & ADVERTISED_10baseT_Full)
56 		adv |= ADVERTISE_10FULL;
57 	if (advertise & ADVERTISED_100baseT_Half)
58 		adv |= ADVERTISE_100HALF;
59 	if (advertise & ADVERTISED_100baseT_Full)
60 		adv |= ADVERTISE_100FULL;
61 	if (advertise & ADVERTISED_Pause)
62 		adv |= ADVERTISE_PAUSE_CAP;
63 	if (advertise & ADVERTISED_Asym_Pause)
64 		adv |= ADVERTISE_PAUSE_ASYM;
65 	if (advertise & ADVERTISED_1000baseX_Half)
66 		adv |= ADVERTISE_1000XHALF;
67 	if (advertise & ADVERTISED_1000baseX_Full)
68 		adv |= ADVERTISE_1000XFULL;
69 
70 	if (adv != oldadv) {
71 		err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
72 
73 		if (err < 0)
74 			return err;
75 		changed = 1;
76 	}
77 
78 	/* Configure gigabit if it's supported */
79 	if (phydev->supported & (SUPPORTED_1000baseT_Half |
80 				SUPPORTED_1000baseT_Full)) {
81 		oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
82 
83 		if (adv < 0)
84 			return adv;
85 
86 		adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
87 		if (advertise & SUPPORTED_1000baseT_Half)
88 			adv |= ADVERTISE_1000HALF;
89 		if (advertise & SUPPORTED_1000baseT_Full)
90 			adv |= ADVERTISE_1000FULL;
91 
92 		if (adv != oldadv) {
93 			err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
94 					adv);
95 
96 			if (err < 0)
97 				return err;
98 			changed = 1;
99 		}
100 	}
101 
102 	return changed;
103 }
104 
105 
106 /**
107  * genphy_setup_forced - configures/forces speed/duplex from @phydev
108  * @phydev: target phy_device struct
109  *
110  * Description: Configures MII_BMCR to force speed/duplex
111  *   to the values in phydev. Assumes that the values are valid.
112  */
113 static int genphy_setup_forced(struct phy_device *phydev)
114 {
115 	int err;
116 	int ctl = 0;
117 
118 	phydev->pause = phydev->asym_pause = 0;
119 
120 	if (SPEED_1000 == phydev->speed)
121 		ctl |= BMCR_SPEED1000;
122 	else if (SPEED_100 == phydev->speed)
123 		ctl |= BMCR_SPEED100;
124 
125 	if (DUPLEX_FULL == phydev->duplex)
126 		ctl |= BMCR_FULLDPLX;
127 
128 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
129 
130 	return err;
131 }
132 
133 
134 /**
135  * genphy_restart_aneg - Enable and Restart Autonegotiation
136  * @phydev: target phy_device struct
137  */
138 int genphy_restart_aneg(struct phy_device *phydev)
139 {
140 	int ctl;
141 
142 	ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
143 
144 	if (ctl < 0)
145 		return ctl;
146 
147 	ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
148 
149 	/* Don't isolate the PHY if we're negotiating */
150 	ctl &= ~(BMCR_ISOLATE);
151 
152 	ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
153 
154 	return ctl;
155 }
156 
157 
158 /**
159  * genphy_config_aneg - restart auto-negotiation or write BMCR
160  * @phydev: target phy_device struct
161  *
162  * Description: If auto-negotiation is enabled, we configure the
163  *   advertising, and then restart auto-negotiation.  If it is not
164  *   enabled, then we write the BMCR.
165  */
166 int genphy_config_aneg(struct phy_device *phydev)
167 {
168 	int result;
169 
170 	if (AUTONEG_ENABLE != phydev->autoneg)
171 		return genphy_setup_forced(phydev);
172 
173 	result = genphy_config_advert(phydev);
174 
175 	if (result < 0) /* error */
176 		return result;
177 
178 	if (result == 0) {
179 		/* Advertisment hasn't changed, but maybe aneg was never on to
180 		 * begin with?  Or maybe phy was isolated? */
181 		int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
182 
183 		if (ctl < 0)
184 			return ctl;
185 
186 		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
187 			result = 1; /* do restart aneg */
188 	}
189 
190 	/* Only restart aneg if we are advertising something different
191 	 * than we were before.	 */
192 	if (result > 0)
193 		result = genphy_restart_aneg(phydev);
194 
195 	return result;
196 }
197 
198 /**
199  * genphy_update_link - update link status in @phydev
200  * @phydev: target phy_device struct
201  *
202  * Description: Update the value in phydev->link to reflect the
203  *   current link value.  In order to do this, we need to read
204  *   the status register twice, keeping the second value.
205  */
206 int genphy_update_link(struct phy_device *phydev)
207 {
208 	unsigned int mii_reg;
209 
210 	/*
211 	 * Wait if the link is up, and autonegotiation is in progress
212 	 * (ie - we're capable and it's not done)
213 	 */
214 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
215 
216 	/*
217 	 * If we already saw the link up, and it hasn't gone down, then
218 	 * we don't need to wait for autoneg again
219 	 */
220 	if (phydev->link && mii_reg & BMSR_LSTATUS)
221 		return 0;
222 
223 	if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
224 		int i = 0;
225 
226 		printf("%s Waiting for PHY auto negotiation to complete",
227 			phydev->dev->name);
228 		while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
229 			/*
230 			 * Timeout reached ?
231 			 */
232 			if (i > PHY_ANEG_TIMEOUT) {
233 				printf(" TIMEOUT !\n");
234 				phydev->link = 0;
235 				return 0;
236 			}
237 
238 			if (ctrlc()) {
239 				puts("user interrupt!\n");
240 				phydev->link = 0;
241 				return -EINTR;
242 			}
243 
244 			if ((i++ % 500) == 0)
245 				printf(".");
246 
247 			udelay(1000);	/* 1 ms */
248 			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
249 		}
250 		printf(" done\n");
251 		phydev->link = 1;
252 	} else {
253 		/* Read the link a second time to clear the latched state */
254 		mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
255 
256 		if (mii_reg & BMSR_LSTATUS)
257 			phydev->link = 1;
258 		else
259 			phydev->link = 0;
260 	}
261 
262 	return 0;
263 }
264 
265 /*
266  * Generic function which updates the speed and duplex.  If
267  * autonegotiation is enabled, it uses the AND of the link
268  * partner's advertised capabilities and our advertised
269  * capabilities.  If autonegotiation is disabled, we use the
270  * appropriate bits in the control register.
271  *
272  * Stolen from Linux's mii.c and phy_device.c
273  */
274 int genphy_parse_link(struct phy_device *phydev)
275 {
276 	int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
277 
278 	/* We're using autonegotiation */
279 	if (phydev->supported & SUPPORTED_Autoneg) {
280 		u32 lpa = 0;
281 		int gblpa = 0;
282 		u32 estatus = 0;
283 
284 		/* Check for gigabit capability */
285 		if (phydev->supported & (SUPPORTED_1000baseT_Full |
286 					SUPPORTED_1000baseT_Half)) {
287 			/* We want a list of states supported by
288 			 * both PHYs in the link
289 			 */
290 			gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
291 			if (gblpa < 0) {
292 				debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
293 				gblpa = 0;
294 			}
295 			gblpa &= phy_read(phydev,
296 					MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
297 		}
298 
299 		/* Set the baseline so we only have to set them
300 		 * if they're different
301 		 */
302 		phydev->speed = SPEED_10;
303 		phydev->duplex = DUPLEX_HALF;
304 
305 		/* Check the gigabit fields */
306 		if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
307 			phydev->speed = SPEED_1000;
308 
309 			if (gblpa & PHY_1000BTSR_1000FD)
310 				phydev->duplex = DUPLEX_FULL;
311 
312 			/* We're done! */
313 			return 0;
314 		}
315 
316 		lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
317 		lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
318 
319 		if (lpa & (LPA_100FULL | LPA_100HALF)) {
320 			phydev->speed = SPEED_100;
321 
322 			if (lpa & LPA_100FULL)
323 				phydev->duplex = DUPLEX_FULL;
324 
325 		} else if (lpa & LPA_10FULL)
326 			phydev->duplex = DUPLEX_FULL;
327 
328 		/*
329 		 * Extended status may indicate that the PHY supports
330 		 * 1000BASE-T/X even though the 1000BASE-T registers
331 		 * are missing. In this case we can't tell whether the
332 		 * peer also supports it, so we only check extended
333 		 * status if the 1000BASE-T registers are actually
334 		 * missing.
335 		 */
336 		if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
337 			estatus = phy_read(phydev, MDIO_DEVAD_NONE,
338 					   MII_ESTATUS);
339 
340 		if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
341 				ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
342 			phydev->speed = SPEED_1000;
343 			if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
344 				phydev->duplex = DUPLEX_FULL;
345 		}
346 
347 	} else {
348 		u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
349 
350 		phydev->speed = SPEED_10;
351 		phydev->duplex = DUPLEX_HALF;
352 
353 		if (bmcr & BMCR_FULLDPLX)
354 			phydev->duplex = DUPLEX_FULL;
355 
356 		if (bmcr & BMCR_SPEED1000)
357 			phydev->speed = SPEED_1000;
358 		else if (bmcr & BMCR_SPEED100)
359 			phydev->speed = SPEED_100;
360 	}
361 
362 	return 0;
363 }
364 
365 int genphy_config(struct phy_device *phydev)
366 {
367 	int val;
368 	u32 features;
369 
370 	/* For now, I'll claim that the generic driver supports
371 	 * all possible port types */
372 	features = (SUPPORTED_TP | SUPPORTED_MII
373 			| SUPPORTED_AUI | SUPPORTED_FIBRE |
374 			SUPPORTED_BNC);
375 
376 	/* Do we support autonegotiation? */
377 	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
378 
379 	if (val < 0)
380 		return val;
381 
382 	if (val & BMSR_ANEGCAPABLE)
383 		features |= SUPPORTED_Autoneg;
384 
385 	if (val & BMSR_100FULL)
386 		features |= SUPPORTED_100baseT_Full;
387 	if (val & BMSR_100HALF)
388 		features |= SUPPORTED_100baseT_Half;
389 	if (val & BMSR_10FULL)
390 		features |= SUPPORTED_10baseT_Full;
391 	if (val & BMSR_10HALF)
392 		features |= SUPPORTED_10baseT_Half;
393 
394 	if (val & BMSR_ESTATEN) {
395 		val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
396 
397 		if (val < 0)
398 			return val;
399 
400 		if (val & ESTATUS_1000_TFULL)
401 			features |= SUPPORTED_1000baseT_Full;
402 		if (val & ESTATUS_1000_THALF)
403 			features |= SUPPORTED_1000baseT_Half;
404 		if (val & ESTATUS_1000_XFULL)
405 			features |= SUPPORTED_1000baseX_Full;
406 		if (val & ESTATUS_1000_XHALF)
407 			features |= SUPPORTED_1000baseX_Half;
408 	}
409 
410 	phydev->supported = features;
411 	phydev->advertising = features;
412 
413 	genphy_config_aneg(phydev);
414 
415 	return 0;
416 }
417 
418 int genphy_startup(struct phy_device *phydev)
419 {
420 	genphy_update_link(phydev);
421 	genphy_parse_link(phydev);
422 
423 	return 0;
424 }
425 
426 int genphy_shutdown(struct phy_device *phydev)
427 {
428 	return 0;
429 }
430 
431 static struct phy_driver genphy_driver = {
432 	.uid		= 0xffffffff,
433 	.mask		= 0xffffffff,
434 	.name		= "Generic PHY",
435 	.features	= 0,
436 	.config		= genphy_config,
437 	.startup	= genphy_startup,
438 	.shutdown	= genphy_shutdown,
439 };
440 
441 static LIST_HEAD(phy_drivers);
442 
443 int phy_init(void)
444 {
445 #ifdef CONFIG_PHY_AQUANTIA
446 	phy_aquantia_init();
447 #endif
448 #ifdef CONFIG_PHY_ATHEROS
449 	phy_atheros_init();
450 #endif
451 #ifdef CONFIG_PHY_BROADCOM
452 	phy_broadcom_init();
453 #endif
454 #ifdef CONFIG_PHY_CORTINA
455 	phy_cortina_init();
456 #endif
457 #ifdef CONFIG_PHY_DAVICOM
458 	phy_davicom_init();
459 #endif
460 #ifdef CONFIG_PHY_ET1011C
461 	phy_et1011c_init();
462 #endif
463 #ifdef CONFIG_PHY_LXT
464 	phy_lxt_init();
465 #endif
466 #ifdef CONFIG_PHY_MARVELL
467 	phy_marvell_init();
468 #endif
469 #ifdef CONFIG_PHY_MICREL
470 	phy_micrel_init();
471 #endif
472 #ifdef CONFIG_PHY_NATSEMI
473 	phy_natsemi_init();
474 #endif
475 #ifdef CONFIG_PHY_REALTEK
476 	phy_realtek_init();
477 #endif
478 #ifdef CONFIG_PHY_SMSC
479 	phy_smsc_init();
480 #endif
481 #ifdef CONFIG_PHY_TERANETICS
482 	phy_teranetics_init();
483 #endif
484 #ifdef CONFIG_PHY_VITESSE
485 	phy_vitesse_init();
486 #endif
487 
488 	return 0;
489 }
490 
491 int phy_register(struct phy_driver *drv)
492 {
493 	INIT_LIST_HEAD(&drv->list);
494 	list_add_tail(&drv->list, &phy_drivers);
495 
496 	return 0;
497 }
498 
499 static int phy_probe(struct phy_device *phydev)
500 {
501 	int err = 0;
502 
503 	phydev->advertising = phydev->supported = phydev->drv->features;
504 	phydev->mmds = phydev->drv->mmds;
505 
506 	if (phydev->drv->probe)
507 		err = phydev->drv->probe(phydev);
508 
509 	return err;
510 }
511 
512 static struct phy_driver *generic_for_interface(phy_interface_t interface)
513 {
514 #ifdef CONFIG_PHYLIB_10G
515 	if (is_10g_interface(interface))
516 		return &gen10g_driver;
517 #endif
518 
519 	return &genphy_driver;
520 }
521 
522 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
523 				phy_interface_t interface)
524 {
525 	struct list_head *entry;
526 	int phy_id = phydev->phy_id;
527 	struct phy_driver *drv = NULL;
528 
529 	list_for_each(entry, &phy_drivers) {
530 		drv = list_entry(entry, struct phy_driver, list);
531 		if ((drv->uid & drv->mask) == (phy_id & drv->mask))
532 			return drv;
533 	}
534 
535 	/* If we made it here, there's no driver for this PHY */
536 	return generic_for_interface(interface);
537 }
538 
539 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
540 					    int phy_id,
541 					    phy_interface_t interface)
542 {
543 	struct phy_device *dev;
544 
545 	/* We allocate the device, and initialize the
546 	 * default values */
547 	dev = malloc(sizeof(*dev));
548 	if (!dev) {
549 		printf("Failed to allocate PHY device for %s:%d\n",
550 			bus->name, addr);
551 		return NULL;
552 	}
553 
554 	memset(dev, 0, sizeof(*dev));
555 
556 	dev->duplex = -1;
557 	dev->link = 1;
558 	dev->interface = interface;
559 
560 	dev->autoneg = AUTONEG_ENABLE;
561 
562 	dev->addr = addr;
563 	dev->phy_id = phy_id;
564 	dev->bus = bus;
565 
566 	dev->drv = get_phy_driver(dev, interface);
567 
568 	phy_probe(dev);
569 
570 	bus->phymap[addr] = dev;
571 
572 	return dev;
573 }
574 
575 /**
576  * get_phy_id - reads the specified addr for its ID.
577  * @bus: the target MII bus
578  * @addr: PHY address on the MII bus
579  * @phy_id: where to store the ID retrieved.
580  *
581  * Description: Reads the ID registers of the PHY at @addr on the
582  *   @bus, stores it in @phy_id and returns zero on success.
583  */
584 static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
585 {
586 	int phy_reg;
587 
588 	/* Grab the bits from PHYIR1, and put them
589 	 * in the upper half */
590 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
591 
592 	if (phy_reg < 0)
593 		return -EIO;
594 
595 	*phy_id = (phy_reg & 0xffff) << 16;
596 
597 	/* Grab the bits from PHYIR2, and put them in the lower half */
598 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
599 
600 	if (phy_reg < 0)
601 		return -EIO;
602 
603 	*phy_id |= (phy_reg & 0xffff);
604 
605 	return 0;
606 }
607 
608 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
609 		unsigned phy_mask, int devad, phy_interface_t interface)
610 {
611 	u32 phy_id = 0xffffffff;
612 	while (phy_mask) {
613 		int addr = ffs(phy_mask) - 1;
614 		int r = get_phy_id(bus, addr, devad, &phy_id);
615 		/* If the PHY ID is mostly f's, we didn't find anything */
616 		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
617 			return phy_device_create(bus, addr, phy_id, interface);
618 		phy_mask &= ~(1 << addr);
619 	}
620 	return NULL;
621 }
622 
623 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
624 		unsigned phy_mask, phy_interface_t interface)
625 {
626 	/* If we have one, return the existing device, with new interface */
627 	while (phy_mask) {
628 		int addr = ffs(phy_mask) - 1;
629 		if (bus->phymap[addr]) {
630 			bus->phymap[addr]->interface = interface;
631 			return bus->phymap[addr];
632 		}
633 		phy_mask &= ~(1 << addr);
634 	}
635 	return NULL;
636 }
637 
638 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
639 		unsigned phy_mask, phy_interface_t interface)
640 {
641 	int i;
642 	struct phy_device *phydev;
643 
644 	phydev = search_for_existing_phy(bus, phy_mask, interface);
645 	if (phydev)
646 		return phydev;
647 	/* Try Standard (ie Clause 22) access */
648 	/* Otherwise we have to try Clause 45 */
649 	for (i = 0; i < 5; i++) {
650 		phydev = create_phy_by_mask(bus, phy_mask,
651 				i ? i : MDIO_DEVAD_NONE, interface);
652 		if (IS_ERR(phydev))
653 			return NULL;
654 		if (phydev)
655 			return phydev;
656 	}
657 	printf("Phy %d not found\n", ffs(phy_mask) - 1);
658 	return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface);
659 }
660 
661 /**
662  * get_phy_device - reads the specified PHY device and returns its @phy_device struct
663  * @bus: the target MII bus
664  * @addr: PHY address on the MII bus
665  *
666  * Description: Reads the ID registers of the PHY at @addr on the
667  *   @bus, then allocates and returns the phy_device to represent it.
668  */
669 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
670 					 phy_interface_t interface)
671 {
672 	return get_phy_device_by_mask(bus, 1 << addr, interface);
673 }
674 
675 int phy_reset(struct phy_device *phydev)
676 {
677 	int reg;
678 	int timeout = 500;
679 	int devad = MDIO_DEVAD_NONE;
680 
681 #ifdef CONFIG_PHYLIB_10G
682 	/* If it's 10G, we need to issue reset through one of the MMDs */
683 	if (is_10g_interface(phydev->interface)) {
684 		if (!phydev->mmds)
685 			gen10g_discover_mmds(phydev);
686 
687 		devad = ffs(phydev->mmds) - 1;
688 	}
689 #endif
690 
691 	reg = phy_read(phydev, devad, MII_BMCR);
692 	if (reg < 0) {
693 		debug("PHY status read failed\n");
694 		return -1;
695 	}
696 
697 	reg |= BMCR_RESET;
698 
699 	if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
700 		debug("PHY reset failed\n");
701 		return -1;
702 	}
703 
704 #ifdef CONFIG_PHY_RESET_DELAY
705 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
706 #endif
707 	/*
708 	 * Poll the control register for the reset bit to go to 0 (it is
709 	 * auto-clearing).  This should happen within 0.5 seconds per the
710 	 * IEEE spec.
711 	 */
712 	while ((reg & BMCR_RESET) && timeout--) {
713 		reg = phy_read(phydev, devad, MII_BMCR);
714 
715 		if (reg < 0) {
716 			debug("PHY status read failed\n");
717 			return -1;
718 		}
719 		udelay(1000);
720 	}
721 
722 	if (reg & BMCR_RESET) {
723 		puts("PHY reset timed out\n");
724 		return -1;
725 	}
726 
727 	return 0;
728 }
729 
730 int miiphy_reset(const char *devname, unsigned char addr)
731 {
732 	struct mii_dev *bus = miiphy_get_dev_by_name(devname);
733 	struct phy_device *phydev;
734 
735 	/*
736 	 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
737 	 * If later code tries to connect with the right interface, this will
738 	 * be corrected by get_phy_device in phy_connect()
739 	 */
740 	phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
741 
742 	return phy_reset(phydev);
743 }
744 
745 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
746 		phy_interface_t interface)
747 {
748 	/* Reset the bus */
749 	if (bus->reset)
750 		bus->reset(bus);
751 
752 	/* Wait 15ms to make sure the PHY has come out of hard reset */
753 	udelay(15000);
754 	return get_phy_device_by_mask(bus, phy_mask, interface);
755 }
756 
757 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
758 {
759 	/* Soft Reset the PHY */
760 	phy_reset(phydev);
761 	if (phydev->dev) {
762 		printf("%s:%d is connected to %s.  Reconnecting to %s\n",
763 				phydev->bus->name, phydev->addr,
764 				phydev->dev->name, dev->name);
765 	}
766 	phydev->dev = dev;
767 	debug("%s connected to %s\n", dev->name, phydev->drv->name);
768 }
769 
770 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
771 		struct eth_device *dev, phy_interface_t interface)
772 {
773 	struct phy_device *phydev;
774 
775 	phydev = phy_find_by_mask(bus, 1 << addr, interface);
776 	if (phydev)
777 		phy_connect_dev(phydev, dev);
778 	else
779 		printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
780 	return phydev;
781 }
782 
783 /*
784  * Start the PHY.  Returns 0 on success, or a negative error code.
785  */
786 int phy_startup(struct phy_device *phydev)
787 {
788 	if (phydev->drv->startup)
789 		return phydev->drv->startup(phydev);
790 
791 	return 0;
792 }
793 
794 __weak int board_phy_config(struct phy_device *phydev)
795 {
796 	if (phydev->drv->config)
797 		return phydev->drv->config(phydev);
798 	return 0;
799 }
800 
801 int phy_config(struct phy_device *phydev)
802 {
803 	/* Invoke an optional board-specific helper */
804 	board_phy_config(phydev);
805 
806 	return 0;
807 }
808 
809 int phy_shutdown(struct phy_device *phydev)
810 {
811 	if (phydev->drv->shutdown)
812 		phydev->drv->shutdown(phydev);
813 
814 	return 0;
815 }
816