xref: /openbmc/u-boot/drivers/net/phy/phy.c (revision dbb0696b)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Generic PHY Management code
4  *
5  * Copyright 2011 Freescale Semiconductor, Inc.
6  * author Andy Fleming
7  *
8  * Based loosely off of Linux's PHY Lib
9  */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <malloc.h>
14 #include <net.h>
15 #include <command.h>
16 #include <miiphy.h>
17 #include <phy.h>
18 #include <errno.h>
19 #include <linux/err.h>
20 #include <linux/compiler.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 /* Generic PHY support and helper functions */
25 
26 /**
27  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
28  * @phydev: target phy_device struct
29  *
30  * Description: Writes MII_ADVERTISE with the appropriate values,
31  *   after sanitizing the values to make sure we only advertise
32  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
33  *   hasn't changed, and > 0 if it has changed.
34  */
35 static int genphy_config_advert(struct phy_device *phydev)
36 {
37 	u32 advertise;
38 	int oldadv, adv, bmsr;
39 	int err, changed = 0;
40 
41 	/* Only allow advertising what this PHY supports */
42 	phydev->advertising &= phydev->supported;
43 	advertise = phydev->advertising;
44 
45 	/* Setup standard advertisement */
46 	adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
47 	oldadv = adv;
48 
49 	if (adv < 0)
50 		return adv;
51 
52 	adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
53 		 ADVERTISE_PAUSE_ASYM);
54 	if (advertise & ADVERTISED_10baseT_Half)
55 		adv |= ADVERTISE_10HALF;
56 	if (advertise & ADVERTISED_10baseT_Full)
57 		adv |= ADVERTISE_10FULL;
58 	if (advertise & ADVERTISED_100baseT_Half)
59 		adv |= ADVERTISE_100HALF;
60 	if (advertise & ADVERTISED_100baseT_Full)
61 		adv |= ADVERTISE_100FULL;
62 	if (advertise & ADVERTISED_Pause)
63 		adv |= ADVERTISE_PAUSE_CAP;
64 	if (advertise & ADVERTISED_Asym_Pause)
65 		adv |= ADVERTISE_PAUSE_ASYM;
66 	if (advertise & ADVERTISED_1000baseX_Half)
67 		adv |= ADVERTISE_1000XHALF;
68 	if (advertise & ADVERTISED_1000baseX_Full)
69 		adv |= ADVERTISE_1000XFULL;
70 
71 	if (adv != oldadv) {
72 		err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
73 
74 		if (err < 0)
75 			return err;
76 		changed = 1;
77 	}
78 
79 	bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
80 	if (bmsr < 0)
81 		return bmsr;
82 
83 	/* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
84 	 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
85 	 * logical 1.
86 	 */
87 	if (!(bmsr & BMSR_ESTATEN))
88 		return changed;
89 
90 	/* Configure gigabit if it's supported */
91 	adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
92 	oldadv = adv;
93 
94 	if (adv < 0)
95 		return adv;
96 
97 	adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
98 
99 	if (phydev->supported & (SUPPORTED_1000baseT_Half |
100 				SUPPORTED_1000baseT_Full)) {
101 		if (advertise & SUPPORTED_1000baseT_Half)
102 			adv |= ADVERTISE_1000HALF;
103 		if (advertise & SUPPORTED_1000baseT_Full)
104 			adv |= ADVERTISE_1000FULL;
105 	}
106 
107 	if (adv != oldadv)
108 		changed = 1;
109 
110 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
111 	if (err < 0)
112 		return err;
113 
114 	return changed;
115 }
116 
117 /**
118  * genphy_setup_forced - configures/forces speed/duplex from @phydev
119  * @phydev: target phy_device struct
120  *
121  * Description: Configures MII_BMCR to force speed/duplex
122  *   to the values in phydev. Assumes that the values are valid.
123  */
124 static int genphy_setup_forced(struct phy_device *phydev)
125 {
126 	int err;
127 	int ctl = BMCR_ANRESTART;
128 
129 	phydev->pause = 0;
130 	phydev->asym_pause = 0;
131 
132 	if (phydev->speed == SPEED_1000)
133 		ctl |= BMCR_SPEED1000;
134 	else if (phydev->speed == SPEED_100)
135 		ctl |= BMCR_SPEED100;
136 
137 	if (phydev->duplex == DUPLEX_FULL)
138 		ctl |= BMCR_FULLDPLX;
139 
140 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
141 
142 	return err;
143 }
144 
145 /**
146  * genphy_restart_aneg - Enable and Restart Autonegotiation
147  * @phydev: target phy_device struct
148  */
149 int genphy_restart_aneg(struct phy_device *phydev)
150 {
151 	int ctl;
152 
153 	ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
154 
155 	if (ctl < 0)
156 		return ctl;
157 
158 	ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
159 
160 	/* Don't isolate the PHY if we're negotiating */
161 	ctl &= ~(BMCR_ISOLATE);
162 
163 	ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
164 
165 	return ctl;
166 }
167 
168 /**
169  * genphy_config_aneg - restart auto-negotiation or write BMCR
170  * @phydev: target phy_device struct
171  *
172  * Description: If auto-negotiation is enabled, we configure the
173  *   advertising, and then restart auto-negotiation.  If it is not
174  *   enabled, then we write the BMCR.
175  */
176 int genphy_config_aneg(struct phy_device *phydev)
177 {
178 	int result;
179 
180 	if (phydev->autoneg != AUTONEG_ENABLE)
181 		return genphy_setup_forced(phydev);
182 
183 	result = genphy_config_advert(phydev);
184 
185 	if (result < 0) /* error */
186 		return result;
187 
188 	if (result == 0) {
189 		/*
190 		 * Advertisment hasn't changed, but maybe aneg was never on to
191 		 * begin with?  Or maybe phy was isolated?
192 		 */
193 		int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
194 
195 		if (ctl < 0)
196 			return ctl;
197 
198 		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
199 			result = 1; /* do restart aneg */
200 	}
201 
202 	/*
203 	 * Only restart aneg if we are advertising something different
204 	 * than we were before.
205 	 */
206 	if (result > 0)
207 		result = genphy_restart_aneg(phydev);
208 
209 	return result;
210 }
211 
212 /**
213  * genphy_update_link - update link status in @phydev
214  * @phydev: target phy_device struct
215  *
216  * Description: Update the value in phydev->link to reflect the
217  *   current link value.  In order to do this, we need to read
218  *   the status register twice, keeping the second value.
219  */
220 int genphy_update_link(struct phy_device *phydev)
221 {
222 	unsigned int mii_reg;
223 
224 	/*
225 	 * Wait if the link is up, and autonegotiation is in progress
226 	 * (ie - we're capable and it's not done)
227 	 */
228 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
229 
230 	/*
231 	 * If we already saw the link up, and it hasn't gone down, then
232 	 * we don't need to wait for autoneg again
233 	 */
234 	if (phydev->link && mii_reg & BMSR_LSTATUS)
235 		return 0;
236 
237 	if ((phydev->autoneg == AUTONEG_ENABLE) &&
238 	    !(mii_reg & BMSR_ANEGCOMPLETE)) {
239 		int i = 0;
240 
241 		printf("%s Waiting for PHY auto negotiation to complete",
242 		       phydev->dev->name);
243 		while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
244 			/*
245 			 * Timeout reached ?
246 			 */
247 			if (i > PHY_ANEG_TIMEOUT) {
248 				printf(" TIMEOUT !\n");
249 				phydev->link = 0;
250 				return -ETIMEDOUT;
251 			}
252 
253 			if (ctrlc()) {
254 				puts("user interrupt!\n");
255 				phydev->link = 0;
256 				return -EINTR;
257 			}
258 
259 			if ((i++ % 500) == 0)
260 				printf(".");
261 
262 			udelay(1000);	/* 1 ms */
263 			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
264 		}
265 		printf(" done\n");
266 		phydev->link = 1;
267 	} else {
268 		/* Read the link a second time to clear the latched state */
269 		mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
270 
271 		if (mii_reg & BMSR_LSTATUS)
272 			phydev->link = 1;
273 		else
274 			phydev->link = 0;
275 	}
276 
277 	return 0;
278 }
279 
280 /*
281  * Generic function which updates the speed and duplex.  If
282  * autonegotiation is enabled, it uses the AND of the link
283  * partner's advertised capabilities and our advertised
284  * capabilities.  If autonegotiation is disabled, we use the
285  * appropriate bits in the control register.
286  *
287  * Stolen from Linux's mii.c and phy_device.c
288  */
289 int genphy_parse_link(struct phy_device *phydev)
290 {
291 	int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
292 
293 	/* We're using autonegotiation */
294 	if (phydev->autoneg == AUTONEG_ENABLE) {
295 		u32 lpa = 0;
296 		int gblpa = 0;
297 		u32 estatus = 0;
298 
299 		/* Check for gigabit capability */
300 		if (phydev->supported & (SUPPORTED_1000baseT_Full |
301 					SUPPORTED_1000baseT_Half)) {
302 			/* We want a list of states supported by
303 			 * both PHYs in the link
304 			 */
305 			gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
306 			if (gblpa < 0) {
307 				debug("Could not read MII_STAT1000. ");
308 				debug("Ignoring gigabit capability\n");
309 				gblpa = 0;
310 			}
311 			gblpa &= phy_read(phydev,
312 					MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313 		}
314 
315 		/* Set the baseline so we only have to set them
316 		 * if they're different
317 		 */
318 		phydev->speed = SPEED_10;
319 		phydev->duplex = DUPLEX_HALF;
320 
321 		/* Check the gigabit fields */
322 		if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323 			phydev->speed = SPEED_1000;
324 
325 			if (gblpa & PHY_1000BTSR_1000FD)
326 				phydev->duplex = DUPLEX_FULL;
327 
328 			/* We're done! */
329 			return 0;
330 		}
331 
332 		lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333 		lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334 
335 		if (lpa & (LPA_100FULL | LPA_100HALF)) {
336 			phydev->speed = SPEED_100;
337 
338 			if (lpa & LPA_100FULL)
339 				phydev->duplex = DUPLEX_FULL;
340 
341 		} else if (lpa & LPA_10FULL) {
342 			phydev->duplex = DUPLEX_FULL;
343 		}
344 
345 		/*
346 		 * Extended status may indicate that the PHY supports
347 		 * 1000BASE-T/X even though the 1000BASE-T registers
348 		 * are missing. In this case we can't tell whether the
349 		 * peer also supports it, so we only check extended
350 		 * status if the 1000BASE-T registers are actually
351 		 * missing.
352 		 */
353 		if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
354 			estatus = phy_read(phydev, MDIO_DEVAD_NONE,
355 					   MII_ESTATUS);
356 
357 		if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
358 				ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
359 			phydev->speed = SPEED_1000;
360 			if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
361 				phydev->duplex = DUPLEX_FULL;
362 		}
363 
364 	} else {
365 		u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
366 
367 		phydev->speed = SPEED_10;
368 		phydev->duplex = DUPLEX_HALF;
369 
370 		if (bmcr & BMCR_FULLDPLX)
371 			phydev->duplex = DUPLEX_FULL;
372 
373 		if (bmcr & BMCR_SPEED1000)
374 			phydev->speed = SPEED_1000;
375 		else if (bmcr & BMCR_SPEED100)
376 			phydev->speed = SPEED_100;
377 	}
378 
379 	return 0;
380 }
381 
382 int genphy_config(struct phy_device *phydev)
383 {
384 	int val;
385 	u32 features;
386 
387 	features = (SUPPORTED_TP | SUPPORTED_MII
388 			| SUPPORTED_AUI | SUPPORTED_FIBRE |
389 			SUPPORTED_BNC);
390 
391 	/* Do we support autonegotiation? */
392 	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
393 
394 	if (val < 0)
395 		return val;
396 
397 	if (val & BMSR_ANEGCAPABLE)
398 		features |= SUPPORTED_Autoneg;
399 
400 	if (val & BMSR_100FULL)
401 		features |= SUPPORTED_100baseT_Full;
402 	if (val & BMSR_100HALF)
403 		features |= SUPPORTED_100baseT_Half;
404 	if (val & BMSR_10FULL)
405 		features |= SUPPORTED_10baseT_Full;
406 	if (val & BMSR_10HALF)
407 		features |= SUPPORTED_10baseT_Half;
408 
409 	if (val & BMSR_ESTATEN) {
410 		val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
411 
412 		if (val < 0)
413 			return val;
414 
415 		if (val & ESTATUS_1000_TFULL)
416 			features |= SUPPORTED_1000baseT_Full;
417 		if (val & ESTATUS_1000_THALF)
418 			features |= SUPPORTED_1000baseT_Half;
419 		if (val & ESTATUS_1000_XFULL)
420 			features |= SUPPORTED_1000baseX_Full;
421 		if (val & ESTATUS_1000_XHALF)
422 			features |= SUPPORTED_1000baseX_Half;
423 	}
424 
425 	phydev->supported &= features;
426 	phydev->advertising &= features;
427 
428 	genphy_config_aneg(phydev);
429 
430 	return 0;
431 }
432 
433 int genphy_startup(struct phy_device *phydev)
434 {
435 	int ret;
436 
437 	ret = genphy_update_link(phydev);
438 	if (ret)
439 		return ret;
440 
441 	return genphy_parse_link(phydev);
442 }
443 
444 int genphy_shutdown(struct phy_device *phydev)
445 {
446 	return 0;
447 }
448 
449 static struct phy_driver genphy_driver = {
450 	.uid		= 0xffffffff,
451 	.mask		= 0xffffffff,
452 	.name		= "Generic PHY",
453 	.features	= PHY_GBIT_FEATURES | SUPPORTED_MII |
454 			  SUPPORTED_AUI | SUPPORTED_FIBRE |
455 			  SUPPORTED_BNC,
456 	.config		= genphy_config,
457 	.startup	= genphy_startup,
458 	.shutdown	= genphy_shutdown,
459 };
460 
461 static LIST_HEAD(phy_drivers);
462 
463 int phy_init(void)
464 {
465 #ifdef CONFIG_B53_SWITCH
466 	phy_b53_init();
467 #endif
468 #ifdef CONFIG_MV88E61XX_SWITCH
469 	phy_mv88e61xx_init();
470 #endif
471 #ifdef CONFIG_PHY_AQUANTIA
472 	phy_aquantia_init();
473 #endif
474 #ifdef CONFIG_PHY_ATHEROS
475 	phy_atheros_init();
476 #endif
477 #ifdef CONFIG_PHY_BROADCOM
478 	phy_broadcom_init();
479 #endif
480 #ifdef CONFIG_PHY_CORTINA
481 	phy_cortina_init();
482 #endif
483 #ifdef CONFIG_PHY_DAVICOM
484 	phy_davicom_init();
485 #endif
486 #ifdef CONFIG_PHY_ET1011C
487 	phy_et1011c_init();
488 #endif
489 #ifdef CONFIG_PHY_LXT
490 	phy_lxt_init();
491 #endif
492 #ifdef CONFIG_PHY_MARVELL
493 	phy_marvell_init();
494 #endif
495 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
496 	phy_micrel_ksz8xxx_init();
497 #endif
498 #ifdef CONFIG_PHY_MICREL_KSZ90X1
499 	phy_micrel_ksz90x1_init();
500 #endif
501 #ifdef CONFIG_PHY_MESON_GXL
502 	phy_meson_gxl_init();
503 #endif
504 #ifdef CONFIG_PHY_NATSEMI
505 	phy_natsemi_init();
506 #endif
507 #ifdef CONFIG_PHY_REALTEK
508 	phy_realtek_init();
509 #endif
510 #ifdef CONFIG_PHY_SMSC
511 	phy_smsc_init();
512 #endif
513 #ifdef CONFIG_PHY_TERANETICS
514 	phy_teranetics_init();
515 #endif
516 #ifdef CONFIG_PHY_TI
517 	phy_ti_init();
518 #endif
519 #ifdef CONFIG_PHY_VITESSE
520 	phy_vitesse_init();
521 #endif
522 #ifdef CONFIG_PHY_XILINX
523 	phy_xilinx_init();
524 #endif
525 #ifdef CONFIG_PHY_MSCC
526 	phy_mscc_init();
527 #endif
528 #ifdef CONFIG_PHY_FIXED
529 	phy_fixed_init();
530 #endif
531 	return 0;
532 }
533 
534 int phy_register(struct phy_driver *drv)
535 {
536 	INIT_LIST_HEAD(&drv->list);
537 	list_add_tail(&drv->list, &phy_drivers);
538 
539 #ifdef CONFIG_NEEDS_MANUAL_RELOC
540 	if (drv->probe)
541 		drv->probe += gd->reloc_off;
542 	if (drv->config)
543 		drv->config += gd->reloc_off;
544 	if (drv->startup)
545 		drv->startup += gd->reloc_off;
546 	if (drv->shutdown)
547 		drv->shutdown += gd->reloc_off;
548 	if (drv->readext)
549 		drv->readext += gd->reloc_off;
550 	if (drv->writeext)
551 		drv->writeext += gd->reloc_off;
552 #endif
553 	return 0;
554 }
555 
556 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
557 {
558 	/* The default values for phydev->supported are provided by the PHY
559 	 * driver "features" member, we want to reset to sane defaults first
560 	 * before supporting higher speeds.
561 	 */
562 	phydev->supported &= PHY_DEFAULT_FEATURES;
563 
564 	switch (max_speed) {
565 	default:
566 		return -ENOTSUPP;
567 	case SPEED_1000:
568 		phydev->supported |= PHY_1000BT_FEATURES;
569 		/* fall through */
570 	case SPEED_100:
571 		phydev->supported |= PHY_100BT_FEATURES;
572 		/* fall through */
573 	case SPEED_10:
574 		phydev->supported |= PHY_10BT_FEATURES;
575 	}
576 
577 	return 0;
578 }
579 
580 static int phy_probe(struct phy_device *phydev)
581 {
582 	int err = 0;
583 
584 	phydev->advertising = phydev->drv->features;
585 	phydev->supported = phydev->drv->features;
586 
587 	phydev->mmds = phydev->drv->mmds;
588 
589 	if (phydev->drv->probe)
590 		err = phydev->drv->probe(phydev);
591 
592 	return err;
593 }
594 
595 static struct phy_driver *generic_for_interface(phy_interface_t interface)
596 {
597 #ifdef CONFIG_PHYLIB_10G
598 	if (is_10g_interface(interface))
599 		return &gen10g_driver;
600 #endif
601 
602 	return &genphy_driver;
603 }
604 
605 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
606 					 phy_interface_t interface)
607 {
608 	struct list_head *entry;
609 	int phy_id = phydev->phy_id;
610 	struct phy_driver *drv = NULL;
611 
612 	list_for_each(entry, &phy_drivers) {
613 		drv = list_entry(entry, struct phy_driver, list);
614 		if ((drv->uid & drv->mask) == (phy_id & drv->mask))
615 			return drv;
616 	}
617 
618 	/* If we made it here, there's no driver for this PHY */
619 	return generic_for_interface(interface);
620 }
621 
622 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
623 					    u32 phy_id, bool is_c45,
624 					    phy_interface_t interface)
625 {
626 	struct phy_device *dev;
627 
628 	/*
629 	 * We allocate the device, and initialize the
630 	 * default values
631 	 */
632 	dev = malloc(sizeof(*dev));
633 	if (!dev) {
634 		printf("Failed to allocate PHY device for %s:%d\n",
635 		       bus->name, addr);
636 		return NULL;
637 	}
638 
639 	memset(dev, 0, sizeof(*dev));
640 
641 	dev->duplex = -1;
642 	dev->link = 0;
643 	dev->interface = interface;
644 
645 #ifdef CONFIG_DM_ETH
646 	dev->node = ofnode_null();
647 #endif
648 
649 	dev->autoneg = AUTONEG_ENABLE;
650 
651 	dev->addr = addr;
652 	dev->phy_id = phy_id;
653 	dev->is_c45 = is_c45;
654 	dev->bus = bus;
655 
656 	dev->drv = get_phy_driver(dev, interface);
657 
658 	phy_probe(dev);
659 
660 	if (addr >= 0 && addr < PHY_MAX_ADDR)
661 		bus->phymap[addr] = dev;
662 
663 	return dev;
664 }
665 
666 /**
667  * get_phy_id - reads the specified addr for its ID.
668  * @bus: the target MII bus
669  * @addr: PHY address on the MII bus
670  * @phy_id: where to store the ID retrieved.
671  *
672  * Description: Reads the ID registers of the PHY at @addr on the
673  *   @bus, stores it in @phy_id and returns zero on success.
674  */
675 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
676 {
677 	int phy_reg;
678 
679 	/*
680 	 * Grab the bits from PHYIR1, and put them
681 	 * in the upper half
682 	 */
683 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
684 
685 	if (phy_reg < 0)
686 		return -EIO;
687 
688 	*phy_id = (phy_reg & 0xffff) << 16;
689 
690 	/* Grab the bits from PHYIR2, and put them in the lower half */
691 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
692 
693 	if (phy_reg < 0)
694 		return -EIO;
695 
696 	*phy_id |= (phy_reg & 0xffff);
697 
698 	return 0;
699 }
700 
701 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
702 					     uint phy_mask, int devad,
703 					     phy_interface_t interface)
704 {
705 	u32 phy_id = 0xffffffff;
706 	bool is_c45;
707 
708 	while (phy_mask) {
709 		int addr = ffs(phy_mask) - 1;
710 		int r = get_phy_id(bus, addr, devad, &phy_id);
711 		/* If the PHY ID is mostly f's, we didn't find anything */
712 		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
713 			is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
714 			return phy_device_create(bus, addr, phy_id, is_c45,
715 						 interface);
716 		}
717 		phy_mask &= ~(1 << addr);
718 	}
719 	return NULL;
720 }
721 
722 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
723 						  uint phy_mask,
724 						  phy_interface_t interface)
725 {
726 	/* If we have one, return the existing device, with new interface */
727 	while (phy_mask) {
728 		int addr = ffs(phy_mask) - 1;
729 
730 		if (bus->phymap[addr]) {
731 			bus->phymap[addr]->interface = interface;
732 			return bus->phymap[addr];
733 		}
734 		phy_mask &= ~(1 << addr);
735 	}
736 	return NULL;
737 }
738 
739 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
740 						 uint phy_mask,
741 						 phy_interface_t interface)
742 {
743 	int i;
744 	struct phy_device *phydev;
745 
746 	phydev = search_for_existing_phy(bus, phy_mask, interface);
747 	if (phydev)
748 		return phydev;
749 	/* Try Standard (ie Clause 22) access */
750 	/* Otherwise we have to try Clause 45 */
751 	for (i = 0; i < 5; i++) {
752 		phydev = create_phy_by_mask(bus, phy_mask,
753 					    i ? i : MDIO_DEVAD_NONE, interface);
754 		if (IS_ERR(phydev))
755 			return NULL;
756 		if (phydev)
757 			return phydev;
758 	}
759 
760 	debug("\n%s PHY: ", bus->name);
761 	while (phy_mask) {
762 		int addr = ffs(phy_mask) - 1;
763 
764 		debug("%d ", addr);
765 		phy_mask &= ~(1 << addr);
766 	}
767 	debug("not found\n");
768 
769 	return NULL;
770 }
771 
772 /**
773  * get_phy_device - reads the specified PHY device and returns its
774  *                  @phy_device struct
775  * @bus: the target MII bus
776  * @addr: PHY address on the MII bus
777  *
778  * Description: Reads the ID registers of the PHY at @addr on the
779  *   @bus, then allocates and returns the phy_device to represent it.
780  */
781 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
782 					 phy_interface_t interface)
783 {
784 	return get_phy_device_by_mask(bus, 1 << addr, interface);
785 }
786 
787 int phy_reset(struct phy_device *phydev)
788 {
789 	int reg;
790 	int timeout = 500;
791 	int devad = MDIO_DEVAD_NONE;
792 
793 	if (phydev->flags & PHY_FLAG_BROKEN_RESET)
794 		return 0;
795 
796 #ifdef CONFIG_PHYLIB_10G
797 	/* If it's 10G, we need to issue reset through one of the MMDs */
798 	if (is_10g_interface(phydev->interface)) {
799 		if (!phydev->mmds)
800 			gen10g_discover_mmds(phydev);
801 
802 		devad = ffs(phydev->mmds) - 1;
803 	}
804 #endif
805 
806 	if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
807 		debug("PHY reset failed\n");
808 		return -1;
809 	}
810 
811 #ifdef CONFIG_PHY_RESET_DELAY
812 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
813 #endif
814 	/*
815 	 * Poll the control register for the reset bit to go to 0 (it is
816 	 * auto-clearing).  This should happen within 0.5 seconds per the
817 	 * IEEE spec.
818 	 */
819 	reg = phy_read(phydev, devad, MII_BMCR);
820 	while ((reg & BMCR_RESET) && timeout--) {
821 		reg = phy_read(phydev, devad, MII_BMCR);
822 
823 		if (reg < 0) {
824 			debug("PHY status read failed\n");
825 			return -1;
826 		}
827 		udelay(1000);
828 	}
829 
830 	if (reg & BMCR_RESET) {
831 		puts("PHY reset timed out\n");
832 		return -1;
833 	}
834 
835 	return 0;
836 }
837 
838 int miiphy_reset(const char *devname, unsigned char addr)
839 {
840 	struct mii_dev *bus = miiphy_get_dev_by_name(devname);
841 	struct phy_device *phydev;
842 
843 	/*
844 	 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
845 	 * If later code tries to connect with the right interface, this will
846 	 * be corrected by get_phy_device in phy_connect()
847 	 */
848 	phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
849 
850 	return phy_reset(phydev);
851 }
852 
853 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
854 				    phy_interface_t interface)
855 {
856 	/* Reset the bus */
857 	if (bus->reset) {
858 		bus->reset(bus);
859 
860 		/* Wait 15ms to make sure the PHY has come out of hard reset */
861 		mdelay(15);
862 	}
863 
864 	return get_phy_device_by_mask(bus, phy_mask, interface);
865 }
866 
867 #ifdef CONFIG_DM_ETH
868 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
869 #else
870 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
871 #endif
872 {
873 	/* Soft Reset the PHY */
874 	phy_reset(phydev);
875 	if (phydev->dev && phydev->dev != dev) {
876 		printf("%s:%d is connected to %s.  Reconnecting to %s\n",
877 		       phydev->bus->name, phydev->addr,
878 		       phydev->dev->name, dev->name);
879 	}
880 	phydev->dev = dev;
881 	debug("%s connected to %s\n", dev->name, phydev->drv->name);
882 }
883 
884 #ifdef CONFIG_PHY_FIXED
885 #ifdef CONFIG_DM_ETH
886 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
887 					    struct udevice *dev,
888 					    phy_interface_t interface)
889 #else
890 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
891 					    struct eth_device *dev,
892 					    phy_interface_t interface)
893 #endif
894 {
895 	struct phy_device *phydev = NULL;
896 	int sn;
897 	const char *name;
898 
899 	sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
900 	while (sn > 0) {
901 		name = fdt_get_name(gd->fdt_blob, sn, NULL);
902 		if (name && strcmp(name, "fixed-link") == 0) {
903 			phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
904 						   interface);
905 			break;
906 		}
907 		sn = fdt_next_subnode(gd->fdt_blob, sn);
908 	}
909 
910 	return phydev;
911 }
912 #endif
913 
914 #ifdef CONFIG_DM_ETH
915 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
916 			       struct udevice *dev,
917 			       phy_interface_t interface)
918 #else
919 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
920 			       struct eth_device *dev,
921 			       phy_interface_t interface)
922 #endif
923 {
924 	struct phy_device *phydev = NULL;
925 
926 #ifdef CONFIG_PHY_FIXED
927 	phydev = phy_connect_fixed(bus, dev, interface);
928 #endif
929 
930 	if (!phydev)
931 		phydev = phy_find_by_mask(bus, 1 << addr, interface);
932 
933 	if (phydev)
934 		phy_connect_dev(phydev, dev);
935 	else
936 		printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
937 	return phydev;
938 }
939 
940 /*
941  * Start the PHY.  Returns 0 on success, or a negative error code.
942  */
943 int phy_startup(struct phy_device *phydev)
944 {
945 	if (phydev->drv->startup)
946 		return phydev->drv->startup(phydev);
947 
948 	return 0;
949 }
950 
951 __weak int board_phy_config(struct phy_device *phydev)
952 {
953 	if (phydev->drv->config)
954 		return phydev->drv->config(phydev);
955 	return 0;
956 }
957 
958 int phy_config(struct phy_device *phydev)
959 {
960 	/* Invoke an optional board-specific helper */
961 	return board_phy_config(phydev);
962 }
963 
964 int phy_shutdown(struct phy_device *phydev)
965 {
966 	if (phydev->drv->shutdown)
967 		phydev->drv->shutdown(phydev);
968 
969 	return 0;
970 }
971 
972 int phy_get_interface_by_name(const char *str)
973 {
974 	int i;
975 
976 	for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
977 		if (!strcmp(str, phy_interface_strings[i]))
978 			return i;
979 	}
980 
981 	return -1;
982 }
983