xref: /openbmc/u-boot/drivers/net/phy/phy.c (revision c5f18a0b)
1 /*
2  * Generic PHY Management code
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  * Copyright 2011 Freescale Semiconductor, Inc.
7  * author Andy Fleming
8  *
9  * Based loosely off of Linux's PHY Lib
10  */
11 
12 #include <config.h>
13 #include <common.h>
14 #include <console.h>
15 #include <dm.h>
16 #include <malloc.h>
17 #include <net.h>
18 #include <command.h>
19 #include <miiphy.h>
20 #include <phy.h>
21 #include <errno.h>
22 #include <linux/err.h>
23 #include <linux/compiler.h>
24 
25 DECLARE_GLOBAL_DATA_PTR;
26 
27 /* Generic PHY support and helper functions */
28 
29 /**
30  * genphy_config_advert - sanitize and advertise auto-negotation parameters
31  * @phydev: target phy_device struct
32  *
33  * Description: Writes MII_ADVERTISE with the appropriate values,
34  *   after sanitizing the values to make sure we only advertise
35  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
36  *   hasn't changed, and > 0 if it has changed.
37  */
38 static int genphy_config_advert(struct phy_device *phydev)
39 {
40 	u32 advertise;
41 	int oldadv, adv;
42 	int err, changed = 0;
43 
44 	/* Only allow advertising what
45 	 * this PHY supports */
46 	phydev->advertising &= phydev->supported;
47 	advertise = phydev->advertising;
48 
49 	/* Setup standard advertisement */
50 	oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
51 
52 	if (adv < 0)
53 		return adv;
54 
55 	adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56 		 ADVERTISE_PAUSE_ASYM);
57 	if (advertise & ADVERTISED_10baseT_Half)
58 		adv |= ADVERTISE_10HALF;
59 	if (advertise & ADVERTISED_10baseT_Full)
60 		adv |= ADVERTISE_10FULL;
61 	if (advertise & ADVERTISED_100baseT_Half)
62 		adv |= ADVERTISE_100HALF;
63 	if (advertise & ADVERTISED_100baseT_Full)
64 		adv |= ADVERTISE_100FULL;
65 	if (advertise & ADVERTISED_Pause)
66 		adv |= ADVERTISE_PAUSE_CAP;
67 	if (advertise & ADVERTISED_Asym_Pause)
68 		adv |= ADVERTISE_PAUSE_ASYM;
69 	if (advertise & ADVERTISED_1000baseX_Half)
70 		adv |= ADVERTISE_1000XHALF;
71 	if (advertise & ADVERTISED_1000baseX_Full)
72 		adv |= ADVERTISE_1000XFULL;
73 
74 	if (adv != oldadv) {
75 		err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76 
77 		if (err < 0)
78 			return err;
79 		changed = 1;
80 	}
81 
82 	/* Configure gigabit if it's supported */
83 	if (phydev->supported & (SUPPORTED_1000baseT_Half |
84 				SUPPORTED_1000baseT_Full)) {
85 		oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
86 
87 		if (adv < 0)
88 			return adv;
89 
90 		adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
91 		if (advertise & SUPPORTED_1000baseT_Half)
92 			adv |= ADVERTISE_1000HALF;
93 		if (advertise & SUPPORTED_1000baseT_Full)
94 			adv |= ADVERTISE_1000FULL;
95 
96 		if (adv != oldadv) {
97 			err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
98 					adv);
99 
100 			if (err < 0)
101 				return err;
102 			changed = 1;
103 		}
104 	}
105 
106 	return changed;
107 }
108 
109 
110 /**
111  * genphy_setup_forced - configures/forces speed/duplex from @phydev
112  * @phydev: target phy_device struct
113  *
114  * Description: Configures MII_BMCR to force speed/duplex
115  *   to the values in phydev. Assumes that the values are valid.
116  */
117 static int genphy_setup_forced(struct phy_device *phydev)
118 {
119 	int err;
120 	int ctl = 0;
121 
122 	phydev->pause = phydev->asym_pause = 0;
123 
124 	if (SPEED_1000 == phydev->speed)
125 		ctl |= BMCR_SPEED1000;
126 	else if (SPEED_100 == phydev->speed)
127 		ctl |= BMCR_SPEED100;
128 
129 	if (DUPLEX_FULL == phydev->duplex)
130 		ctl |= BMCR_FULLDPLX;
131 
132 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
133 
134 	return err;
135 }
136 
137 
138 /**
139  * genphy_restart_aneg - Enable and Restart Autonegotiation
140  * @phydev: target phy_device struct
141  */
142 int genphy_restart_aneg(struct phy_device *phydev)
143 {
144 	int ctl;
145 
146 	ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
147 
148 	if (ctl < 0)
149 		return ctl;
150 
151 	ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
152 
153 	/* Don't isolate the PHY if we're negotiating */
154 	ctl &= ~(BMCR_ISOLATE);
155 
156 	ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
157 
158 	return ctl;
159 }
160 
161 
162 /**
163  * genphy_config_aneg - restart auto-negotiation or write BMCR
164  * @phydev: target phy_device struct
165  *
166  * Description: If auto-negotiation is enabled, we configure the
167  *   advertising, and then restart auto-negotiation.  If it is not
168  *   enabled, then we write the BMCR.
169  */
170 int genphy_config_aneg(struct phy_device *phydev)
171 {
172 	int result;
173 
174 	if (AUTONEG_ENABLE != phydev->autoneg)
175 		return genphy_setup_forced(phydev);
176 
177 	result = genphy_config_advert(phydev);
178 
179 	if (result < 0) /* error */
180 		return result;
181 
182 	if (result == 0) {
183 		/* Advertisment hasn't changed, but maybe aneg was never on to
184 		 * begin with?  Or maybe phy was isolated? */
185 		int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
186 
187 		if (ctl < 0)
188 			return ctl;
189 
190 		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
191 			result = 1; /* do restart aneg */
192 	}
193 
194 	/* Only restart aneg if we are advertising something different
195 	 * than we were before.	 */
196 	if (result > 0)
197 		result = genphy_restart_aneg(phydev);
198 
199 	return result;
200 }
201 
202 /**
203  * genphy_update_link - update link status in @phydev
204  * @phydev: target phy_device struct
205  *
206  * Description: Update the value in phydev->link to reflect the
207  *   current link value.  In order to do this, we need to read
208  *   the status register twice, keeping the second value.
209  */
210 int genphy_update_link(struct phy_device *phydev)
211 {
212 	unsigned int mii_reg;
213 
214 	/*
215 	 * Wait if the link is up, and autonegotiation is in progress
216 	 * (ie - we're capable and it's not done)
217 	 */
218 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
219 
220 	/*
221 	 * If we already saw the link up, and it hasn't gone down, then
222 	 * we don't need to wait for autoneg again
223 	 */
224 	if (phydev->link && mii_reg & BMSR_LSTATUS)
225 		return 0;
226 
227 	if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
228 		int i = 0;
229 
230 		printf("%s Waiting for PHY auto negotiation to complete",
231 			phydev->dev->name);
232 		while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
233 			/*
234 			 * Timeout reached ?
235 			 */
236 			if (i > PHY_ANEG_TIMEOUT) {
237 				printf(" TIMEOUT !\n");
238 				phydev->link = 0;
239 				return 0;
240 			}
241 
242 			if (ctrlc()) {
243 				puts("user interrupt!\n");
244 				phydev->link = 0;
245 				return -EINTR;
246 			}
247 
248 			if ((i++ % 500) == 0)
249 				printf(".");
250 
251 			udelay(1000);	/* 1 ms */
252 			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
253 		}
254 		printf(" done\n");
255 		phydev->link = 1;
256 	} else {
257 		/* Read the link a second time to clear the latched state */
258 		mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
259 
260 		if (mii_reg & BMSR_LSTATUS)
261 			phydev->link = 1;
262 		else
263 			phydev->link = 0;
264 	}
265 
266 	return 0;
267 }
268 
269 /*
270  * Generic function which updates the speed and duplex.  If
271  * autonegotiation is enabled, it uses the AND of the link
272  * partner's advertised capabilities and our advertised
273  * capabilities.  If autonegotiation is disabled, we use the
274  * appropriate bits in the control register.
275  *
276  * Stolen from Linux's mii.c and phy_device.c
277  */
278 int genphy_parse_link(struct phy_device *phydev)
279 {
280 	int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
281 
282 	/* We're using autonegotiation */
283 	if (phydev->supported & SUPPORTED_Autoneg) {
284 		u32 lpa = 0;
285 		int gblpa = 0;
286 		u32 estatus = 0;
287 
288 		/* Check for gigabit capability */
289 		if (phydev->supported & (SUPPORTED_1000baseT_Full |
290 					SUPPORTED_1000baseT_Half)) {
291 			/* We want a list of states supported by
292 			 * both PHYs in the link
293 			 */
294 			gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
295 			if (gblpa < 0) {
296 				debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
297 				gblpa = 0;
298 			}
299 			gblpa &= phy_read(phydev,
300 					MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
301 		}
302 
303 		/* Set the baseline so we only have to set them
304 		 * if they're different
305 		 */
306 		phydev->speed = SPEED_10;
307 		phydev->duplex = DUPLEX_HALF;
308 
309 		/* Check the gigabit fields */
310 		if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
311 			phydev->speed = SPEED_1000;
312 
313 			if (gblpa & PHY_1000BTSR_1000FD)
314 				phydev->duplex = DUPLEX_FULL;
315 
316 			/* We're done! */
317 			return 0;
318 		}
319 
320 		lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
321 		lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
322 
323 		if (lpa & (LPA_100FULL | LPA_100HALF)) {
324 			phydev->speed = SPEED_100;
325 
326 			if (lpa & LPA_100FULL)
327 				phydev->duplex = DUPLEX_FULL;
328 
329 		} else if (lpa & LPA_10FULL)
330 			phydev->duplex = DUPLEX_FULL;
331 
332 		/*
333 		 * Extended status may indicate that the PHY supports
334 		 * 1000BASE-T/X even though the 1000BASE-T registers
335 		 * are missing. In this case we can't tell whether the
336 		 * peer also supports it, so we only check extended
337 		 * status if the 1000BASE-T registers are actually
338 		 * missing.
339 		 */
340 		if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
341 			estatus = phy_read(phydev, MDIO_DEVAD_NONE,
342 					   MII_ESTATUS);
343 
344 		if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
345 				ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
346 			phydev->speed = SPEED_1000;
347 			if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
348 				phydev->duplex = DUPLEX_FULL;
349 		}
350 
351 	} else {
352 		u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
353 
354 		phydev->speed = SPEED_10;
355 		phydev->duplex = DUPLEX_HALF;
356 
357 		if (bmcr & BMCR_FULLDPLX)
358 			phydev->duplex = DUPLEX_FULL;
359 
360 		if (bmcr & BMCR_SPEED1000)
361 			phydev->speed = SPEED_1000;
362 		else if (bmcr & BMCR_SPEED100)
363 			phydev->speed = SPEED_100;
364 	}
365 
366 	return 0;
367 }
368 
369 int genphy_config(struct phy_device *phydev)
370 {
371 	int val;
372 	u32 features;
373 
374 	/* For now, I'll claim that the generic driver supports
375 	 * all possible port types */
376 	features = (SUPPORTED_TP | SUPPORTED_MII
377 			| SUPPORTED_AUI | SUPPORTED_FIBRE |
378 			SUPPORTED_BNC);
379 
380 	/* Do we support autonegotiation? */
381 	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
382 
383 	if (val < 0)
384 		return val;
385 
386 	if (val & BMSR_ANEGCAPABLE)
387 		features |= SUPPORTED_Autoneg;
388 
389 	if (val & BMSR_100FULL)
390 		features |= SUPPORTED_100baseT_Full;
391 	if (val & BMSR_100HALF)
392 		features |= SUPPORTED_100baseT_Half;
393 	if (val & BMSR_10FULL)
394 		features |= SUPPORTED_10baseT_Full;
395 	if (val & BMSR_10HALF)
396 		features |= SUPPORTED_10baseT_Half;
397 
398 	if (val & BMSR_ESTATEN) {
399 		val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
400 
401 		if (val < 0)
402 			return val;
403 
404 		if (val & ESTATUS_1000_TFULL)
405 			features |= SUPPORTED_1000baseT_Full;
406 		if (val & ESTATUS_1000_THALF)
407 			features |= SUPPORTED_1000baseT_Half;
408 		if (val & ESTATUS_1000_XFULL)
409 			features |= SUPPORTED_1000baseX_Full;
410 		if (val & ESTATUS_1000_XHALF)
411 			features |= SUPPORTED_1000baseX_Half;
412 	}
413 
414 	phydev->supported = features;
415 	phydev->advertising = features;
416 
417 	genphy_config_aneg(phydev);
418 
419 	return 0;
420 }
421 
422 int genphy_startup(struct phy_device *phydev)
423 {
424 	genphy_update_link(phydev);
425 	genphy_parse_link(phydev);
426 
427 	return 0;
428 }
429 
430 int genphy_shutdown(struct phy_device *phydev)
431 {
432 	return 0;
433 }
434 
435 static struct phy_driver genphy_driver = {
436 	.uid		= 0xffffffff,
437 	.mask		= 0xffffffff,
438 	.name		= "Generic PHY",
439 	.features	= 0,
440 	.config		= genphy_config,
441 	.startup	= genphy_startup,
442 	.shutdown	= genphy_shutdown,
443 };
444 
445 static LIST_HEAD(phy_drivers);
446 
447 int phy_init(void)
448 {
449 #ifdef CONFIG_PHY_AQUANTIA
450 	phy_aquantia_init();
451 #endif
452 #ifdef CONFIG_PHY_ATHEROS
453 	phy_atheros_init();
454 #endif
455 #ifdef CONFIG_PHY_BROADCOM
456 	phy_broadcom_init();
457 #endif
458 #ifdef CONFIG_PHY_CORTINA
459 	phy_cortina_init();
460 #endif
461 #ifdef CONFIG_PHY_DAVICOM
462 	phy_davicom_init();
463 #endif
464 #ifdef CONFIG_PHY_ET1011C
465 	phy_et1011c_init();
466 #endif
467 #ifdef CONFIG_PHY_LXT
468 	phy_lxt_init();
469 #endif
470 #ifdef CONFIG_PHY_MARVELL
471 	phy_marvell_init();
472 #endif
473 #ifdef CONFIG_PHY_MICREL
474 	phy_micrel_init();
475 #endif
476 #ifdef CONFIG_PHY_NATSEMI
477 	phy_natsemi_init();
478 #endif
479 #ifdef CONFIG_PHY_REALTEK
480 	phy_realtek_init();
481 #endif
482 #ifdef CONFIG_PHY_SMSC
483 	phy_smsc_init();
484 #endif
485 #ifdef CONFIG_PHY_TERANETICS
486 	phy_teranetics_init();
487 #endif
488 #ifdef CONFIG_PHY_TI
489 	phy_ti_init();
490 #endif
491 #ifdef CONFIG_PHY_VITESSE
492 	phy_vitesse_init();
493 #endif
494 
495 	return 0;
496 }
497 
498 int phy_register(struct phy_driver *drv)
499 {
500 	INIT_LIST_HEAD(&drv->list);
501 	list_add_tail(&drv->list, &phy_drivers);
502 
503 #ifdef CONFIG_NEEDS_MANUAL_RELOC
504 	if (drv->probe)
505 		drv->probe += gd->reloc_off;
506 	if (drv->config)
507 		drv->config += gd->reloc_off;
508 	if (drv->startup)
509 		drv->startup += gd->reloc_off;
510 	if (drv->shutdown)
511 		drv->shutdown += gd->reloc_off;
512 	if (drv->readext)
513 		drv->readext += gd->reloc_off;
514 	if (drv->writeext)
515 		drv->writeext += gd->reloc_off;
516 #endif
517 	return 0;
518 }
519 
520 static int phy_probe(struct phy_device *phydev)
521 {
522 	int err = 0;
523 
524 	phydev->advertising = phydev->supported = phydev->drv->features;
525 	phydev->mmds = phydev->drv->mmds;
526 
527 	if (phydev->drv->probe)
528 		err = phydev->drv->probe(phydev);
529 
530 	return err;
531 }
532 
533 static struct phy_driver *generic_for_interface(phy_interface_t interface)
534 {
535 #ifdef CONFIG_PHYLIB_10G
536 	if (is_10g_interface(interface))
537 		return &gen10g_driver;
538 #endif
539 
540 	return &genphy_driver;
541 }
542 
543 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
544 				phy_interface_t interface)
545 {
546 	struct list_head *entry;
547 	int phy_id = phydev->phy_id;
548 	struct phy_driver *drv = NULL;
549 
550 	list_for_each(entry, &phy_drivers) {
551 		drv = list_entry(entry, struct phy_driver, list);
552 		if ((drv->uid & drv->mask) == (phy_id & drv->mask))
553 			return drv;
554 	}
555 
556 	/* If we made it here, there's no driver for this PHY */
557 	return generic_for_interface(interface);
558 }
559 
560 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
561 					    u32 phy_id,
562 					    phy_interface_t interface)
563 {
564 	struct phy_device *dev;
565 
566 	/* We allocate the device, and initialize the
567 	 * default values */
568 	dev = malloc(sizeof(*dev));
569 	if (!dev) {
570 		printf("Failed to allocate PHY device for %s:%d\n",
571 			bus->name, addr);
572 		return NULL;
573 	}
574 
575 	memset(dev, 0, sizeof(*dev));
576 
577 	dev->duplex = -1;
578 	dev->link = 0;
579 	dev->interface = interface;
580 
581 	dev->autoneg = AUTONEG_ENABLE;
582 
583 	dev->addr = addr;
584 	dev->phy_id = phy_id;
585 	dev->bus = bus;
586 
587 	dev->drv = get_phy_driver(dev, interface);
588 
589 	phy_probe(dev);
590 
591 	bus->phymap[addr] = dev;
592 
593 	return dev;
594 }
595 
596 /**
597  * get_phy_id - reads the specified addr for its ID.
598  * @bus: the target MII bus
599  * @addr: PHY address on the MII bus
600  * @phy_id: where to store the ID retrieved.
601  *
602  * Description: Reads the ID registers of the PHY at @addr on the
603  *   @bus, stores it in @phy_id and returns zero on success.
604  */
605 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
606 {
607 	int phy_reg;
608 
609 	/* Grab the bits from PHYIR1, and put them
610 	 * in the upper half */
611 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
612 
613 	if (phy_reg < 0)
614 		return -EIO;
615 
616 	*phy_id = (phy_reg & 0xffff) << 16;
617 
618 	/* Grab the bits from PHYIR2, and put them in the lower half */
619 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
620 
621 	if (phy_reg < 0)
622 		return -EIO;
623 
624 	*phy_id |= (phy_reg & 0xffff);
625 
626 	return 0;
627 }
628 
629 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
630 		unsigned phy_mask, int devad, phy_interface_t interface)
631 {
632 	u32 phy_id = 0xffffffff;
633 	while (phy_mask) {
634 		int addr = ffs(phy_mask) - 1;
635 		int r = get_phy_id(bus, addr, devad, &phy_id);
636 		/* If the PHY ID is mostly f's, we didn't find anything */
637 		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
638 			return phy_device_create(bus, addr, phy_id, interface);
639 		phy_mask &= ~(1 << addr);
640 	}
641 	return NULL;
642 }
643 
644 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
645 		unsigned phy_mask, phy_interface_t interface)
646 {
647 	/* If we have one, return the existing device, with new interface */
648 	while (phy_mask) {
649 		int addr = ffs(phy_mask) - 1;
650 		if (bus->phymap[addr]) {
651 			bus->phymap[addr]->interface = interface;
652 			return bus->phymap[addr];
653 		}
654 		phy_mask &= ~(1 << addr);
655 	}
656 	return NULL;
657 }
658 
659 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
660 		unsigned phy_mask, phy_interface_t interface)
661 {
662 	int i;
663 	struct phy_device *phydev;
664 
665 	phydev = search_for_existing_phy(bus, phy_mask, interface);
666 	if (phydev)
667 		return phydev;
668 	/* Try Standard (ie Clause 22) access */
669 	/* Otherwise we have to try Clause 45 */
670 	for (i = 0; i < 5; i++) {
671 		phydev = create_phy_by_mask(bus, phy_mask,
672 				i ? i : MDIO_DEVAD_NONE, interface);
673 		if (IS_ERR(phydev))
674 			return NULL;
675 		if (phydev)
676 			return phydev;
677 	}
678 
679 	debug("\n%s PHY: ", bus->name);
680 	while (phy_mask) {
681 		int addr = ffs(phy_mask) - 1;
682 		debug("%d ", addr);
683 		phy_mask &= ~(1 << addr);
684 	}
685 	debug("not found\n");
686 
687 	return NULL;
688 }
689 
690 /**
691  * get_phy_device - reads the specified PHY device and returns its @phy_device struct
692  * @bus: the target MII bus
693  * @addr: PHY address on the MII bus
694  *
695  * Description: Reads the ID registers of the PHY at @addr on the
696  *   @bus, then allocates and returns the phy_device to represent it.
697  */
698 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
699 					 phy_interface_t interface)
700 {
701 	return get_phy_device_by_mask(bus, 1 << addr, interface);
702 }
703 
704 int phy_reset(struct phy_device *phydev)
705 {
706 	int reg;
707 	int timeout = 500;
708 	int devad = MDIO_DEVAD_NONE;
709 
710 #ifdef CONFIG_PHYLIB_10G
711 	/* If it's 10G, we need to issue reset through one of the MMDs */
712 	if (is_10g_interface(phydev->interface)) {
713 		if (!phydev->mmds)
714 			gen10g_discover_mmds(phydev);
715 
716 		devad = ffs(phydev->mmds) - 1;
717 	}
718 #endif
719 
720 	reg = phy_read(phydev, devad, MII_BMCR);
721 	if (reg < 0) {
722 		debug("PHY status read failed\n");
723 		return -1;
724 	}
725 
726 	reg |= BMCR_RESET;
727 
728 	if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
729 		debug("PHY reset failed\n");
730 		return -1;
731 	}
732 
733 #ifdef CONFIG_PHY_RESET_DELAY
734 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
735 #endif
736 	/*
737 	 * Poll the control register for the reset bit to go to 0 (it is
738 	 * auto-clearing).  This should happen within 0.5 seconds per the
739 	 * IEEE spec.
740 	 */
741 	while ((reg & BMCR_RESET) && timeout--) {
742 		reg = phy_read(phydev, devad, MII_BMCR);
743 
744 		if (reg < 0) {
745 			debug("PHY status read failed\n");
746 			return -1;
747 		}
748 		udelay(1000);
749 	}
750 
751 	if (reg & BMCR_RESET) {
752 		puts("PHY reset timed out\n");
753 		return -1;
754 	}
755 
756 	return 0;
757 }
758 
759 int miiphy_reset(const char *devname, unsigned char addr)
760 {
761 	struct mii_dev *bus = miiphy_get_dev_by_name(devname);
762 	struct phy_device *phydev;
763 
764 	/*
765 	 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
766 	 * If later code tries to connect with the right interface, this will
767 	 * be corrected by get_phy_device in phy_connect()
768 	 */
769 	phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
770 
771 	return phy_reset(phydev);
772 }
773 
774 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
775 		phy_interface_t interface)
776 {
777 	/* Reset the bus */
778 	if (bus->reset) {
779 		bus->reset(bus);
780 
781 		/* Wait 15ms to make sure the PHY has come out of hard reset */
782 		udelay(15000);
783 	}
784 
785 	return get_phy_device_by_mask(bus, phy_mask, interface);
786 }
787 
788 #ifdef CONFIG_DM_ETH
789 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
790 #else
791 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
792 #endif
793 {
794 	/* Soft Reset the PHY */
795 	phy_reset(phydev);
796 	if (phydev->dev && phydev->dev != dev) {
797 		printf("%s:%d is connected to %s.  Reconnecting to %s\n",
798 				phydev->bus->name, phydev->addr,
799 				phydev->dev->name, dev->name);
800 	}
801 	phydev->dev = dev;
802 	debug("%s connected to %s\n", dev->name, phydev->drv->name);
803 }
804 
805 #ifdef CONFIG_DM_ETH
806 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
807 		struct udevice *dev, phy_interface_t interface)
808 #else
809 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
810 		struct eth_device *dev, phy_interface_t interface)
811 #endif
812 {
813 	struct phy_device *phydev;
814 
815 	phydev = phy_find_by_mask(bus, 1 << addr, interface);
816 	if (phydev)
817 		phy_connect_dev(phydev, dev);
818 	else
819 		printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
820 	return phydev;
821 }
822 
823 /*
824  * Start the PHY.  Returns 0 on success, or a negative error code.
825  */
826 int phy_startup(struct phy_device *phydev)
827 {
828 	if (phydev->drv->startup)
829 		return phydev->drv->startup(phydev);
830 
831 	return 0;
832 }
833 
834 __weak int board_phy_config(struct phy_device *phydev)
835 {
836 	if (phydev->drv->config)
837 		return phydev->drv->config(phydev);
838 	return 0;
839 }
840 
841 int phy_config(struct phy_device *phydev)
842 {
843 	/* Invoke an optional board-specific helper */
844 	board_phy_config(phydev);
845 
846 	return 0;
847 }
848 
849 int phy_shutdown(struct phy_device *phydev)
850 {
851 	if (phydev->drv->shutdown)
852 		phydev->drv->shutdown(phydev);
853 
854 	return 0;
855 }
856 
857 int phy_get_interface_by_name(const char *str)
858 {
859 	int i;
860 
861 	for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
862 		if (!strcmp(str, phy_interface_strings[i]))
863 			return i;
864 	}
865 
866 	return -1;
867 }
868