1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Generic PHY Management code 4 * 5 * Copyright 2011 Freescale Semiconductor, Inc. 6 * author Andy Fleming 7 * 8 * Based loosely off of Linux's PHY Lib 9 */ 10 #include <common.h> 11 #include <console.h> 12 #include <dm.h> 13 #include <malloc.h> 14 #include <net.h> 15 #include <command.h> 16 #include <miiphy.h> 17 #include <phy.h> 18 #include <errno.h> 19 #include <linux/err.h> 20 #include <linux/compiler.h> 21 22 DECLARE_GLOBAL_DATA_PTR; 23 24 /* Generic PHY support and helper functions */ 25 26 /** 27 * genphy_config_advert - sanitize and advertise auto-negotiation parameters 28 * @phydev: target phy_device struct 29 * 30 * Description: Writes MII_ADVERTISE with the appropriate values, 31 * after sanitizing the values to make sure we only advertise 32 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 33 * hasn't changed, and > 0 if it has changed. 34 */ 35 static int genphy_config_advert(struct phy_device *phydev) 36 { 37 u32 advertise; 38 int oldadv, adv, bmsr; 39 int err, changed = 0; 40 41 /* Only allow advertising what this PHY supports */ 42 phydev->advertising &= phydev->supported; 43 advertise = phydev->advertising; 44 45 /* Setup standard advertisement */ 46 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 47 oldadv = adv; 48 49 if (adv < 0) 50 return adv; 51 52 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 53 ADVERTISE_PAUSE_ASYM); 54 if (advertise & ADVERTISED_10baseT_Half) 55 adv |= ADVERTISE_10HALF; 56 if (advertise & ADVERTISED_10baseT_Full) 57 adv |= ADVERTISE_10FULL; 58 if (advertise & ADVERTISED_100baseT_Half) 59 adv |= ADVERTISE_100HALF; 60 if (advertise & ADVERTISED_100baseT_Full) 61 adv |= ADVERTISE_100FULL; 62 if (advertise & ADVERTISED_Pause) 63 adv |= ADVERTISE_PAUSE_CAP; 64 if (advertise & ADVERTISED_Asym_Pause) 65 adv |= ADVERTISE_PAUSE_ASYM; 66 if (advertise & ADVERTISED_1000baseX_Half) 67 adv |= ADVERTISE_1000XHALF; 68 if (advertise & ADVERTISED_1000baseX_Full) 69 adv |= ADVERTISE_1000XFULL; 70 71 if (adv != oldadv) { 72 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 73 74 if (err < 0) 75 return err; 76 changed = 1; 77 } 78 79 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 80 if (bmsr < 0) 81 return bmsr; 82 83 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all 84 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a 85 * logical 1. 86 */ 87 if (!(bmsr & BMSR_ESTATEN)) 88 return changed; 89 90 /* Configure gigabit if it's supported */ 91 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 92 oldadv = adv; 93 94 if (adv < 0) 95 return adv; 96 97 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 98 99 if (phydev->supported & (SUPPORTED_1000baseT_Half | 100 SUPPORTED_1000baseT_Full)) { 101 if (advertise & SUPPORTED_1000baseT_Half) 102 adv |= ADVERTISE_1000HALF; 103 if (advertise & SUPPORTED_1000baseT_Full) 104 adv |= ADVERTISE_1000FULL; 105 } 106 107 if (adv != oldadv) 108 changed = 1; 109 110 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); 111 if (err < 0) 112 return err; 113 114 return changed; 115 } 116 117 /** 118 * genphy_setup_forced - configures/forces speed/duplex from @phydev 119 * @phydev: target phy_device struct 120 * 121 * Description: Configures MII_BMCR to force speed/duplex 122 * to the values in phydev. Assumes that the values are valid. 123 */ 124 static int genphy_setup_forced(struct phy_device *phydev) 125 { 126 int err; 127 int ctl = BMCR_ANRESTART; 128 129 phydev->pause = 0; 130 phydev->asym_pause = 0; 131 132 if (phydev->speed == SPEED_1000) 133 ctl |= BMCR_SPEED1000; 134 else if (phydev->speed == SPEED_100) 135 ctl |= BMCR_SPEED100; 136 137 if (phydev->duplex == DUPLEX_FULL) 138 ctl |= BMCR_FULLDPLX; 139 140 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 141 142 return err; 143 } 144 145 /** 146 * genphy_restart_aneg - Enable and Restart Autonegotiation 147 * @phydev: target phy_device struct 148 */ 149 int genphy_restart_aneg(struct phy_device *phydev) 150 { 151 int ctl; 152 153 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 154 155 if (ctl < 0) 156 return ctl; 157 158 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 159 160 /* Don't isolate the PHY if we're negotiating */ 161 ctl &= ~(BMCR_ISOLATE); 162 163 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 164 165 return ctl; 166 } 167 168 /** 169 * genphy_config_aneg - restart auto-negotiation or write BMCR 170 * @phydev: target phy_device struct 171 * 172 * Description: If auto-negotiation is enabled, we configure the 173 * advertising, and then restart auto-negotiation. If it is not 174 * enabled, then we write the BMCR. 175 */ 176 int genphy_config_aneg(struct phy_device *phydev) 177 { 178 int result; 179 180 if (phydev->autoneg != AUTONEG_ENABLE) 181 return genphy_setup_forced(phydev); 182 183 result = genphy_config_advert(phydev); 184 185 if (result < 0) /* error */ 186 return result; 187 188 if (result == 0) { 189 /* 190 * Advertisment hasn't changed, but maybe aneg was never on to 191 * begin with? Or maybe phy was isolated? 192 */ 193 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 194 195 if (ctl < 0) 196 return ctl; 197 198 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 199 result = 1; /* do restart aneg */ 200 } 201 202 /* 203 * Only restart aneg if we are advertising something different 204 * than we were before. 205 */ 206 if (result > 0) 207 result = genphy_restart_aneg(phydev); 208 209 return result; 210 } 211 212 /** 213 * genphy_update_link - update link status in @phydev 214 * @phydev: target phy_device struct 215 * 216 * Description: Update the value in phydev->link to reflect the 217 * current link value. In order to do this, we need to read 218 * the status register twice, keeping the second value. 219 */ 220 int genphy_update_link(struct phy_device *phydev) 221 { 222 unsigned int mii_reg; 223 224 /* 225 * Wait if the link is up, and autonegotiation is in progress 226 * (ie - we're capable and it's not done) 227 */ 228 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 229 230 /* 231 * If we already saw the link up, and it hasn't gone down, then 232 * we don't need to wait for autoneg again 233 */ 234 if (phydev->link && mii_reg & BMSR_LSTATUS) 235 return 0; 236 237 if ((phydev->autoneg == AUTONEG_ENABLE) && 238 !(mii_reg & BMSR_ANEGCOMPLETE)) { 239 int i = 0; 240 241 printf("%s Waiting for PHY auto negotiation to complete", 242 phydev->dev->name); 243 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 244 /* 245 * Timeout reached ? 246 */ 247 if (i > PHY_ANEG_TIMEOUT) { 248 printf(" TIMEOUT !\n"); 249 phydev->link = 0; 250 return -ETIMEDOUT; 251 } 252 253 if (ctrlc()) { 254 puts("user interrupt!\n"); 255 phydev->link = 0; 256 return -EINTR; 257 } 258 259 if ((i++ % 500) == 0) 260 printf("."); 261 262 udelay(1000); /* 1 ms */ 263 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 264 } 265 printf(" done\n"); 266 phydev->link = 1; 267 } else { 268 /* Read the link a second time to clear the latched state */ 269 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 270 271 if (mii_reg & BMSR_LSTATUS) 272 phydev->link = 1; 273 else 274 phydev->link = 0; 275 } 276 277 return 0; 278 } 279 280 /* 281 * Generic function which updates the speed and duplex. If 282 * autonegotiation is enabled, it uses the AND of the link 283 * partner's advertised capabilities and our advertised 284 * capabilities. If autonegotiation is disabled, we use the 285 * appropriate bits in the control register. 286 * 287 * Stolen from Linux's mii.c and phy_device.c 288 */ 289 int genphy_parse_link(struct phy_device *phydev) 290 { 291 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 292 293 /* We're using autonegotiation */ 294 if (phydev->autoneg == AUTONEG_ENABLE) { 295 u32 lpa = 0; 296 int gblpa = 0; 297 u32 estatus = 0; 298 299 /* Check for gigabit capability */ 300 if (phydev->supported & (SUPPORTED_1000baseT_Full | 301 SUPPORTED_1000baseT_Half)) { 302 /* We want a list of states supported by 303 * both PHYs in the link 304 */ 305 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 306 if (gblpa < 0) { 307 debug("Could not read MII_STAT1000. "); 308 debug("Ignoring gigabit capability\n"); 309 gblpa = 0; 310 } 311 gblpa &= phy_read(phydev, 312 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 313 } 314 315 /* Set the baseline so we only have to set them 316 * if they're different 317 */ 318 phydev->speed = SPEED_10; 319 phydev->duplex = DUPLEX_HALF; 320 321 /* Check the gigabit fields */ 322 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 323 phydev->speed = SPEED_1000; 324 325 if (gblpa & PHY_1000BTSR_1000FD) 326 phydev->duplex = DUPLEX_FULL; 327 328 /* We're done! */ 329 return 0; 330 } 331 332 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 333 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 334 335 if (lpa & (LPA_100FULL | LPA_100HALF)) { 336 phydev->speed = SPEED_100; 337 338 if (lpa & LPA_100FULL) 339 phydev->duplex = DUPLEX_FULL; 340 341 } else if (lpa & LPA_10FULL) { 342 phydev->duplex = DUPLEX_FULL; 343 } 344 345 /* 346 * Extended status may indicate that the PHY supports 347 * 1000BASE-T/X even though the 1000BASE-T registers 348 * are missing. In this case we can't tell whether the 349 * peer also supports it, so we only check extended 350 * status if the 1000BASE-T registers are actually 351 * missing. 352 */ 353 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 354 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 355 MII_ESTATUS); 356 357 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 358 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 359 phydev->speed = SPEED_1000; 360 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) 361 phydev->duplex = DUPLEX_FULL; 362 } 363 364 } else { 365 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 366 367 phydev->speed = SPEED_10; 368 phydev->duplex = DUPLEX_HALF; 369 370 if (bmcr & BMCR_FULLDPLX) 371 phydev->duplex = DUPLEX_FULL; 372 373 if (bmcr & BMCR_SPEED1000) 374 phydev->speed = SPEED_1000; 375 else if (bmcr & BMCR_SPEED100) 376 phydev->speed = SPEED_100; 377 } 378 379 return 0; 380 } 381 382 int genphy_config(struct phy_device *phydev) 383 { 384 int val; 385 u32 features; 386 387 features = (SUPPORTED_TP | SUPPORTED_MII 388 | SUPPORTED_AUI | SUPPORTED_FIBRE | 389 SUPPORTED_BNC); 390 391 /* Do we support autonegotiation? */ 392 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 393 394 if (val < 0) 395 return val; 396 397 if (val & BMSR_ANEGCAPABLE) 398 features |= SUPPORTED_Autoneg; 399 400 if (val & BMSR_100FULL) 401 features |= SUPPORTED_100baseT_Full; 402 if (val & BMSR_100HALF) 403 features |= SUPPORTED_100baseT_Half; 404 if (val & BMSR_10FULL) 405 features |= SUPPORTED_10baseT_Full; 406 if (val & BMSR_10HALF) 407 features |= SUPPORTED_10baseT_Half; 408 409 if (val & BMSR_ESTATEN) { 410 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 411 412 if (val < 0) 413 return val; 414 415 if (val & ESTATUS_1000_TFULL) 416 features |= SUPPORTED_1000baseT_Full; 417 if (val & ESTATUS_1000_THALF) 418 features |= SUPPORTED_1000baseT_Half; 419 if (val & ESTATUS_1000_XFULL) 420 features |= SUPPORTED_1000baseX_Full; 421 if (val & ESTATUS_1000_XHALF) 422 features |= SUPPORTED_1000baseX_Half; 423 } 424 425 phydev->supported &= features; 426 phydev->advertising &= features; 427 428 genphy_config_aneg(phydev); 429 430 return 0; 431 } 432 433 int genphy_startup(struct phy_device *phydev) 434 { 435 int ret; 436 437 ret = genphy_update_link(phydev); 438 if (ret) 439 return ret; 440 441 return genphy_parse_link(phydev); 442 } 443 444 int genphy_shutdown(struct phy_device *phydev) 445 { 446 return 0; 447 } 448 449 static struct phy_driver genphy_driver = { 450 .uid = 0xffffffff, 451 .mask = 0xffffffff, 452 .name = "Generic PHY", 453 .features = PHY_GBIT_FEATURES | SUPPORTED_MII | 454 SUPPORTED_AUI | SUPPORTED_FIBRE | 455 SUPPORTED_BNC, 456 .config = genphy_config, 457 .startup = genphy_startup, 458 .shutdown = genphy_shutdown, 459 }; 460 461 static LIST_HEAD(phy_drivers); 462 463 int phy_init(void) 464 { 465 #ifdef CONFIG_B53_SWITCH 466 phy_b53_init(); 467 #endif 468 #ifdef CONFIG_MV88E61XX_SWITCH 469 phy_mv88e61xx_init(); 470 #endif 471 #ifdef CONFIG_PHY_AQUANTIA 472 phy_aquantia_init(); 473 #endif 474 #ifdef CONFIG_PHY_ATHEROS 475 phy_atheros_init(); 476 #endif 477 #ifdef CONFIG_PHY_BROADCOM 478 phy_broadcom_init(); 479 #endif 480 #ifdef CONFIG_PHY_CORTINA 481 phy_cortina_init(); 482 #endif 483 #ifdef CONFIG_PHY_DAVICOM 484 phy_davicom_init(); 485 #endif 486 #ifdef CONFIG_PHY_ET1011C 487 phy_et1011c_init(); 488 #endif 489 #ifdef CONFIG_PHY_LXT 490 phy_lxt_init(); 491 #endif 492 #ifdef CONFIG_PHY_MARVELL 493 phy_marvell_init(); 494 #endif 495 #ifdef CONFIG_PHY_MICREL_KSZ8XXX 496 phy_micrel_ksz8xxx_init(); 497 #endif 498 #ifdef CONFIG_PHY_MICREL_KSZ90X1 499 phy_micrel_ksz90x1_init(); 500 #endif 501 #ifdef CONFIG_PHY_MESON_GXL 502 phy_meson_gxl_init(); 503 #endif 504 #ifdef CONFIG_PHY_NATSEMI 505 phy_natsemi_init(); 506 #endif 507 #ifdef CONFIG_PHY_REALTEK 508 phy_realtek_init(); 509 #endif 510 #ifdef CONFIG_PHY_SMSC 511 phy_smsc_init(); 512 #endif 513 #ifdef CONFIG_PHY_TERANETICS 514 phy_teranetics_init(); 515 #endif 516 #ifdef CONFIG_PHY_TI 517 phy_ti_init(); 518 #endif 519 #ifdef CONFIG_PHY_VITESSE 520 phy_vitesse_init(); 521 #endif 522 #ifdef CONFIG_PHY_XILINX 523 phy_xilinx_init(); 524 #endif 525 #ifdef CONFIG_PHY_MSCC 526 phy_mscc_init(); 527 #endif 528 #ifdef CONFIG_PHY_FIXED 529 phy_fixed_init(); 530 #endif 531 return 0; 532 } 533 534 int phy_register(struct phy_driver *drv) 535 { 536 INIT_LIST_HEAD(&drv->list); 537 list_add_tail(&drv->list, &phy_drivers); 538 539 #ifdef CONFIG_NEEDS_MANUAL_RELOC 540 if (drv->probe) 541 drv->probe += gd->reloc_off; 542 if (drv->config) 543 drv->config += gd->reloc_off; 544 if (drv->startup) 545 drv->startup += gd->reloc_off; 546 if (drv->shutdown) 547 drv->shutdown += gd->reloc_off; 548 if (drv->readext) 549 drv->readext += gd->reloc_off; 550 if (drv->writeext) 551 drv->writeext += gd->reloc_off; 552 #endif 553 return 0; 554 } 555 556 int phy_set_supported(struct phy_device *phydev, u32 max_speed) 557 { 558 /* The default values for phydev->supported are provided by the PHY 559 * driver "features" member, we want to reset to sane defaults first 560 * before supporting higher speeds. 561 */ 562 phydev->supported &= PHY_DEFAULT_FEATURES; 563 564 switch (max_speed) { 565 default: 566 return -ENOTSUPP; 567 case SPEED_1000: 568 phydev->supported |= PHY_1000BT_FEATURES; 569 /* fall through */ 570 case SPEED_100: 571 phydev->supported |= PHY_100BT_FEATURES; 572 /* fall through */ 573 case SPEED_10: 574 phydev->supported |= PHY_10BT_FEATURES; 575 } 576 577 return 0; 578 } 579 580 static int phy_probe(struct phy_device *phydev) 581 { 582 int err = 0; 583 584 phydev->advertising = phydev->drv->features; 585 phydev->supported = phydev->drv->features; 586 587 phydev->mmds = phydev->drv->mmds; 588 589 if (phydev->drv->probe) 590 err = phydev->drv->probe(phydev); 591 592 return err; 593 } 594 595 static struct phy_driver *generic_for_interface(phy_interface_t interface) 596 { 597 #ifdef CONFIG_PHYLIB_10G 598 if (is_10g_interface(interface)) 599 return &gen10g_driver; 600 #endif 601 602 return &genphy_driver; 603 } 604 605 static struct phy_driver *get_phy_driver(struct phy_device *phydev, 606 phy_interface_t interface) 607 { 608 struct list_head *entry; 609 int phy_id = phydev->phy_id; 610 struct phy_driver *drv = NULL; 611 612 list_for_each(entry, &phy_drivers) { 613 drv = list_entry(entry, struct phy_driver, list); 614 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) 615 return drv; 616 } 617 618 /* If we made it here, there's no driver for this PHY */ 619 return generic_for_interface(interface); 620 } 621 622 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 623 u32 phy_id, 624 phy_interface_t interface) 625 { 626 struct phy_device *dev; 627 628 /* 629 * We allocate the device, and initialize the 630 * default values 631 */ 632 dev = malloc(sizeof(*dev)); 633 if (!dev) { 634 printf("Failed to allocate PHY device for %s:%d\n", 635 bus->name, addr); 636 return NULL; 637 } 638 639 memset(dev, 0, sizeof(*dev)); 640 641 dev->duplex = -1; 642 dev->link = 0; 643 dev->interface = interface; 644 645 #ifdef CONFIG_DM_ETH 646 dev->node = ofnode_null(); 647 #endif 648 649 dev->autoneg = AUTONEG_ENABLE; 650 651 dev->addr = addr; 652 dev->phy_id = phy_id; 653 dev->bus = bus; 654 655 dev->drv = get_phy_driver(dev, interface); 656 657 phy_probe(dev); 658 659 bus->phymap[addr] = dev; 660 661 return dev; 662 } 663 664 /** 665 * get_phy_id - reads the specified addr for its ID. 666 * @bus: the target MII bus 667 * @addr: PHY address on the MII bus 668 * @phy_id: where to store the ID retrieved. 669 * 670 * Description: Reads the ID registers of the PHY at @addr on the 671 * @bus, stores it in @phy_id and returns zero on success. 672 */ 673 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 674 { 675 int phy_reg; 676 677 /* 678 * Grab the bits from PHYIR1, and put them 679 * in the upper half 680 */ 681 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 682 683 if (phy_reg < 0) 684 return -EIO; 685 686 *phy_id = (phy_reg & 0xffff) << 16; 687 688 /* Grab the bits from PHYIR2, and put them in the lower half */ 689 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 690 691 if (phy_reg < 0) 692 return -EIO; 693 694 *phy_id |= (phy_reg & 0xffff); 695 696 return 0; 697 } 698 699 static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 700 uint phy_mask, int devad, 701 phy_interface_t interface) 702 { 703 u32 phy_id = 0xffffffff; 704 705 while (phy_mask) { 706 int addr = ffs(phy_mask) - 1; 707 int r = get_phy_id(bus, addr, devad, &phy_id); 708 /* If the PHY ID is mostly f's, we didn't find anything */ 709 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) 710 return phy_device_create(bus, addr, phy_id, interface); 711 phy_mask &= ~(1 << addr); 712 } 713 return NULL; 714 } 715 716 static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 717 uint phy_mask, 718 phy_interface_t interface) 719 { 720 /* If we have one, return the existing device, with new interface */ 721 while (phy_mask) { 722 int addr = ffs(phy_mask) - 1; 723 724 if (bus->phymap[addr]) { 725 bus->phymap[addr]->interface = interface; 726 return bus->phymap[addr]; 727 } 728 phy_mask &= ~(1 << addr); 729 } 730 return NULL; 731 } 732 733 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 734 uint phy_mask, 735 phy_interface_t interface) 736 { 737 int i; 738 struct phy_device *phydev; 739 740 phydev = search_for_existing_phy(bus, phy_mask, interface); 741 if (phydev) 742 return phydev; 743 /* Try Standard (ie Clause 22) access */ 744 /* Otherwise we have to try Clause 45 */ 745 for (i = 0; i < 5; i++) { 746 phydev = create_phy_by_mask(bus, phy_mask, 747 i ? i : MDIO_DEVAD_NONE, interface); 748 if (IS_ERR(phydev)) 749 return NULL; 750 if (phydev) 751 return phydev; 752 } 753 754 debug("\n%s PHY: ", bus->name); 755 while (phy_mask) { 756 int addr = ffs(phy_mask) - 1; 757 758 debug("%d ", addr); 759 phy_mask &= ~(1 << addr); 760 } 761 debug("not found\n"); 762 763 return NULL; 764 } 765 766 /** 767 * get_phy_device - reads the specified PHY device and returns its 768 * @phy_device struct 769 * @bus: the target MII bus 770 * @addr: PHY address on the MII bus 771 * 772 * Description: Reads the ID registers of the PHY at @addr on the 773 * @bus, then allocates and returns the phy_device to represent it. 774 */ 775 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 776 phy_interface_t interface) 777 { 778 return get_phy_device_by_mask(bus, 1 << addr, interface); 779 } 780 781 int phy_reset(struct phy_device *phydev) 782 { 783 int reg; 784 int timeout = 500; 785 int devad = MDIO_DEVAD_NONE; 786 787 if (phydev->flags & PHY_FLAG_BROKEN_RESET) 788 return 0; 789 790 #ifdef CONFIG_PHYLIB_10G 791 /* If it's 10G, we need to issue reset through one of the MMDs */ 792 if (is_10g_interface(phydev->interface)) { 793 if (!phydev->mmds) 794 gen10g_discover_mmds(phydev); 795 796 devad = ffs(phydev->mmds) - 1; 797 } 798 #endif 799 800 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { 801 debug("PHY reset failed\n"); 802 return -1; 803 } 804 805 #ifdef CONFIG_PHY_RESET_DELAY 806 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 807 #endif 808 /* 809 * Poll the control register for the reset bit to go to 0 (it is 810 * auto-clearing). This should happen within 0.5 seconds per the 811 * IEEE spec. 812 */ 813 reg = phy_read(phydev, devad, MII_BMCR); 814 while ((reg & BMCR_RESET) && timeout--) { 815 reg = phy_read(phydev, devad, MII_BMCR); 816 817 if (reg < 0) { 818 debug("PHY status read failed\n"); 819 return -1; 820 } 821 udelay(1000); 822 } 823 824 if (reg & BMCR_RESET) { 825 puts("PHY reset timed out\n"); 826 return -1; 827 } 828 829 return 0; 830 } 831 832 int miiphy_reset(const char *devname, unsigned char addr) 833 { 834 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 835 struct phy_device *phydev; 836 837 /* 838 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 839 * If later code tries to connect with the right interface, this will 840 * be corrected by get_phy_device in phy_connect() 841 */ 842 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 843 844 return phy_reset(phydev); 845 } 846 847 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask, 848 phy_interface_t interface) 849 { 850 /* Reset the bus */ 851 if (bus->reset) { 852 bus->reset(bus); 853 854 /* Wait 15ms to make sure the PHY has come out of hard reset */ 855 mdelay(15); 856 } 857 858 return get_phy_device_by_mask(bus, phy_mask, interface); 859 } 860 861 #ifdef CONFIG_DM_ETH 862 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 863 #else 864 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 865 #endif 866 { 867 /* Soft Reset the PHY */ 868 phy_reset(phydev); 869 if (phydev->dev && phydev->dev != dev) { 870 printf("%s:%d is connected to %s. Reconnecting to %s\n", 871 phydev->bus->name, phydev->addr, 872 phydev->dev->name, dev->name); 873 } 874 phydev->dev = dev; 875 debug("%s connected to %s\n", dev->name, phydev->drv->name); 876 } 877 878 #ifdef CONFIG_DM_ETH 879 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 880 struct udevice *dev, 881 phy_interface_t interface) 882 #else 883 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 884 struct eth_device *dev, 885 phy_interface_t interface) 886 #endif 887 { 888 struct phy_device *phydev = NULL; 889 #ifdef CONFIG_PHY_FIXED 890 int sn; 891 const char *name; 892 893 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); 894 while (sn > 0) { 895 name = fdt_get_name(gd->fdt_blob, sn, NULL); 896 if (name && strcmp(name, "fixed-link") == 0) { 897 phydev = phy_device_create(bus, 898 sn, PHY_FIXED_ID, interface); 899 break; 900 } 901 sn = fdt_next_subnode(gd->fdt_blob, sn); 902 } 903 #endif 904 if (!phydev) 905 phydev = phy_find_by_mask(bus, 1 << addr, interface); 906 907 if (phydev) 908 phy_connect_dev(phydev, dev); 909 else 910 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 911 return phydev; 912 } 913 914 /* 915 * Start the PHY. Returns 0 on success, or a negative error code. 916 */ 917 int phy_startup(struct phy_device *phydev) 918 { 919 if (phydev->drv->startup) 920 return phydev->drv->startup(phydev); 921 922 return 0; 923 } 924 925 __weak int board_phy_config(struct phy_device *phydev) 926 { 927 if (phydev->drv->config) 928 return phydev->drv->config(phydev); 929 return 0; 930 } 931 932 int phy_config(struct phy_device *phydev) 933 { 934 /* Invoke an optional board-specific helper */ 935 return board_phy_config(phydev); 936 } 937 938 int phy_shutdown(struct phy_device *phydev) 939 { 940 if (phydev->drv->shutdown) 941 phydev->drv->shutdown(phydev); 942 943 return 0; 944 } 945 946 int phy_get_interface_by_name(const char *str) 947 { 948 int i; 949 950 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 951 if (!strcmp(str, phy_interface_strings[i])) 952 return i; 953 } 954 955 return -1; 956 } 957