1 /* 2 * Generic PHY Management code 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 * 6 * Copyright 2011 Freescale Semiconductor, Inc. 7 * author Andy Fleming 8 * 9 * Based loosely off of Linux's PHY Lib 10 */ 11 12 #include <config.h> 13 #include <common.h> 14 #include <console.h> 15 #include <dm.h> 16 #include <malloc.h> 17 #include <net.h> 18 #include <command.h> 19 #include <miiphy.h> 20 #include <phy.h> 21 #include <errno.h> 22 #include <linux/err.h> 23 #include <linux/compiler.h> 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 /* Generic PHY support and helper functions */ 28 29 /** 30 * genphy_config_advert - sanitize and advertise auto-negotiation parameters 31 * @phydev: target phy_device struct 32 * 33 * Description: Writes MII_ADVERTISE with the appropriate values, 34 * after sanitizing the values to make sure we only advertise 35 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 36 * hasn't changed, and > 0 if it has changed. 37 */ 38 static int genphy_config_advert(struct phy_device *phydev) 39 { 40 u32 advertise; 41 int oldadv, adv, bmsr; 42 int err, changed = 0; 43 44 /* Only allow advertising what this PHY supports */ 45 phydev->advertising &= phydev->supported; 46 advertise = phydev->advertising; 47 48 /* Setup standard advertisement */ 49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 50 oldadv = adv; 51 52 if (adv < 0) 53 return adv; 54 55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 56 ADVERTISE_PAUSE_ASYM); 57 if (advertise & ADVERTISED_10baseT_Half) 58 adv |= ADVERTISE_10HALF; 59 if (advertise & ADVERTISED_10baseT_Full) 60 adv |= ADVERTISE_10FULL; 61 if (advertise & ADVERTISED_100baseT_Half) 62 adv |= ADVERTISE_100HALF; 63 if (advertise & ADVERTISED_100baseT_Full) 64 adv |= ADVERTISE_100FULL; 65 if (advertise & ADVERTISED_Pause) 66 adv |= ADVERTISE_PAUSE_CAP; 67 if (advertise & ADVERTISED_Asym_Pause) 68 adv |= ADVERTISE_PAUSE_ASYM; 69 if (advertise & ADVERTISED_1000baseX_Half) 70 adv |= ADVERTISE_1000XHALF; 71 if (advertise & ADVERTISED_1000baseX_Full) 72 adv |= ADVERTISE_1000XFULL; 73 74 if (adv != oldadv) { 75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 76 77 if (err < 0) 78 return err; 79 changed = 1; 80 } 81 82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 83 if (bmsr < 0) 84 return bmsr; 85 86 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all 87 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a 88 * logical 1. 89 */ 90 if (!(bmsr & BMSR_ESTATEN)) 91 return changed; 92 93 /* Configure gigabit if it's supported */ 94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 95 oldadv = adv; 96 97 if (adv < 0) 98 return adv; 99 100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 101 102 if (phydev->supported & (SUPPORTED_1000baseT_Half | 103 SUPPORTED_1000baseT_Full)) { 104 if (advertise & SUPPORTED_1000baseT_Half) 105 adv |= ADVERTISE_1000HALF; 106 if (advertise & SUPPORTED_1000baseT_Full) 107 adv |= ADVERTISE_1000FULL; 108 } 109 110 if (adv != oldadv) 111 changed = 1; 112 113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); 114 if (err < 0) 115 return err; 116 117 return changed; 118 } 119 120 /** 121 * genphy_setup_forced - configures/forces speed/duplex from @phydev 122 * @phydev: target phy_device struct 123 * 124 * Description: Configures MII_BMCR to force speed/duplex 125 * to the values in phydev. Assumes that the values are valid. 126 */ 127 static int genphy_setup_forced(struct phy_device *phydev) 128 { 129 int err; 130 int ctl = BMCR_ANRESTART; 131 132 phydev->pause = 0; 133 phydev->asym_pause = 0; 134 135 if (phydev->speed == SPEED_1000) 136 ctl |= BMCR_SPEED1000; 137 else if (phydev->speed == SPEED_100) 138 ctl |= BMCR_SPEED100; 139 140 if (phydev->duplex == DUPLEX_FULL) 141 ctl |= BMCR_FULLDPLX; 142 143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 144 145 return err; 146 } 147 148 /** 149 * genphy_restart_aneg - Enable and Restart Autonegotiation 150 * @phydev: target phy_device struct 151 */ 152 int genphy_restart_aneg(struct phy_device *phydev) 153 { 154 int ctl; 155 156 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 157 158 if (ctl < 0) 159 return ctl; 160 161 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 162 163 /* Don't isolate the PHY if we're negotiating */ 164 ctl &= ~(BMCR_ISOLATE); 165 166 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 167 168 return ctl; 169 } 170 171 /** 172 * genphy_config_aneg - restart auto-negotiation or write BMCR 173 * @phydev: target phy_device struct 174 * 175 * Description: If auto-negotiation is enabled, we configure the 176 * advertising, and then restart auto-negotiation. If it is not 177 * enabled, then we write the BMCR. 178 */ 179 int genphy_config_aneg(struct phy_device *phydev) 180 { 181 int result; 182 183 if (phydev->autoneg != AUTONEG_ENABLE) 184 return genphy_setup_forced(phydev); 185 186 result = genphy_config_advert(phydev); 187 188 if (result < 0) /* error */ 189 return result; 190 191 if (result == 0) { 192 /* 193 * Advertisment hasn't changed, but maybe aneg was never on to 194 * begin with? Or maybe phy was isolated? 195 */ 196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 197 198 if (ctl < 0) 199 return ctl; 200 201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 202 result = 1; /* do restart aneg */ 203 } 204 205 /* 206 * Only restart aneg if we are advertising something different 207 * than we were before. 208 */ 209 if (result > 0) 210 result = genphy_restart_aneg(phydev); 211 212 return result; 213 } 214 215 /** 216 * genphy_update_link - update link status in @phydev 217 * @phydev: target phy_device struct 218 * 219 * Description: Update the value in phydev->link to reflect the 220 * current link value. In order to do this, we need to read 221 * the status register twice, keeping the second value. 222 */ 223 int genphy_update_link(struct phy_device *phydev) 224 { 225 unsigned int mii_reg; 226 227 /* 228 * Wait if the link is up, and autonegotiation is in progress 229 * (ie - we're capable and it's not done) 230 */ 231 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 232 233 /* 234 * If we already saw the link up, and it hasn't gone down, then 235 * we don't need to wait for autoneg again 236 */ 237 if (phydev->link && mii_reg & BMSR_LSTATUS) 238 return 0; 239 240 if ((phydev->autoneg == AUTONEG_ENABLE) && 241 !(mii_reg & BMSR_ANEGCOMPLETE)) { 242 int i = 0; 243 244 printf("%s Waiting for PHY auto negotiation to complete", 245 phydev->dev->name); 246 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 247 /* 248 * Timeout reached ? 249 */ 250 if (i > PHY_ANEG_TIMEOUT) { 251 printf(" TIMEOUT !\n"); 252 phydev->link = 0; 253 return -ETIMEDOUT; 254 } 255 256 if (ctrlc()) { 257 puts("user interrupt!\n"); 258 phydev->link = 0; 259 return -EINTR; 260 } 261 262 if ((i++ % 500) == 0) 263 printf("."); 264 265 udelay(1000); /* 1 ms */ 266 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 267 } 268 printf(" done\n"); 269 phydev->link = 1; 270 } else { 271 /* Read the link a second time to clear the latched state */ 272 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 273 274 if (mii_reg & BMSR_LSTATUS) 275 phydev->link = 1; 276 else 277 phydev->link = 0; 278 } 279 280 return 0; 281 } 282 283 /* 284 * Generic function which updates the speed and duplex. If 285 * autonegotiation is enabled, it uses the AND of the link 286 * partner's advertised capabilities and our advertised 287 * capabilities. If autonegotiation is disabled, we use the 288 * appropriate bits in the control register. 289 * 290 * Stolen from Linux's mii.c and phy_device.c 291 */ 292 int genphy_parse_link(struct phy_device *phydev) 293 { 294 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 295 296 /* We're using autonegotiation */ 297 if (phydev->autoneg == AUTONEG_ENABLE) { 298 u32 lpa = 0; 299 int gblpa = 0; 300 u32 estatus = 0; 301 302 /* Check for gigabit capability */ 303 if (phydev->supported & (SUPPORTED_1000baseT_Full | 304 SUPPORTED_1000baseT_Half)) { 305 /* We want a list of states supported by 306 * both PHYs in the link 307 */ 308 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 309 if (gblpa < 0) { 310 debug("Could not read MII_STAT1000. "); 311 debug("Ignoring gigabit capability\n"); 312 gblpa = 0; 313 } 314 gblpa &= phy_read(phydev, 315 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 316 } 317 318 /* Set the baseline so we only have to set them 319 * if they're different 320 */ 321 phydev->speed = SPEED_10; 322 phydev->duplex = DUPLEX_HALF; 323 324 /* Check the gigabit fields */ 325 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 326 phydev->speed = SPEED_1000; 327 328 if (gblpa & PHY_1000BTSR_1000FD) 329 phydev->duplex = DUPLEX_FULL; 330 331 /* We're done! */ 332 return 0; 333 } 334 335 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 336 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 337 338 if (lpa & (LPA_100FULL | LPA_100HALF)) { 339 phydev->speed = SPEED_100; 340 341 if (lpa & LPA_100FULL) 342 phydev->duplex = DUPLEX_FULL; 343 344 } else if (lpa & LPA_10FULL) { 345 phydev->duplex = DUPLEX_FULL; 346 } 347 348 /* 349 * Extended status may indicate that the PHY supports 350 * 1000BASE-T/X even though the 1000BASE-T registers 351 * are missing. In this case we can't tell whether the 352 * peer also supports it, so we only check extended 353 * status if the 1000BASE-T registers are actually 354 * missing. 355 */ 356 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 357 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 358 MII_ESTATUS); 359 360 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 361 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 362 phydev->speed = SPEED_1000; 363 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) 364 phydev->duplex = DUPLEX_FULL; 365 } 366 367 } else { 368 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 369 370 phydev->speed = SPEED_10; 371 phydev->duplex = DUPLEX_HALF; 372 373 if (bmcr & BMCR_FULLDPLX) 374 phydev->duplex = DUPLEX_FULL; 375 376 if (bmcr & BMCR_SPEED1000) 377 phydev->speed = SPEED_1000; 378 else if (bmcr & BMCR_SPEED100) 379 phydev->speed = SPEED_100; 380 } 381 382 return 0; 383 } 384 385 int genphy_config(struct phy_device *phydev) 386 { 387 int val; 388 u32 features; 389 390 features = (SUPPORTED_TP | SUPPORTED_MII 391 | SUPPORTED_AUI | SUPPORTED_FIBRE | 392 SUPPORTED_BNC); 393 394 /* Do we support autonegotiation? */ 395 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 396 397 if (val < 0) 398 return val; 399 400 if (val & BMSR_ANEGCAPABLE) 401 features |= SUPPORTED_Autoneg; 402 403 if (val & BMSR_100FULL) 404 features |= SUPPORTED_100baseT_Full; 405 if (val & BMSR_100HALF) 406 features |= SUPPORTED_100baseT_Half; 407 if (val & BMSR_10FULL) 408 features |= SUPPORTED_10baseT_Full; 409 if (val & BMSR_10HALF) 410 features |= SUPPORTED_10baseT_Half; 411 412 if (val & BMSR_ESTATEN) { 413 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 414 415 if (val < 0) 416 return val; 417 418 if (val & ESTATUS_1000_TFULL) 419 features |= SUPPORTED_1000baseT_Full; 420 if (val & ESTATUS_1000_THALF) 421 features |= SUPPORTED_1000baseT_Half; 422 if (val & ESTATUS_1000_XFULL) 423 features |= SUPPORTED_1000baseX_Full; 424 if (val & ESTATUS_1000_XHALF) 425 features |= SUPPORTED_1000baseX_Half; 426 } 427 428 phydev->supported &= features; 429 phydev->advertising &= features; 430 431 genphy_config_aneg(phydev); 432 433 return 0; 434 } 435 436 int genphy_startup(struct phy_device *phydev) 437 { 438 int ret; 439 440 ret = genphy_update_link(phydev); 441 if (ret) 442 return ret; 443 444 return genphy_parse_link(phydev); 445 } 446 447 int genphy_shutdown(struct phy_device *phydev) 448 { 449 return 0; 450 } 451 452 static struct phy_driver genphy_driver = { 453 .uid = 0xffffffff, 454 .mask = 0xffffffff, 455 .name = "Generic PHY", 456 .features = PHY_GBIT_FEATURES | SUPPORTED_MII | 457 SUPPORTED_AUI | SUPPORTED_FIBRE | 458 SUPPORTED_BNC, 459 .config = genphy_config, 460 .startup = genphy_startup, 461 .shutdown = genphy_shutdown, 462 }; 463 464 static LIST_HEAD(phy_drivers); 465 466 int phy_init(void) 467 { 468 #ifdef CONFIG_B53_SWITCH 469 phy_b53_init(); 470 #endif 471 #ifdef CONFIG_MV88E61XX_SWITCH 472 phy_mv88e61xx_init(); 473 #endif 474 #ifdef CONFIG_PHY_AQUANTIA 475 phy_aquantia_init(); 476 #endif 477 #ifdef CONFIG_PHY_ATHEROS 478 phy_atheros_init(); 479 #endif 480 #ifdef CONFIG_PHY_BROADCOM 481 phy_broadcom_init(); 482 #endif 483 #ifdef CONFIG_PHY_CORTINA 484 phy_cortina_init(); 485 #endif 486 #ifdef CONFIG_PHY_DAVICOM 487 phy_davicom_init(); 488 #endif 489 #ifdef CONFIG_PHY_ET1011C 490 phy_et1011c_init(); 491 #endif 492 #ifdef CONFIG_PHY_LXT 493 phy_lxt_init(); 494 #endif 495 #ifdef CONFIG_PHY_MARVELL 496 phy_marvell_init(); 497 #endif 498 #ifdef CONFIG_PHY_MICREL_KSZ8XXX 499 phy_micrel_ksz8xxx_init(); 500 #endif 501 #ifdef CONFIG_PHY_MICREL_KSZ90X1 502 phy_micrel_ksz90x1_init(); 503 #endif 504 #ifdef CONFIG_PHY_MESON_GXL 505 phy_meson_gxl_init(); 506 #endif 507 #ifdef CONFIG_PHY_NATSEMI 508 phy_natsemi_init(); 509 #endif 510 #ifdef CONFIG_PHY_REALTEK 511 phy_realtek_init(); 512 #endif 513 #ifdef CONFIG_PHY_SMSC 514 phy_smsc_init(); 515 #endif 516 #ifdef CONFIG_PHY_TERANETICS 517 phy_teranetics_init(); 518 #endif 519 #ifdef CONFIG_PHY_TI 520 phy_ti_init(); 521 #endif 522 #ifdef CONFIG_PHY_VITESSE 523 phy_vitesse_init(); 524 #endif 525 #ifdef CONFIG_PHY_XILINX 526 phy_xilinx_init(); 527 #endif 528 #ifdef CONFIG_PHY_MSCC 529 phy_mscc_init(); 530 #endif 531 #ifdef CONFIG_PHY_FIXED 532 phy_fixed_init(); 533 #endif 534 return 0; 535 } 536 537 int phy_register(struct phy_driver *drv) 538 { 539 INIT_LIST_HEAD(&drv->list); 540 list_add_tail(&drv->list, &phy_drivers); 541 542 #ifdef CONFIG_NEEDS_MANUAL_RELOC 543 if (drv->probe) 544 drv->probe += gd->reloc_off; 545 if (drv->config) 546 drv->config += gd->reloc_off; 547 if (drv->startup) 548 drv->startup += gd->reloc_off; 549 if (drv->shutdown) 550 drv->shutdown += gd->reloc_off; 551 if (drv->readext) 552 drv->readext += gd->reloc_off; 553 if (drv->writeext) 554 drv->writeext += gd->reloc_off; 555 #endif 556 return 0; 557 } 558 559 int phy_set_supported(struct phy_device *phydev, u32 max_speed) 560 { 561 /* The default values for phydev->supported are provided by the PHY 562 * driver "features" member, we want to reset to sane defaults first 563 * before supporting higher speeds. 564 */ 565 phydev->supported &= PHY_DEFAULT_FEATURES; 566 567 switch (max_speed) { 568 default: 569 return -ENOTSUPP; 570 case SPEED_1000: 571 phydev->supported |= PHY_1000BT_FEATURES; 572 /* fall through */ 573 case SPEED_100: 574 phydev->supported |= PHY_100BT_FEATURES; 575 /* fall through */ 576 case SPEED_10: 577 phydev->supported |= PHY_10BT_FEATURES; 578 } 579 580 return 0; 581 } 582 583 static int phy_probe(struct phy_device *phydev) 584 { 585 int err = 0; 586 587 phydev->advertising = phydev->drv->features; 588 phydev->supported = phydev->drv->features; 589 590 phydev->mmds = phydev->drv->mmds; 591 592 if (phydev->drv->probe) 593 err = phydev->drv->probe(phydev); 594 595 return err; 596 } 597 598 static struct phy_driver *generic_for_interface(phy_interface_t interface) 599 { 600 #ifdef CONFIG_PHYLIB_10G 601 if (is_10g_interface(interface)) 602 return &gen10g_driver; 603 #endif 604 605 return &genphy_driver; 606 } 607 608 static struct phy_driver *get_phy_driver(struct phy_device *phydev, 609 phy_interface_t interface) 610 { 611 struct list_head *entry; 612 int phy_id = phydev->phy_id; 613 struct phy_driver *drv = NULL; 614 615 list_for_each(entry, &phy_drivers) { 616 drv = list_entry(entry, struct phy_driver, list); 617 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) 618 return drv; 619 } 620 621 /* If we made it here, there's no driver for this PHY */ 622 return generic_for_interface(interface); 623 } 624 625 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 626 u32 phy_id, 627 phy_interface_t interface) 628 { 629 struct phy_device *dev; 630 631 /* 632 * We allocate the device, and initialize the 633 * default values 634 */ 635 dev = malloc(sizeof(*dev)); 636 if (!dev) { 637 printf("Failed to allocate PHY device for %s:%d\n", 638 bus->name, addr); 639 return NULL; 640 } 641 642 memset(dev, 0, sizeof(*dev)); 643 644 dev->duplex = -1; 645 dev->link = 0; 646 dev->interface = interface; 647 648 dev->autoneg = AUTONEG_ENABLE; 649 650 dev->addr = addr; 651 dev->phy_id = phy_id; 652 dev->bus = bus; 653 654 dev->drv = get_phy_driver(dev, interface); 655 656 phy_probe(dev); 657 658 bus->phymap[addr] = dev; 659 660 return dev; 661 } 662 663 /** 664 * get_phy_id - reads the specified addr for its ID. 665 * @bus: the target MII bus 666 * @addr: PHY address on the MII bus 667 * @phy_id: where to store the ID retrieved. 668 * 669 * Description: Reads the ID registers of the PHY at @addr on the 670 * @bus, stores it in @phy_id and returns zero on success. 671 */ 672 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 673 { 674 int phy_reg; 675 676 /* 677 * Grab the bits from PHYIR1, and put them 678 * in the upper half 679 */ 680 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 681 682 if (phy_reg < 0) 683 return -EIO; 684 685 *phy_id = (phy_reg & 0xffff) << 16; 686 687 /* Grab the bits from PHYIR2, and put them in the lower half */ 688 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 689 690 if (phy_reg < 0) 691 return -EIO; 692 693 *phy_id |= (phy_reg & 0xffff); 694 695 return 0; 696 } 697 698 static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 699 uint phy_mask, int devad, 700 phy_interface_t interface) 701 { 702 u32 phy_id = 0xffffffff; 703 704 while (phy_mask) { 705 int addr = ffs(phy_mask) - 1; 706 int r = get_phy_id(bus, addr, devad, &phy_id); 707 /* If the PHY ID is mostly f's, we didn't find anything */ 708 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) 709 return phy_device_create(bus, addr, phy_id, interface); 710 phy_mask &= ~(1 << addr); 711 } 712 return NULL; 713 } 714 715 static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 716 uint phy_mask, 717 phy_interface_t interface) 718 { 719 /* If we have one, return the existing device, with new interface */ 720 while (phy_mask) { 721 int addr = ffs(phy_mask) - 1; 722 723 if (bus->phymap[addr]) { 724 bus->phymap[addr]->interface = interface; 725 return bus->phymap[addr]; 726 } 727 phy_mask &= ~(1 << addr); 728 } 729 return NULL; 730 } 731 732 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 733 uint phy_mask, 734 phy_interface_t interface) 735 { 736 int i; 737 struct phy_device *phydev; 738 739 phydev = search_for_existing_phy(bus, phy_mask, interface); 740 if (phydev) 741 return phydev; 742 /* Try Standard (ie Clause 22) access */ 743 /* Otherwise we have to try Clause 45 */ 744 for (i = 0; i < 5; i++) { 745 phydev = create_phy_by_mask(bus, phy_mask, 746 i ? i : MDIO_DEVAD_NONE, interface); 747 if (IS_ERR(phydev)) 748 return NULL; 749 if (phydev) 750 return phydev; 751 } 752 753 debug("\n%s PHY: ", bus->name); 754 while (phy_mask) { 755 int addr = ffs(phy_mask) - 1; 756 757 debug("%d ", addr); 758 phy_mask &= ~(1 << addr); 759 } 760 debug("not found\n"); 761 762 return NULL; 763 } 764 765 /** 766 * get_phy_device - reads the specified PHY device and returns its 767 * @phy_device struct 768 * @bus: the target MII bus 769 * @addr: PHY address on the MII bus 770 * 771 * Description: Reads the ID registers of the PHY at @addr on the 772 * @bus, then allocates and returns the phy_device to represent it. 773 */ 774 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 775 phy_interface_t interface) 776 { 777 return get_phy_device_by_mask(bus, 1 << addr, interface); 778 } 779 780 int phy_reset(struct phy_device *phydev) 781 { 782 int reg; 783 int timeout = 500; 784 int devad = MDIO_DEVAD_NONE; 785 786 if (phydev->flags & PHY_FLAG_BROKEN_RESET) 787 return 0; 788 789 #ifdef CONFIG_PHYLIB_10G 790 /* If it's 10G, we need to issue reset through one of the MMDs */ 791 if (is_10g_interface(phydev->interface)) { 792 if (!phydev->mmds) 793 gen10g_discover_mmds(phydev); 794 795 devad = ffs(phydev->mmds) - 1; 796 } 797 #endif 798 799 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { 800 debug("PHY reset failed\n"); 801 return -1; 802 } 803 804 #ifdef CONFIG_PHY_RESET_DELAY 805 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 806 #endif 807 /* 808 * Poll the control register for the reset bit to go to 0 (it is 809 * auto-clearing). This should happen within 0.5 seconds per the 810 * IEEE spec. 811 */ 812 reg = phy_read(phydev, devad, MII_BMCR); 813 while ((reg & BMCR_RESET) && timeout--) { 814 reg = phy_read(phydev, devad, MII_BMCR); 815 816 if (reg < 0) { 817 debug("PHY status read failed\n"); 818 return -1; 819 } 820 udelay(1000); 821 } 822 823 if (reg & BMCR_RESET) { 824 puts("PHY reset timed out\n"); 825 return -1; 826 } 827 828 return 0; 829 } 830 831 int miiphy_reset(const char *devname, unsigned char addr) 832 { 833 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 834 struct phy_device *phydev; 835 836 /* 837 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 838 * If later code tries to connect with the right interface, this will 839 * be corrected by get_phy_device in phy_connect() 840 */ 841 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 842 843 return phy_reset(phydev); 844 } 845 846 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask, 847 phy_interface_t interface) 848 { 849 /* Reset the bus */ 850 if (bus->reset) { 851 bus->reset(bus); 852 853 /* Wait 15ms to make sure the PHY has come out of hard reset */ 854 mdelay(15); 855 } 856 857 return get_phy_device_by_mask(bus, phy_mask, interface); 858 } 859 860 #ifdef CONFIG_DM_ETH 861 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 862 #else 863 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 864 #endif 865 { 866 /* Soft Reset the PHY */ 867 phy_reset(phydev); 868 if (phydev->dev && phydev->dev != dev) { 869 printf("%s:%d is connected to %s. Reconnecting to %s\n", 870 phydev->bus->name, phydev->addr, 871 phydev->dev->name, dev->name); 872 } 873 phydev->dev = dev; 874 debug("%s connected to %s\n", dev->name, phydev->drv->name); 875 } 876 877 #ifdef CONFIG_DM_ETH 878 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 879 struct udevice *dev, 880 phy_interface_t interface) 881 #else 882 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 883 struct eth_device *dev, 884 phy_interface_t interface) 885 #endif 886 { 887 struct phy_device *phydev = NULL; 888 #ifdef CONFIG_PHY_FIXED 889 int sn; 890 const char *name; 891 892 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); 893 while (sn > 0) { 894 name = fdt_get_name(gd->fdt_blob, sn, NULL); 895 if (name && strcmp(name, "fixed-link") == 0) { 896 phydev = phy_device_create(bus, 897 sn, PHY_FIXED_ID, interface); 898 break; 899 } 900 sn = fdt_next_subnode(gd->fdt_blob, sn); 901 } 902 #endif 903 if (!phydev) 904 phydev = phy_find_by_mask(bus, 1 << addr, interface); 905 906 if (phydev) 907 phy_connect_dev(phydev, dev); 908 else 909 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 910 return phydev; 911 } 912 913 /* 914 * Start the PHY. Returns 0 on success, or a negative error code. 915 */ 916 int phy_startup(struct phy_device *phydev) 917 { 918 if (phydev->drv->startup) 919 return phydev->drv->startup(phydev); 920 921 return 0; 922 } 923 924 __weak int board_phy_config(struct phy_device *phydev) 925 { 926 if (phydev->drv->config) 927 return phydev->drv->config(phydev); 928 return 0; 929 } 930 931 int phy_config(struct phy_device *phydev) 932 { 933 /* Invoke an optional board-specific helper */ 934 return board_phy_config(phydev); 935 } 936 937 int phy_shutdown(struct phy_device *phydev) 938 { 939 if (phydev->drv->shutdown) 940 phydev->drv->shutdown(phydev); 941 942 return 0; 943 } 944 945 int phy_get_interface_by_name(const char *str) 946 { 947 int i; 948 949 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 950 if (!strcmp(str, phy_interface_strings[i])) 951 return i; 952 } 953 954 return -1; 955 } 956