1 /* 2 * Generic PHY Management code 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 * 6 * Copyright 2011 Freescale Semiconductor, Inc. 7 * author Andy Fleming 8 * 9 * Based loosely off of Linux's PHY Lib 10 */ 11 12 #include <config.h> 13 #include <common.h> 14 #include <dm.h> 15 #include <malloc.h> 16 #include <net.h> 17 #include <command.h> 18 #include <miiphy.h> 19 #include <phy.h> 20 #include <errno.h> 21 #include <linux/err.h> 22 #include <linux/compiler.h> 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 /* Generic PHY support and helper functions */ 27 28 /** 29 * genphy_config_advert - sanitize and advertise auto-negotation parameters 30 * @phydev: target phy_device struct 31 * 32 * Description: Writes MII_ADVERTISE with the appropriate values, 33 * after sanitizing the values to make sure we only advertise 34 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 35 * hasn't changed, and > 0 if it has changed. 36 */ 37 static int genphy_config_advert(struct phy_device *phydev) 38 { 39 u32 advertise; 40 int oldadv, adv; 41 int err, changed = 0; 42 43 /* Only allow advertising what 44 * this PHY supports */ 45 phydev->advertising &= phydev->supported; 46 advertise = phydev->advertising; 47 48 /* Setup standard advertisement */ 49 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 50 51 if (adv < 0) 52 return adv; 53 54 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 55 ADVERTISE_PAUSE_ASYM); 56 if (advertise & ADVERTISED_10baseT_Half) 57 adv |= ADVERTISE_10HALF; 58 if (advertise & ADVERTISED_10baseT_Full) 59 adv |= ADVERTISE_10FULL; 60 if (advertise & ADVERTISED_100baseT_Half) 61 adv |= ADVERTISE_100HALF; 62 if (advertise & ADVERTISED_100baseT_Full) 63 adv |= ADVERTISE_100FULL; 64 if (advertise & ADVERTISED_Pause) 65 adv |= ADVERTISE_PAUSE_CAP; 66 if (advertise & ADVERTISED_Asym_Pause) 67 adv |= ADVERTISE_PAUSE_ASYM; 68 if (advertise & ADVERTISED_1000baseX_Half) 69 adv |= ADVERTISE_1000XHALF; 70 if (advertise & ADVERTISED_1000baseX_Full) 71 adv |= ADVERTISE_1000XFULL; 72 73 if (adv != oldadv) { 74 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 75 76 if (err < 0) 77 return err; 78 changed = 1; 79 } 80 81 /* Configure gigabit if it's supported */ 82 if (phydev->supported & (SUPPORTED_1000baseT_Half | 83 SUPPORTED_1000baseT_Full)) { 84 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 85 86 if (adv < 0) 87 return adv; 88 89 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 90 if (advertise & SUPPORTED_1000baseT_Half) 91 adv |= ADVERTISE_1000HALF; 92 if (advertise & SUPPORTED_1000baseT_Full) 93 adv |= ADVERTISE_1000FULL; 94 95 if (adv != oldadv) { 96 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 97 adv); 98 99 if (err < 0) 100 return err; 101 changed = 1; 102 } 103 } 104 105 return changed; 106 } 107 108 109 /** 110 * genphy_setup_forced - configures/forces speed/duplex from @phydev 111 * @phydev: target phy_device struct 112 * 113 * Description: Configures MII_BMCR to force speed/duplex 114 * to the values in phydev. Assumes that the values are valid. 115 */ 116 static int genphy_setup_forced(struct phy_device *phydev) 117 { 118 int err; 119 int ctl = 0; 120 121 phydev->pause = phydev->asym_pause = 0; 122 123 if (SPEED_1000 == phydev->speed) 124 ctl |= BMCR_SPEED1000; 125 else if (SPEED_100 == phydev->speed) 126 ctl |= BMCR_SPEED100; 127 128 if (DUPLEX_FULL == phydev->duplex) 129 ctl |= BMCR_FULLDPLX; 130 131 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 132 133 return err; 134 } 135 136 137 /** 138 * genphy_restart_aneg - Enable and Restart Autonegotiation 139 * @phydev: target phy_device struct 140 */ 141 int genphy_restart_aneg(struct phy_device *phydev) 142 { 143 int ctl; 144 145 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 146 147 if (ctl < 0) 148 return ctl; 149 150 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 151 152 /* Don't isolate the PHY if we're negotiating */ 153 ctl &= ~(BMCR_ISOLATE); 154 155 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 156 157 return ctl; 158 } 159 160 161 /** 162 * genphy_config_aneg - restart auto-negotiation or write BMCR 163 * @phydev: target phy_device struct 164 * 165 * Description: If auto-negotiation is enabled, we configure the 166 * advertising, and then restart auto-negotiation. If it is not 167 * enabled, then we write the BMCR. 168 */ 169 int genphy_config_aneg(struct phy_device *phydev) 170 { 171 int result; 172 173 if (AUTONEG_ENABLE != phydev->autoneg) 174 return genphy_setup_forced(phydev); 175 176 result = genphy_config_advert(phydev); 177 178 if (result < 0) /* error */ 179 return result; 180 181 if (result == 0) { 182 /* Advertisment hasn't changed, but maybe aneg was never on to 183 * begin with? Or maybe phy was isolated? */ 184 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 185 186 if (ctl < 0) 187 return ctl; 188 189 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 190 result = 1; /* do restart aneg */ 191 } 192 193 /* Only restart aneg if we are advertising something different 194 * than we were before. */ 195 if (result > 0) 196 result = genphy_restart_aneg(phydev); 197 198 return result; 199 } 200 201 /** 202 * genphy_update_link - update link status in @phydev 203 * @phydev: target phy_device struct 204 * 205 * Description: Update the value in phydev->link to reflect the 206 * current link value. In order to do this, we need to read 207 * the status register twice, keeping the second value. 208 */ 209 int genphy_update_link(struct phy_device *phydev) 210 { 211 unsigned int mii_reg; 212 213 /* 214 * Wait if the link is up, and autonegotiation is in progress 215 * (ie - we're capable and it's not done) 216 */ 217 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 218 219 /* 220 * If we already saw the link up, and it hasn't gone down, then 221 * we don't need to wait for autoneg again 222 */ 223 if (phydev->link && mii_reg & BMSR_LSTATUS) 224 return 0; 225 226 if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) { 227 int i = 0; 228 229 printf("%s Waiting for PHY auto negotiation to complete", 230 phydev->dev->name); 231 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 232 /* 233 * Timeout reached ? 234 */ 235 if (i > PHY_ANEG_TIMEOUT) { 236 printf(" TIMEOUT !\n"); 237 phydev->link = 0; 238 return 0; 239 } 240 241 if (ctrlc()) { 242 puts("user interrupt!\n"); 243 phydev->link = 0; 244 return -EINTR; 245 } 246 247 if ((i++ % 500) == 0) 248 printf("."); 249 250 udelay(1000); /* 1 ms */ 251 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 252 } 253 printf(" done\n"); 254 phydev->link = 1; 255 } else { 256 /* Read the link a second time to clear the latched state */ 257 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 258 259 if (mii_reg & BMSR_LSTATUS) 260 phydev->link = 1; 261 else 262 phydev->link = 0; 263 } 264 265 return 0; 266 } 267 268 /* 269 * Generic function which updates the speed and duplex. If 270 * autonegotiation is enabled, it uses the AND of the link 271 * partner's advertised capabilities and our advertised 272 * capabilities. If autonegotiation is disabled, we use the 273 * appropriate bits in the control register. 274 * 275 * Stolen from Linux's mii.c and phy_device.c 276 */ 277 int genphy_parse_link(struct phy_device *phydev) 278 { 279 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 280 281 /* We're using autonegotiation */ 282 if (phydev->supported & SUPPORTED_Autoneg) { 283 u32 lpa = 0; 284 int gblpa = 0; 285 u32 estatus = 0; 286 287 /* Check for gigabit capability */ 288 if (phydev->supported & (SUPPORTED_1000baseT_Full | 289 SUPPORTED_1000baseT_Half)) { 290 /* We want a list of states supported by 291 * both PHYs in the link 292 */ 293 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 294 if (gblpa < 0) { 295 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); 296 gblpa = 0; 297 } 298 gblpa &= phy_read(phydev, 299 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 300 } 301 302 /* Set the baseline so we only have to set them 303 * if they're different 304 */ 305 phydev->speed = SPEED_10; 306 phydev->duplex = DUPLEX_HALF; 307 308 /* Check the gigabit fields */ 309 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 310 phydev->speed = SPEED_1000; 311 312 if (gblpa & PHY_1000BTSR_1000FD) 313 phydev->duplex = DUPLEX_FULL; 314 315 /* We're done! */ 316 return 0; 317 } 318 319 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 320 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 321 322 if (lpa & (LPA_100FULL | LPA_100HALF)) { 323 phydev->speed = SPEED_100; 324 325 if (lpa & LPA_100FULL) 326 phydev->duplex = DUPLEX_FULL; 327 328 } else if (lpa & LPA_10FULL) 329 phydev->duplex = DUPLEX_FULL; 330 331 /* 332 * Extended status may indicate that the PHY supports 333 * 1000BASE-T/X even though the 1000BASE-T registers 334 * are missing. In this case we can't tell whether the 335 * peer also supports it, so we only check extended 336 * status if the 1000BASE-T registers are actually 337 * missing. 338 */ 339 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 340 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 341 MII_ESTATUS); 342 343 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 344 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 345 phydev->speed = SPEED_1000; 346 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) 347 phydev->duplex = DUPLEX_FULL; 348 } 349 350 } else { 351 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 352 353 phydev->speed = SPEED_10; 354 phydev->duplex = DUPLEX_HALF; 355 356 if (bmcr & BMCR_FULLDPLX) 357 phydev->duplex = DUPLEX_FULL; 358 359 if (bmcr & BMCR_SPEED1000) 360 phydev->speed = SPEED_1000; 361 else if (bmcr & BMCR_SPEED100) 362 phydev->speed = SPEED_100; 363 } 364 365 return 0; 366 } 367 368 int genphy_config(struct phy_device *phydev) 369 { 370 int val; 371 u32 features; 372 373 /* For now, I'll claim that the generic driver supports 374 * all possible port types */ 375 features = (SUPPORTED_TP | SUPPORTED_MII 376 | SUPPORTED_AUI | SUPPORTED_FIBRE | 377 SUPPORTED_BNC); 378 379 /* Do we support autonegotiation? */ 380 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 381 382 if (val < 0) 383 return val; 384 385 if (val & BMSR_ANEGCAPABLE) 386 features |= SUPPORTED_Autoneg; 387 388 if (val & BMSR_100FULL) 389 features |= SUPPORTED_100baseT_Full; 390 if (val & BMSR_100HALF) 391 features |= SUPPORTED_100baseT_Half; 392 if (val & BMSR_10FULL) 393 features |= SUPPORTED_10baseT_Full; 394 if (val & BMSR_10HALF) 395 features |= SUPPORTED_10baseT_Half; 396 397 if (val & BMSR_ESTATEN) { 398 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 399 400 if (val < 0) 401 return val; 402 403 if (val & ESTATUS_1000_TFULL) 404 features |= SUPPORTED_1000baseT_Full; 405 if (val & ESTATUS_1000_THALF) 406 features |= SUPPORTED_1000baseT_Half; 407 if (val & ESTATUS_1000_XFULL) 408 features |= SUPPORTED_1000baseX_Full; 409 if (val & ESTATUS_1000_XHALF) 410 features |= SUPPORTED_1000baseX_Half; 411 } 412 413 phydev->supported = features; 414 phydev->advertising = features; 415 416 genphy_config_aneg(phydev); 417 418 return 0; 419 } 420 421 int genphy_startup(struct phy_device *phydev) 422 { 423 genphy_update_link(phydev); 424 genphy_parse_link(phydev); 425 426 return 0; 427 } 428 429 int genphy_shutdown(struct phy_device *phydev) 430 { 431 return 0; 432 } 433 434 static struct phy_driver genphy_driver = { 435 .uid = 0xffffffff, 436 .mask = 0xffffffff, 437 .name = "Generic PHY", 438 .features = 0, 439 .config = genphy_config, 440 .startup = genphy_startup, 441 .shutdown = genphy_shutdown, 442 }; 443 444 static LIST_HEAD(phy_drivers); 445 446 int phy_init(void) 447 { 448 #ifdef CONFIG_PHY_AQUANTIA 449 phy_aquantia_init(); 450 #endif 451 #ifdef CONFIG_PHY_ATHEROS 452 phy_atheros_init(); 453 #endif 454 #ifdef CONFIG_PHY_BROADCOM 455 phy_broadcom_init(); 456 #endif 457 #ifdef CONFIG_PHY_CORTINA 458 phy_cortina_init(); 459 #endif 460 #ifdef CONFIG_PHY_DAVICOM 461 phy_davicom_init(); 462 #endif 463 #ifdef CONFIG_PHY_ET1011C 464 phy_et1011c_init(); 465 #endif 466 #ifdef CONFIG_PHY_LXT 467 phy_lxt_init(); 468 #endif 469 #ifdef CONFIG_PHY_MARVELL 470 phy_marvell_init(); 471 #endif 472 #ifdef CONFIG_PHY_MICREL 473 phy_micrel_init(); 474 #endif 475 #ifdef CONFIG_PHY_NATSEMI 476 phy_natsemi_init(); 477 #endif 478 #ifdef CONFIG_PHY_REALTEK 479 phy_realtek_init(); 480 #endif 481 #ifdef CONFIG_PHY_SMSC 482 phy_smsc_init(); 483 #endif 484 #ifdef CONFIG_PHY_TERANETICS 485 phy_teranetics_init(); 486 #endif 487 #ifdef CONFIG_PHY_VITESSE 488 phy_vitesse_init(); 489 #endif 490 491 return 0; 492 } 493 494 int phy_register(struct phy_driver *drv) 495 { 496 INIT_LIST_HEAD(&drv->list); 497 list_add_tail(&drv->list, &phy_drivers); 498 499 #ifdef CONFIG_NEEDS_MANUAL_RELOC 500 if (drv->probe) 501 drv->probe += gd->reloc_off; 502 if (drv->config) 503 drv->config += gd->reloc_off; 504 if (drv->startup) 505 drv->startup += gd->reloc_off; 506 if (drv->shutdown) 507 drv->shutdown += gd->reloc_off; 508 if (drv->readext) 509 drv->readext += gd->reloc_off; 510 if (drv->writeext) 511 drv->writeext += gd->reloc_off; 512 #endif 513 return 0; 514 } 515 516 static int phy_probe(struct phy_device *phydev) 517 { 518 int err = 0; 519 520 phydev->advertising = phydev->supported = phydev->drv->features; 521 phydev->mmds = phydev->drv->mmds; 522 523 if (phydev->drv->probe) 524 err = phydev->drv->probe(phydev); 525 526 return err; 527 } 528 529 static struct phy_driver *generic_for_interface(phy_interface_t interface) 530 { 531 #ifdef CONFIG_PHYLIB_10G 532 if (is_10g_interface(interface)) 533 return &gen10g_driver; 534 #endif 535 536 return &genphy_driver; 537 } 538 539 static struct phy_driver *get_phy_driver(struct phy_device *phydev, 540 phy_interface_t interface) 541 { 542 struct list_head *entry; 543 int phy_id = phydev->phy_id; 544 struct phy_driver *drv = NULL; 545 546 list_for_each(entry, &phy_drivers) { 547 drv = list_entry(entry, struct phy_driver, list); 548 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) 549 return drv; 550 } 551 552 /* If we made it here, there's no driver for this PHY */ 553 return generic_for_interface(interface); 554 } 555 556 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 557 int phy_id, 558 phy_interface_t interface) 559 { 560 struct phy_device *dev; 561 562 /* We allocate the device, and initialize the 563 * default values */ 564 dev = malloc(sizeof(*dev)); 565 if (!dev) { 566 printf("Failed to allocate PHY device for %s:%d\n", 567 bus->name, addr); 568 return NULL; 569 } 570 571 memset(dev, 0, sizeof(*dev)); 572 573 dev->duplex = -1; 574 dev->link = 1; 575 dev->interface = interface; 576 577 dev->autoneg = AUTONEG_ENABLE; 578 579 dev->addr = addr; 580 dev->phy_id = phy_id; 581 dev->bus = bus; 582 583 dev->drv = get_phy_driver(dev, interface); 584 585 phy_probe(dev); 586 587 bus->phymap[addr] = dev; 588 589 return dev; 590 } 591 592 /** 593 * get_phy_id - reads the specified addr for its ID. 594 * @bus: the target MII bus 595 * @addr: PHY address on the MII bus 596 * @phy_id: where to store the ID retrieved. 597 * 598 * Description: Reads the ID registers of the PHY at @addr on the 599 * @bus, stores it in @phy_id and returns zero on success. 600 */ 601 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 602 { 603 int phy_reg; 604 605 /* Grab the bits from PHYIR1, and put them 606 * in the upper half */ 607 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 608 609 if (phy_reg < 0) 610 return -EIO; 611 612 *phy_id = (phy_reg & 0xffff) << 16; 613 614 /* Grab the bits from PHYIR2, and put them in the lower half */ 615 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 616 617 if (phy_reg < 0) 618 return -EIO; 619 620 *phy_id |= (phy_reg & 0xffff); 621 622 return 0; 623 } 624 625 static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 626 unsigned phy_mask, int devad, phy_interface_t interface) 627 { 628 u32 phy_id = 0xffffffff; 629 while (phy_mask) { 630 int addr = ffs(phy_mask) - 1; 631 int r = get_phy_id(bus, addr, devad, &phy_id); 632 /* If the PHY ID is mostly f's, we didn't find anything */ 633 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) 634 return phy_device_create(bus, addr, phy_id, interface); 635 phy_mask &= ~(1 << addr); 636 } 637 return NULL; 638 } 639 640 static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 641 unsigned phy_mask, phy_interface_t interface) 642 { 643 /* If we have one, return the existing device, with new interface */ 644 while (phy_mask) { 645 int addr = ffs(phy_mask) - 1; 646 if (bus->phymap[addr]) { 647 bus->phymap[addr]->interface = interface; 648 return bus->phymap[addr]; 649 } 650 phy_mask &= ~(1 << addr); 651 } 652 return NULL; 653 } 654 655 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 656 unsigned phy_mask, phy_interface_t interface) 657 { 658 int i; 659 struct phy_device *phydev; 660 661 phydev = search_for_existing_phy(bus, phy_mask, interface); 662 if (phydev) 663 return phydev; 664 /* Try Standard (ie Clause 22) access */ 665 /* Otherwise we have to try Clause 45 */ 666 for (i = 0; i < 5; i++) { 667 phydev = create_phy_by_mask(bus, phy_mask, 668 i ? i : MDIO_DEVAD_NONE, interface); 669 if (IS_ERR(phydev)) 670 return NULL; 671 if (phydev) 672 return phydev; 673 } 674 printf("Phy %d not found\n", ffs(phy_mask) - 1); 675 return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface); 676 } 677 678 /** 679 * get_phy_device - reads the specified PHY device and returns its @phy_device struct 680 * @bus: the target MII bus 681 * @addr: PHY address on the MII bus 682 * 683 * Description: Reads the ID registers of the PHY at @addr on the 684 * @bus, then allocates and returns the phy_device to represent it. 685 */ 686 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 687 phy_interface_t interface) 688 { 689 return get_phy_device_by_mask(bus, 1 << addr, interface); 690 } 691 692 int phy_reset(struct phy_device *phydev) 693 { 694 int reg; 695 int timeout = 500; 696 int devad = MDIO_DEVAD_NONE; 697 698 #ifdef CONFIG_PHYLIB_10G 699 /* If it's 10G, we need to issue reset through one of the MMDs */ 700 if (is_10g_interface(phydev->interface)) { 701 if (!phydev->mmds) 702 gen10g_discover_mmds(phydev); 703 704 devad = ffs(phydev->mmds) - 1; 705 } 706 #endif 707 708 reg = phy_read(phydev, devad, MII_BMCR); 709 if (reg < 0) { 710 debug("PHY status read failed\n"); 711 return -1; 712 } 713 714 reg |= BMCR_RESET; 715 716 if (phy_write(phydev, devad, MII_BMCR, reg) < 0) { 717 debug("PHY reset failed\n"); 718 return -1; 719 } 720 721 #ifdef CONFIG_PHY_RESET_DELAY 722 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 723 #endif 724 /* 725 * Poll the control register for the reset bit to go to 0 (it is 726 * auto-clearing). This should happen within 0.5 seconds per the 727 * IEEE spec. 728 */ 729 while ((reg & BMCR_RESET) && timeout--) { 730 reg = phy_read(phydev, devad, MII_BMCR); 731 732 if (reg < 0) { 733 debug("PHY status read failed\n"); 734 return -1; 735 } 736 udelay(1000); 737 } 738 739 if (reg & BMCR_RESET) { 740 puts("PHY reset timed out\n"); 741 return -1; 742 } 743 744 return 0; 745 } 746 747 int miiphy_reset(const char *devname, unsigned char addr) 748 { 749 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 750 struct phy_device *phydev; 751 752 /* 753 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 754 * If later code tries to connect with the right interface, this will 755 * be corrected by get_phy_device in phy_connect() 756 */ 757 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 758 759 return phy_reset(phydev); 760 } 761 762 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, 763 phy_interface_t interface) 764 { 765 /* Reset the bus */ 766 if (bus->reset) 767 bus->reset(bus); 768 769 /* Wait 15ms to make sure the PHY has come out of hard reset */ 770 udelay(15000); 771 return get_phy_device_by_mask(bus, phy_mask, interface); 772 } 773 774 #ifdef CONFIG_DM_ETH 775 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 776 #else 777 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 778 #endif 779 { 780 /* Soft Reset the PHY */ 781 phy_reset(phydev); 782 if (phydev->dev) { 783 printf("%s:%d is connected to %s. Reconnecting to %s\n", 784 phydev->bus->name, phydev->addr, 785 phydev->dev->name, dev->name); 786 } 787 phydev->dev = dev; 788 debug("%s connected to %s\n", dev->name, phydev->drv->name); 789 } 790 791 #ifdef CONFIG_DM_ETH 792 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 793 struct udevice *dev, phy_interface_t interface) 794 #else 795 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 796 struct eth_device *dev, phy_interface_t interface) 797 #endif 798 { 799 struct phy_device *phydev; 800 801 phydev = phy_find_by_mask(bus, 1 << addr, interface); 802 if (phydev) 803 phy_connect_dev(phydev, dev); 804 else 805 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 806 return phydev; 807 } 808 809 /* 810 * Start the PHY. Returns 0 on success, or a negative error code. 811 */ 812 int phy_startup(struct phy_device *phydev) 813 { 814 if (phydev->drv->startup) 815 return phydev->drv->startup(phydev); 816 817 return 0; 818 } 819 820 __weak int board_phy_config(struct phy_device *phydev) 821 { 822 if (phydev->drv->config) 823 return phydev->drv->config(phydev); 824 return 0; 825 } 826 827 int phy_config(struct phy_device *phydev) 828 { 829 /* Invoke an optional board-specific helper */ 830 board_phy_config(phydev); 831 832 return 0; 833 } 834 835 int phy_shutdown(struct phy_device *phydev) 836 { 837 if (phydev->drv->shutdown) 838 phydev->drv->shutdown(phydev); 839 840 return 0; 841 } 842 843 int phy_get_interface_by_name(const char *str) 844 { 845 int i; 846 847 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 848 if (!strcmp(str, phy_interface_strings[i])) 849 return i; 850 } 851 852 return -1; 853 } 854