1 /* 2 * Meson GXL Internal PHY Driver 3 * 4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 5 * Copyright (C) 2016 BayLibre, SAS. All rights reserved. 6 * Author: Neil Armstrong <narmstrong@baylibre.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 #include <config.h> 11 #include <common.h> 12 #include <linux/bitops.h> 13 #include <phy.h> 14 15 static int meson_gxl_phy_config(struct phy_device *phydev) 16 { 17 /* Enable Analog and DSP register Bank access by */ 18 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); 19 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); 20 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); 21 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); 22 23 /* Write Analog register 23 */ 24 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x8E0D); 25 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x4417); 26 27 /* Enable fractional PLL */ 28 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x0005); 29 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1B); 30 31 /* Program fraction FR_PLL_DIV1 */ 32 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x029A); 33 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1D); 34 35 /* Program fraction FR_PLL_DIV1 */ 36 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0xAAAA); 37 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1C); 38 39 return genphy_config(phydev); 40 } 41 42 static struct phy_driver meson_gxl_phy_driver = { 43 .name = "Meson GXL Internal PHY", 44 .uid = 0x01814400, 45 .mask = 0xfffffff0, 46 .features = PHY_BASIC_FEATURES, 47 .config = &meson_gxl_phy_config, 48 .startup = &genphy_startup, 49 .shutdown = &genphy_shutdown, 50 }; 51 52 int phy_meson_gxl_init(void) 53 { 54 phy_register(&meson_gxl_phy_driver); 55 56 return 0; 57 } 58