xref: /openbmc/u-boot/drivers/net/phy/davicom.c (revision c6af2e7d)
1 /*
2  * Davicom PHY drivers
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17  * MA 02111-1307 USA
18  *
19  * Copyright 2010-2011 Freescale Semiconductor, Inc.
20  * author Andy Fleming
21  *
22  */
23 #include <phy.h>
24 
25 #define MIIM_DM9161_SCR                0x10
26 #define MIIM_DM9161_SCR_INIT   0x0610
27 
28 /* DM9161 Specified Configuration and Status Register */
29 #define MIIM_DM9161_SCSR       0x11
30 #define MIIM_DM9161_SCSR_100F  0x8000
31 #define MIIM_DM9161_SCSR_100H  0x4000
32 #define MIIM_DM9161_SCSR_10F   0x2000
33 #define MIIM_DM9161_SCSR_10H   0x1000
34 
35 /* DM9161 10BT Configuration/Status */
36 #define MIIM_DM9161_10BTCSR    0x12
37 #define MIIM_DM9161_10BTCSR_INIT       0x7800
38 
39 
40 /* Davicom DM9161E */
41 static int dm9161_config(struct phy_device *phydev)
42 {
43 	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_ISOLATE);
44 	/* Do not bypass the scrambler/descrambler */
45 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_SCR,
46 			MIIM_DM9161_SCR_INIT);
47 	/* Clear 10BTCSR to default */
48 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_10BTCSR,
49 			MIIM_DM9161_10BTCSR_INIT);
50 
51 	genphy_config_aneg(phydev);
52 
53 	return 0;
54 }
55 
56 static int dm9161_parse_status(struct phy_device *phydev)
57 {
58 	int mii_reg;
59 
60 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_SCSR);
61 
62 	if (mii_reg & (MIIM_DM9161_SCSR_100F | MIIM_DM9161_SCSR_100H))
63 		phydev->speed = SPEED_100;
64 	else
65 		phydev->speed = SPEED_10;
66 
67 	if (mii_reg & (MIIM_DM9161_SCSR_100F | MIIM_DM9161_SCSR_10F))
68 		phydev->duplex = DUPLEX_FULL;
69 	else
70 		phydev->duplex = DUPLEX_HALF;
71 
72 	return 0;
73 }
74 
75 static int dm9161_startup(struct phy_device *phydev)
76 {
77 	genphy_update_link(phydev);
78 	dm9161_parse_status(phydev);
79 
80 	return 0;
81 }
82 
83 static struct phy_driver DM9161_driver = {
84 	.name = "Davicom DM9161E",
85 	.uid = 0x181b880,
86 	.mask = 0xffffff0,
87 	.features = PHY_BASIC_FEATURES,
88 	.config = &dm9161_config,
89 	.startup = &dm9161_startup,
90 	.shutdown = &genphy_shutdown,
91 };
92 
93 int phy_davicom_init(void)
94 {
95 	phy_register(&DM9161_driver);
96 
97 	return 0;
98 }
99