1 /* 2 * Copyright (C) 2005-2006 Atmel Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef __DRIVERS_MACB_H__ 7 #define __DRIVERS_MACB_H__ 8 9 /* MACB register offsets */ 10 #define MACB_NCR 0x0000 11 #define MACB_NCFGR 0x0004 12 #define MACB_NSR 0x0008 13 #define GEM_UR 0x000c 14 #define MACB_DMACFG 0x0010 15 #define MACB_TSR 0x0014 16 #define MACB_RBQP 0x0018 17 #define MACB_TBQP 0x001c 18 #define MACB_RSR 0x0020 19 #define MACB_ISR 0x0024 20 #define MACB_IER 0x0028 21 #define MACB_IDR 0x002c 22 #define MACB_IMR 0x0030 23 #define MACB_MAN 0x0034 24 #define MACB_PTR 0x0038 25 #define MACB_PFR 0x003c 26 #define MACB_FTO 0x0040 27 #define MACB_SCF 0x0044 28 #define MACB_MCF 0x0048 29 #define MACB_FRO 0x004c 30 #define MACB_FCSE 0x0050 31 #define MACB_ALE 0x0054 32 #define MACB_DTF 0x0058 33 #define MACB_LCOL 0x005c 34 #define MACB_EXCOL 0x0060 35 #define MACB_TUND 0x0064 36 #define MACB_CSE 0x0068 37 #define MACB_RRE 0x006c 38 #define MACB_ROVR 0x0070 39 #define MACB_RSE 0x0074 40 #define MACB_ELE 0x0078 41 #define MACB_RJA 0x007c 42 #define MACB_USF 0x0080 43 #define MACB_STE 0x0084 44 #define MACB_RLE 0x0088 45 #define MACB_TPF 0x008c 46 #define MACB_HRB 0x0090 47 #define MACB_HRT 0x0094 48 #define MACB_SA1B 0x0098 49 #define MACB_SA1T 0x009c 50 #define MACB_SA2B 0x00a0 51 #define MACB_SA2T 0x00a4 52 #define MACB_SA3B 0x00a8 53 #define MACB_SA3T 0x00ac 54 #define MACB_SA4B 0x00b0 55 #define MACB_SA4T 0x00b4 56 #define MACB_TID 0x00b8 57 #define MACB_TPQ 0x00bc 58 #define MACB_USRIO 0x00c0 59 #define MACB_WOL 0x00c4 60 #define MACB_MID 0x00fc 61 62 /* GEM specific register offsets */ 63 #define GEM_DCFG1 0x0280 64 #define GEM_DCFG6 0x0294 65 66 #define MACB_MAX_QUEUES 8 67 68 /* GEM specific multi queues register offset */ 69 /* hw_q can be 0~7 */ 70 #define GEM_TBQP(hw_q) (0x0440 + ((hw_q) << 2)) 71 72 /* Bitfields in NCR */ 73 #define MACB_LB_OFFSET 0 74 #define MACB_LB_SIZE 1 75 #define MACB_LLB_OFFSET 1 76 #define MACB_LLB_SIZE 1 77 #define MACB_RE_OFFSET 2 78 #define MACB_RE_SIZE 1 79 #define MACB_TE_OFFSET 3 80 #define MACB_TE_SIZE 1 81 #define MACB_MPE_OFFSET 4 82 #define MACB_MPE_SIZE 1 83 #define MACB_CLRSTAT_OFFSET 5 84 #define MACB_CLRSTAT_SIZE 1 85 #define MACB_INCSTAT_OFFSET 6 86 #define MACB_INCSTAT_SIZE 1 87 #define MACB_WESTAT_OFFSET 7 88 #define MACB_WESTAT_SIZE 1 89 #define MACB_BP_OFFSET 8 90 #define MACB_BP_SIZE 1 91 #define MACB_TSTART_OFFSET 9 92 #define MACB_TSTART_SIZE 1 93 #define MACB_THALT_OFFSET 10 94 #define MACB_THALT_SIZE 1 95 #define MACB_NCR_TPF_OFFSET 11 96 #define MACB_NCR_TPF_SIZE 1 97 #define MACB_TZQ_OFFSET 12 98 #define MACB_TZQ_SIZE 1 99 100 /* Bitfields in NCFGR */ 101 #define MACB_SPD_OFFSET 0 102 #define MACB_SPD_SIZE 1 103 #define MACB_FD_OFFSET 1 104 #define MACB_FD_SIZE 1 105 #define MACB_BIT_RATE_OFFSET 2 106 #define MACB_BIT_RATE_SIZE 1 107 #define MACB_JFRAME_OFFSET 3 108 #define MACB_JFRAME_SIZE 1 109 #define MACB_CAF_OFFSET 4 110 #define MACB_CAF_SIZE 1 111 #define MACB_NBC_OFFSET 5 112 #define MACB_NBC_SIZE 1 113 #define MACB_NCFGR_MTI_OFFSET 6 114 #define MACB_NCFGR_MTI_SIZE 1 115 #define MACB_UNI_OFFSET 7 116 #define MACB_UNI_SIZE 1 117 #define MACB_BIG_OFFSET 8 118 #define MACB_BIG_SIZE 1 119 #define MACB_EAE_OFFSET 9 120 #define MACB_EAE_SIZE 1 121 #define MACB_CLK_OFFSET 10 122 #define MACB_CLK_SIZE 2 123 #define MACB_RTY_OFFSET 12 124 #define MACB_RTY_SIZE 1 125 #define MACB_PAE_OFFSET 13 126 #define MACB_PAE_SIZE 1 127 #define MACB_RBOF_OFFSET 14 128 #define MACB_RBOF_SIZE 2 129 #define MACB_RLCE_OFFSET 16 130 #define MACB_RLCE_SIZE 1 131 #define MACB_DRFCS_OFFSET 17 132 #define MACB_DRFCS_SIZE 1 133 #define MACB_EFRHD_OFFSET 18 134 #define MACB_EFRHD_SIZE 1 135 #define MACB_IRXFCS_OFFSET 19 136 #define MACB_IRXFCS_SIZE 1 137 138 #define GEM_GBE_OFFSET 10 139 #define GEM_GBE_SIZE 1 140 #define GEM_CLK_OFFSET 18 141 #define GEM_CLK_SIZE 3 142 #define GEM_DBW_OFFSET 21 143 #define GEM_DBW_SIZE 2 144 145 /* Bitfields in NSR */ 146 #define MACB_NSR_LINK_OFFSET 0 147 #define MACB_NSR_LINK_SIZE 1 148 #define MACB_MDIO_OFFSET 1 149 #define MACB_MDIO_SIZE 1 150 #define MACB_IDLE_OFFSET 2 151 #define MACB_IDLE_SIZE 1 152 153 /* Bitfields in UR */ 154 #define GEM_RGMII_OFFSET 0 155 #define GEM_RGMII_SIZE 1 156 157 /* Bitfields in TSR */ 158 #define MACB_UBR_OFFSET 0 159 #define MACB_UBR_SIZE 1 160 #define MACB_COL_OFFSET 1 161 #define MACB_COL_SIZE 1 162 #define MACB_TSR_RLE_OFFSET 2 163 #define MACB_TSR_RLE_SIZE 1 164 #define MACB_TGO_OFFSET 3 165 #define MACB_TGO_SIZE 1 166 #define MACB_BEX_OFFSET 4 167 #define MACB_BEX_SIZE 1 168 #define MACB_COMP_OFFSET 5 169 #define MACB_COMP_SIZE 1 170 #define MACB_UND_OFFSET 6 171 #define MACB_UND_SIZE 1 172 173 /* Bitfields in RSR */ 174 #define MACB_BNA_OFFSET 0 175 #define MACB_BNA_SIZE 1 176 #define MACB_REC_OFFSET 1 177 #define MACB_REC_SIZE 1 178 #define MACB_OVR_OFFSET 2 179 #define MACB_OVR_SIZE 1 180 181 /* Bitfields in ISR/IER/IDR/IMR */ 182 #define MACB_MFD_OFFSET 0 183 #define MACB_MFD_SIZE 1 184 #define MACB_RCOMP_OFFSET 1 185 #define MACB_RCOMP_SIZE 1 186 #define MACB_RXUBR_OFFSET 2 187 #define MACB_RXUBR_SIZE 1 188 #define MACB_TXUBR_OFFSET 3 189 #define MACB_TXUBR_SIZE 1 190 #define MACB_ISR_TUND_OFFSET 4 191 #define MACB_ISR_TUND_SIZE 1 192 #define MACB_ISR_RLE_OFFSET 5 193 #define MACB_ISR_RLE_SIZE 1 194 #define MACB_TXERR_OFFSET 6 195 #define MACB_TXERR_SIZE 1 196 #define MACB_TCOMP_OFFSET 7 197 #define MACB_TCOMP_SIZE 1 198 #define MACB_ISR_LINK_OFFSET 9 199 #define MACB_ISR_LINK_SIZE 1 200 #define MACB_ISR_ROVR_OFFSET 10 201 #define MACB_ISR_ROVR_SIZE 1 202 #define MACB_HRESP_OFFSET 11 203 #define MACB_HRESP_SIZE 1 204 #define MACB_PFR_OFFSET 12 205 #define MACB_PFR_SIZE 1 206 #define MACB_PTZ_OFFSET 13 207 #define MACB_PTZ_SIZE 1 208 209 /* Bitfields in MAN */ 210 #define MACB_DATA_OFFSET 0 211 #define MACB_DATA_SIZE 16 212 #define MACB_CODE_OFFSET 16 213 #define MACB_CODE_SIZE 2 214 #define MACB_REGA_OFFSET 18 215 #define MACB_REGA_SIZE 5 216 #define MACB_PHYA_OFFSET 23 217 #define MACB_PHYA_SIZE 5 218 #define MACB_RW_OFFSET 28 219 #define MACB_RW_SIZE 2 220 #define MACB_SOF_OFFSET 30 221 #define MACB_SOF_SIZE 2 222 223 /* Bitfields in USRIO */ 224 #define MACB_MII_OFFSET 0 225 #define MACB_MII_SIZE 1 226 #define MACB_EAM_OFFSET 1 227 #define MACB_EAM_SIZE 1 228 #define MACB_TX_PAUSE_OFFSET 2 229 #define MACB_TX_PAUSE_SIZE 1 230 #define MACB_TX_PAUSE_ZERO_OFFSET 3 231 #define MACB_TX_PAUSE_ZERO_SIZE 1 232 233 /* Bitfields in USRIO (AT91) */ 234 #define MACB_RMII_OFFSET 0 235 #define MACB_RMII_SIZE 1 236 #define MACB_CLKEN_OFFSET 1 237 #define MACB_CLKEN_SIZE 1 238 239 /* Bitfields in WOL */ 240 #define MACB_IP_OFFSET 0 241 #define MACB_IP_SIZE 16 242 #define MACB_MAG_OFFSET 16 243 #define MACB_MAG_SIZE 1 244 #define MACB_ARP_OFFSET 17 245 #define MACB_ARP_SIZE 1 246 #define MACB_SA1_OFFSET 18 247 #define MACB_SA1_SIZE 1 248 #define MACB_WOL_MTI_OFFSET 19 249 #define MACB_WOL_MTI_SIZE 1 250 251 /* Bitfields in MID */ 252 #define MACB_IDNUM_OFFSET 16 253 #define MACB_IDNUM_SIZE 16 254 255 /* Bitfields in DCFG1 */ 256 #define GEM_DBWDEF_OFFSET 25 257 #define GEM_DBWDEF_SIZE 3 258 259 /* constants for data bus width */ 260 #define GEM_DBW32 0 261 #define GEM_DBW64 1 262 #define GEM_DBW128 2 263 264 /* Constants for CLK */ 265 #define MACB_CLK_DIV8 0 266 #define MACB_CLK_DIV16 1 267 #define MACB_CLK_DIV32 2 268 #define MACB_CLK_DIV64 3 269 270 /* GEM specific constants for CLK */ 271 #define GEM_CLK_DIV8 0 272 #define GEM_CLK_DIV16 1 273 #define GEM_CLK_DIV32 2 274 #define GEM_CLK_DIV48 3 275 #define GEM_CLK_DIV64 4 276 #define GEM_CLK_DIV96 5 277 278 /* Constants for MAN register */ 279 #define MACB_MAN_SOF 1 280 #define MACB_MAN_WRITE 1 281 #define MACB_MAN_READ 2 282 #define MACB_MAN_CODE 2 283 284 /* Bit manipulation macros */ 285 #define MACB_BIT(name) \ 286 (1 << MACB_##name##_OFFSET) 287 #define MACB_BF(name, value) \ 288 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \ 289 << MACB_##name##_OFFSET) 290 #define MACB_BFEXT(name, value)\ 291 (((value) >> MACB_##name##_OFFSET) \ 292 & ((1 << MACB_##name##_SIZE) - 1)) 293 #define MACB_BFINS(name, value, old) \ 294 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \ 295 << MACB_##name##_OFFSET)) \ 296 | MACB_BF(name, value)) 297 298 #define GEM_BIT(name) \ 299 (1 << GEM_##name##_OFFSET) 300 #define GEM_BF(name, value) \ 301 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \ 302 << GEM_##name##_OFFSET) 303 #define GEM_BFEXT(name, value)\ 304 (((value) >> GEM_##name##_OFFSET) \ 305 & ((1 << GEM_##name##_SIZE) - 1)) 306 #define GEM_BFINS(name, value, old) \ 307 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \ 308 << GEM_##name##_OFFSET)) \ 309 | GEM_BF(name, value)) 310 311 /* Register access macros */ 312 #define macb_readl(port, reg) \ 313 readl((port)->regs + MACB_##reg) 314 #define macb_writel(port, reg, value) \ 315 writel((value), (port)->regs + MACB_##reg) 316 #define gem_readl(port, reg) \ 317 readl((port)->regs + GEM_##reg) 318 #define gem_writel(port, reg, value) \ 319 writel((value), (port)->regs + GEM_##reg) 320 #define gem_writel_queue_TBQP(port, value, queue_num) \ 321 writel((value), (port)->regs + GEM_TBQP(queue_num)) 322 323 #endif /* __DRIVERS_MACB_H__ */ 324