1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
245a1693aSRoberto Cerati /*
345a1693aSRoberto Cerati * Micrel KS8851_MLL 16bit Network driver
445a1693aSRoberto Cerati * Copyright (c) 2011 Roberto Cerati <roberto.cerati@bticino.it>
545a1693aSRoberto Cerati */
645a1693aSRoberto Cerati
745a1693aSRoberto Cerati #include <asm/io.h>
845a1693aSRoberto Cerati #include <common.h>
945a1693aSRoberto Cerati #include <command.h>
1045a1693aSRoberto Cerati #include <malloc.h>
1145a1693aSRoberto Cerati #include <net.h>
1245a1693aSRoberto Cerati #include <miiphy.h>
1345a1693aSRoberto Cerati
1445a1693aSRoberto Cerati #include "ks8851_mll.h"
1545a1693aSRoberto Cerati
1645a1693aSRoberto Cerati #define DRIVERNAME "ks8851_mll"
1745a1693aSRoberto Cerati
1845a1693aSRoberto Cerati #define MAX_RECV_FRAMES 32
1945a1693aSRoberto Cerati #define MAX_BUF_SIZE 2048
2045a1693aSRoberto Cerati #define TX_BUF_SIZE 2000
2145a1693aSRoberto Cerati #define RX_BUF_SIZE 2000
2245a1693aSRoberto Cerati
2345a1693aSRoberto Cerati static const struct chip_id chip_ids[] = {
2445a1693aSRoberto Cerati {CIDER_ID, "KSZ8851"},
2545a1693aSRoberto Cerati {0, NULL},
2645a1693aSRoberto Cerati };
2745a1693aSRoberto Cerati
2845a1693aSRoberto Cerati /*
2945a1693aSRoberto Cerati * union ks_tx_hdr - tx header data
3045a1693aSRoberto Cerati * @txb: The header as bytes
3145a1693aSRoberto Cerati * @txw: The header as 16bit, little-endian words
3245a1693aSRoberto Cerati *
3345a1693aSRoberto Cerati * A dual representation of the tx header data to allow
3445a1693aSRoberto Cerati * access to individual bytes, and to allow 16bit accesses
3545a1693aSRoberto Cerati * with 16bit alignment.
3645a1693aSRoberto Cerati */
3745a1693aSRoberto Cerati union ks_tx_hdr {
3845a1693aSRoberto Cerati u8 txb[4];
3945a1693aSRoberto Cerati __le16 txw[2];
4045a1693aSRoberto Cerati };
4145a1693aSRoberto Cerati
4245a1693aSRoberto Cerati /*
4345a1693aSRoberto Cerati * struct ks_net - KS8851 driver private data
4445a1693aSRoberto Cerati * @net_device : The network device we're bound to
4545a1693aSRoberto Cerati * @txh : temporaly buffer to save status/length.
4645a1693aSRoberto Cerati * @frame_head_info : frame header information for multi-pkt rx.
4745a1693aSRoberto Cerati * @statelock : Lock on this structure for tx list.
4845a1693aSRoberto Cerati * @msg_enable : The message flags controlling driver output (see ethtool).
4945a1693aSRoberto Cerati * @frame_cnt : number of frames received.
5045a1693aSRoberto Cerati * @bus_width : i/o bus width.
5145a1693aSRoberto Cerati * @irq : irq number assigned to this device.
5245a1693aSRoberto Cerati * @rc_rxqcr : Cached copy of KS_RXQCR.
5345a1693aSRoberto Cerati * @rc_txcr : Cached copy of KS_TXCR.
5445a1693aSRoberto Cerati * @rc_ier : Cached copy of KS_IER.
5545a1693aSRoberto Cerati * @sharedbus : Multipex(addr and data bus) mode indicator.
5645a1693aSRoberto Cerati * @cmd_reg_cache : command register cached.
5745a1693aSRoberto Cerati * @cmd_reg_cache_int : command register cached. Used in the irq handler.
5845a1693aSRoberto Cerati * @promiscuous : promiscuous mode indicator.
5945a1693aSRoberto Cerati * @all_mcast : mutlicast indicator.
6045a1693aSRoberto Cerati * @mcast_lst_size : size of multicast list.
6145a1693aSRoberto Cerati * @mcast_lst : multicast list.
6245a1693aSRoberto Cerati * @mcast_bits : multicast enabed.
6345a1693aSRoberto Cerati * @mac_addr : MAC address assigned to this device.
6445a1693aSRoberto Cerati * @fid : frame id.
6545a1693aSRoberto Cerati * @extra_byte : number of extra byte prepended rx pkt.
6645a1693aSRoberto Cerati * @enabled : indicator this device works.
6745a1693aSRoberto Cerati */
6845a1693aSRoberto Cerati
6945a1693aSRoberto Cerati /* Receive multiplex framer header info */
7045a1693aSRoberto Cerati struct type_frame_head {
7145a1693aSRoberto Cerati u16 sts; /* Frame status */
7245a1693aSRoberto Cerati u16 len; /* Byte count */
7345a1693aSRoberto Cerati } fr_h_i[MAX_RECV_FRAMES];
7445a1693aSRoberto Cerati
7545a1693aSRoberto Cerati struct ks_net {
7645a1693aSRoberto Cerati struct net_device *netdev;
7745a1693aSRoberto Cerati union ks_tx_hdr txh;
7845a1693aSRoberto Cerati struct type_frame_head *frame_head_info;
7945a1693aSRoberto Cerati u32 msg_enable;
8045a1693aSRoberto Cerati u32 frame_cnt;
8145a1693aSRoberto Cerati int bus_width;
8245a1693aSRoberto Cerati int irq;
8345a1693aSRoberto Cerati u16 rc_rxqcr;
8445a1693aSRoberto Cerati u16 rc_txcr;
8545a1693aSRoberto Cerati u16 rc_ier;
8645a1693aSRoberto Cerati u16 sharedbus;
8745a1693aSRoberto Cerati u16 cmd_reg_cache;
8845a1693aSRoberto Cerati u16 cmd_reg_cache_int;
8945a1693aSRoberto Cerati u16 promiscuous;
9045a1693aSRoberto Cerati u16 all_mcast;
9145a1693aSRoberto Cerati u16 mcast_lst_size;
9245a1693aSRoberto Cerati u8 mcast_lst[MAX_MCAST_LST][MAC_ADDR_LEN];
9345a1693aSRoberto Cerati u8 mcast_bits[HW_MCAST_SIZE];
9445a1693aSRoberto Cerati u8 mac_addr[6];
9545a1693aSRoberto Cerati u8 fid;
9645a1693aSRoberto Cerati u8 extra_byte;
9745a1693aSRoberto Cerati u8 enabled;
9845a1693aSRoberto Cerati } ks_str, *ks;
9945a1693aSRoberto Cerati
10045a1693aSRoberto Cerati #define BE3 0x8000 /* Byte Enable 3 */
10145a1693aSRoberto Cerati #define BE2 0x4000 /* Byte Enable 2 */
10245a1693aSRoberto Cerati #define BE1 0x2000 /* Byte Enable 1 */
10345a1693aSRoberto Cerati #define BE0 0x1000 /* Byte Enable 0 */
10445a1693aSRoberto Cerati
ks_rdreg8(struct eth_device * dev,u16 offset)10545a1693aSRoberto Cerati static u8 ks_rdreg8(struct eth_device *dev, u16 offset)
10645a1693aSRoberto Cerati {
10745a1693aSRoberto Cerati u8 shift_bit = offset & 0x03;
10845a1693aSRoberto Cerati u8 shift_data = (offset & 1) << 3;
10945a1693aSRoberto Cerati
11045a1693aSRoberto Cerati writew(offset | (BE0 << shift_bit), dev->iobase + 2);
11145a1693aSRoberto Cerati
11245a1693aSRoberto Cerati return (u8)(readw(dev->iobase) >> shift_data);
11345a1693aSRoberto Cerati }
11445a1693aSRoberto Cerati
ks_rdreg16(struct eth_device * dev,u16 offset)11545a1693aSRoberto Cerati static u16 ks_rdreg16(struct eth_device *dev, u16 offset)
11645a1693aSRoberto Cerati {
11745a1693aSRoberto Cerati writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2);
11845a1693aSRoberto Cerati
11945a1693aSRoberto Cerati return readw(dev->iobase);
12045a1693aSRoberto Cerati }
12145a1693aSRoberto Cerati
ks_wrreg8(struct eth_device * dev,u16 offset,u8 val)12245a1693aSRoberto Cerati static void ks_wrreg8(struct eth_device *dev, u16 offset, u8 val)
12345a1693aSRoberto Cerati {
12445a1693aSRoberto Cerati u8 shift_bit = (offset & 0x03);
12545a1693aSRoberto Cerati u16 value_write = (u16)(val << ((offset & 1) << 3));
12645a1693aSRoberto Cerati
12745a1693aSRoberto Cerati writew(offset | (BE0 << shift_bit), dev->iobase + 2);
12845a1693aSRoberto Cerati writew(value_write, dev->iobase);
12945a1693aSRoberto Cerati }
13045a1693aSRoberto Cerati
ks_wrreg16(struct eth_device * dev,u16 offset,u16 val)13145a1693aSRoberto Cerati static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val)
13245a1693aSRoberto Cerati {
13345a1693aSRoberto Cerati writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2);
13445a1693aSRoberto Cerati writew(val, dev->iobase);
13545a1693aSRoberto Cerati }
13645a1693aSRoberto Cerati
13745a1693aSRoberto Cerati /*
13845a1693aSRoberto Cerati * ks_inblk - read a block of data from QMU. This is called after sudo DMA mode
13945a1693aSRoberto Cerati * enabled.
14045a1693aSRoberto Cerati * @ks: The chip state
14145a1693aSRoberto Cerati * @wptr: buffer address to save data
14245a1693aSRoberto Cerati * @len: length in byte to read
14345a1693aSRoberto Cerati */
ks_inblk(struct eth_device * dev,u16 * wptr,u32 len)14445a1693aSRoberto Cerati static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len)
14545a1693aSRoberto Cerati {
14645a1693aSRoberto Cerati len >>= 1;
14745a1693aSRoberto Cerati
14845a1693aSRoberto Cerati while (len--)
14945a1693aSRoberto Cerati *wptr++ = readw(dev->iobase);
15045a1693aSRoberto Cerati }
15145a1693aSRoberto Cerati
15245a1693aSRoberto Cerati /*
15345a1693aSRoberto Cerati * ks_outblk - write data to QMU. This is called after sudo DMA mode enabled.
15445a1693aSRoberto Cerati * @ks: The chip information
15545a1693aSRoberto Cerati * @wptr: buffer address
15645a1693aSRoberto Cerati * @len: length in byte to write
15745a1693aSRoberto Cerati */
ks_outblk(struct eth_device * dev,u16 * wptr,u32 len)15845a1693aSRoberto Cerati static inline void ks_outblk(struct eth_device *dev, u16 *wptr, u32 len)
15945a1693aSRoberto Cerati {
16045a1693aSRoberto Cerati len >>= 1;
16145a1693aSRoberto Cerati
16245a1693aSRoberto Cerati while (len--)
16345a1693aSRoberto Cerati writew(*wptr++, dev->iobase);
16445a1693aSRoberto Cerati }
16545a1693aSRoberto Cerati
ks_enable_int(struct eth_device * dev)16645a1693aSRoberto Cerati static void ks_enable_int(struct eth_device *dev)
16745a1693aSRoberto Cerati {
16845a1693aSRoberto Cerati ks_wrreg16(dev, KS_IER, ks->rc_ier);
16945a1693aSRoberto Cerati }
17045a1693aSRoberto Cerati
ks_set_powermode(struct eth_device * dev,unsigned pwrmode)17145a1693aSRoberto Cerati static void ks_set_powermode(struct eth_device *dev, unsigned pwrmode)
17245a1693aSRoberto Cerati {
17345a1693aSRoberto Cerati unsigned pmecr;
17445a1693aSRoberto Cerati
17545a1693aSRoberto Cerati ks_rdreg16(dev, KS_GRR);
17645a1693aSRoberto Cerati pmecr = ks_rdreg16(dev, KS_PMECR);
17745a1693aSRoberto Cerati pmecr &= ~PMECR_PM_MASK;
17845a1693aSRoberto Cerati pmecr |= pwrmode;
17945a1693aSRoberto Cerati
18045a1693aSRoberto Cerati ks_wrreg16(dev, KS_PMECR, pmecr);
18145a1693aSRoberto Cerati }
18245a1693aSRoberto Cerati
18345a1693aSRoberto Cerati /*
18445a1693aSRoberto Cerati * ks_read_config - read chip configuration of bus width.
18545a1693aSRoberto Cerati * @ks: The chip information
18645a1693aSRoberto Cerati */
ks_read_config(struct eth_device * dev)18745a1693aSRoberto Cerati static void ks_read_config(struct eth_device *dev)
18845a1693aSRoberto Cerati {
18945a1693aSRoberto Cerati u16 reg_data = 0;
19045a1693aSRoberto Cerati
19145a1693aSRoberto Cerati /* Regardless of bus width, 8 bit read should always work. */
19245a1693aSRoberto Cerati reg_data = ks_rdreg8(dev, KS_CCR) & 0x00FF;
19345a1693aSRoberto Cerati reg_data |= ks_rdreg8(dev, KS_CCR + 1) << 8;
19445a1693aSRoberto Cerati
19545a1693aSRoberto Cerati /* addr/data bus are multiplexed */
19645a1693aSRoberto Cerati ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED;
19745a1693aSRoberto Cerati
19845a1693aSRoberto Cerati /*
19945a1693aSRoberto Cerati * There are garbage data when reading data from QMU,
20045a1693aSRoberto Cerati * depending on bus-width.
20145a1693aSRoberto Cerati */
20245a1693aSRoberto Cerati if (reg_data & CCR_8BIT) {
20345a1693aSRoberto Cerati ks->bus_width = ENUM_BUS_8BIT;
20445a1693aSRoberto Cerati ks->extra_byte = 1;
20545a1693aSRoberto Cerati } else if (reg_data & CCR_16BIT) {
20645a1693aSRoberto Cerati ks->bus_width = ENUM_BUS_16BIT;
20745a1693aSRoberto Cerati ks->extra_byte = 2;
20845a1693aSRoberto Cerati } else {
20945a1693aSRoberto Cerati ks->bus_width = ENUM_BUS_32BIT;
21045a1693aSRoberto Cerati ks->extra_byte = 4;
21145a1693aSRoberto Cerati }
21245a1693aSRoberto Cerati }
21345a1693aSRoberto Cerati
21445a1693aSRoberto Cerati /*
21545a1693aSRoberto Cerati * ks_soft_reset - issue one of the soft reset to the device
21645a1693aSRoberto Cerati * @ks: The device state.
21745a1693aSRoberto Cerati * @op: The bit(s) to set in the GRR
21845a1693aSRoberto Cerati *
21945a1693aSRoberto Cerati * Issue the relevant soft-reset command to the device's GRR register
22045a1693aSRoberto Cerati * specified by @op.
22145a1693aSRoberto Cerati *
22245a1693aSRoberto Cerati * Note, the delays are in there as a caution to ensure that the reset
22345a1693aSRoberto Cerati * has time to take effect and then complete. Since the datasheet does
22445a1693aSRoberto Cerati * not currently specify the exact sequence, we have chosen something
22545a1693aSRoberto Cerati * that seems to work with our device.
22645a1693aSRoberto Cerati */
ks_soft_reset(struct eth_device * dev,unsigned op)22745a1693aSRoberto Cerati static void ks_soft_reset(struct eth_device *dev, unsigned op)
22845a1693aSRoberto Cerati {
22945a1693aSRoberto Cerati /* Disable interrupt first */
23045a1693aSRoberto Cerati ks_wrreg16(dev, KS_IER, 0x0000);
23145a1693aSRoberto Cerati ks_wrreg16(dev, KS_GRR, op);
23245a1693aSRoberto Cerati mdelay(10); /* wait a short time to effect reset */
23345a1693aSRoberto Cerati ks_wrreg16(dev, KS_GRR, 0);
23445a1693aSRoberto Cerati mdelay(1); /* wait for condition to clear */
23545a1693aSRoberto Cerati }
23645a1693aSRoberto Cerati
ks_enable_qmu(struct eth_device * dev)23745a1693aSRoberto Cerati void ks_enable_qmu(struct eth_device *dev)
23845a1693aSRoberto Cerati {
23945a1693aSRoberto Cerati u16 w;
24045a1693aSRoberto Cerati
24145a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_TXCR);
24245a1693aSRoberto Cerati
24345a1693aSRoberto Cerati /* Enables QMU Transmit (TXCR). */
24445a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXCR, w | TXCR_TXE);
24545a1693aSRoberto Cerati
24645a1693aSRoberto Cerati /* Enable RX Frame Count Threshold and Auto-Dequeue RXQ Frame */
24745a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_RXQCR);
24845a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXQCR, w | RXQCR_RXFCTE);
24945a1693aSRoberto Cerati
25045a1693aSRoberto Cerati /* Enables QMU Receive (RXCR1). */
25145a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_RXCR1);
25245a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXCR1, w | RXCR1_RXE);
25345a1693aSRoberto Cerati }
25445a1693aSRoberto Cerati
ks_disable_qmu(struct eth_device * dev)25545a1693aSRoberto Cerati static void ks_disable_qmu(struct eth_device *dev)
25645a1693aSRoberto Cerati {
25745a1693aSRoberto Cerati u16 w;
25845a1693aSRoberto Cerati
25945a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_TXCR);
26045a1693aSRoberto Cerati
26145a1693aSRoberto Cerati /* Disables QMU Transmit (TXCR). */
26245a1693aSRoberto Cerati w &= ~TXCR_TXE;
26345a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXCR, w);
26445a1693aSRoberto Cerati
26545a1693aSRoberto Cerati /* Disables QMU Receive (RXCR1). */
26645a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_RXCR1);
26745a1693aSRoberto Cerati w &= ~RXCR1_RXE;
26845a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXCR1, w);
26945a1693aSRoberto Cerati }
27045a1693aSRoberto Cerati
ks_read_qmu(struct eth_device * dev,u16 * buf,u32 len)27145a1693aSRoberto Cerati static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len)
27245a1693aSRoberto Cerati {
27345a1693aSRoberto Cerati u32 r = ks->extra_byte & 0x1;
27445a1693aSRoberto Cerati u32 w = ks->extra_byte - r;
27545a1693aSRoberto Cerati
27645a1693aSRoberto Cerati /* 1. set sudo DMA mode */
27745a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI);
27845a1693aSRoberto Cerati ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff);
27945a1693aSRoberto Cerati
28045a1693aSRoberto Cerati /*
28145a1693aSRoberto Cerati * 2. read prepend data
28245a1693aSRoberto Cerati *
28345a1693aSRoberto Cerati * read 4 + extra bytes and discard them.
28445a1693aSRoberto Cerati * extra bytes for dummy, 2 for status, 2 for len
28545a1693aSRoberto Cerati */
28645a1693aSRoberto Cerati
28745a1693aSRoberto Cerati if (r)
28845a1693aSRoberto Cerati ks_rdreg8(dev, 0);
28945a1693aSRoberto Cerati
29045a1693aSRoberto Cerati ks_inblk(dev, buf, w + 2 + 2);
29145a1693aSRoberto Cerati
29245a1693aSRoberto Cerati /* 3. read pkt data */
29345a1693aSRoberto Cerati ks_inblk(dev, buf, ALIGN(len, 4));
29445a1693aSRoberto Cerati
29545a1693aSRoberto Cerati /* 4. reset sudo DMA Mode */
29645a1693aSRoberto Cerati ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff);
29745a1693aSRoberto Cerati }
29845a1693aSRoberto Cerati
ks_rcv(struct eth_device * dev,uchar ** pv_data)29945a1693aSRoberto Cerati static void ks_rcv(struct eth_device *dev, uchar **pv_data)
30045a1693aSRoberto Cerati {
30145a1693aSRoberto Cerati struct type_frame_head *frame_hdr = ks->frame_head_info;
30245a1693aSRoberto Cerati int i;
30345a1693aSRoberto Cerati
30445a1693aSRoberto Cerati ks->frame_cnt = ks_rdreg16(dev, KS_RXFCTR) >> 8;
30545a1693aSRoberto Cerati
30645a1693aSRoberto Cerati /* read all header information */
30745a1693aSRoberto Cerati for (i = 0; i < ks->frame_cnt; i++) {
30845a1693aSRoberto Cerati /* Checking Received packet status */
30945a1693aSRoberto Cerati frame_hdr->sts = ks_rdreg16(dev, KS_RXFHSR);
31045a1693aSRoberto Cerati /* Get packet len from hardware */
31145a1693aSRoberto Cerati frame_hdr->len = ks_rdreg16(dev, KS_RXFHBCR);
31245a1693aSRoberto Cerati frame_hdr++;
31345a1693aSRoberto Cerati }
31445a1693aSRoberto Cerati
31545a1693aSRoberto Cerati frame_hdr = ks->frame_head_info;
31645a1693aSRoberto Cerati while (ks->frame_cnt--) {
31745a1693aSRoberto Cerati if ((frame_hdr->sts & RXFSHR_RXFV) &&
31845a1693aSRoberto Cerati (frame_hdr->len < RX_BUF_SIZE) &&
31945a1693aSRoberto Cerati frame_hdr->len) {
32045a1693aSRoberto Cerati /* read data block including CRC 4 bytes */
32145a1693aSRoberto Cerati ks_read_qmu(dev, (u16 *)(*pv_data), frame_hdr->len);
32245a1693aSRoberto Cerati
3231fd92db8SJoe Hershberger /* net_rx_packets buffer size is ok (*pv_data) */
3241fd92db8SJoe Hershberger net_process_received_packet(*pv_data, frame_hdr->len);
32545a1693aSRoberto Cerati pv_data++;
32645a1693aSRoberto Cerati } else {
32745a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_RRXEF));
32845a1693aSRoberto Cerati printf(DRIVERNAME ": bad packet\n");
32945a1693aSRoberto Cerati }
33045a1693aSRoberto Cerati frame_hdr++;
33145a1693aSRoberto Cerati }
33245a1693aSRoberto Cerati }
33345a1693aSRoberto Cerati
33445a1693aSRoberto Cerati /*
33545a1693aSRoberto Cerati * ks_read_selftest - read the selftest memory info.
33645a1693aSRoberto Cerati * @ks: The device state
33745a1693aSRoberto Cerati *
33845a1693aSRoberto Cerati * Read and check the TX/RX memory selftest information.
33945a1693aSRoberto Cerati */
ks_read_selftest(struct eth_device * dev)34045a1693aSRoberto Cerati static int ks_read_selftest(struct eth_device *dev)
34145a1693aSRoberto Cerati {
34245a1693aSRoberto Cerati u16 both_done = MBIR_TXMBF | MBIR_RXMBF;
34345a1693aSRoberto Cerati u16 mbir;
34445a1693aSRoberto Cerati int ret = 0;
34545a1693aSRoberto Cerati
34645a1693aSRoberto Cerati mbir = ks_rdreg16(dev, KS_MBIR);
34745a1693aSRoberto Cerati
34845a1693aSRoberto Cerati if ((mbir & both_done) != both_done) {
34945a1693aSRoberto Cerati printf(DRIVERNAME ": Memory selftest not finished\n");
35045a1693aSRoberto Cerati return 0;
35145a1693aSRoberto Cerati }
35245a1693aSRoberto Cerati
35345a1693aSRoberto Cerati if (mbir & MBIR_TXMBFA) {
35445a1693aSRoberto Cerati printf(DRIVERNAME ": TX memory selftest fails\n");
35545a1693aSRoberto Cerati ret |= 1;
35645a1693aSRoberto Cerati }
35745a1693aSRoberto Cerati
35845a1693aSRoberto Cerati if (mbir & MBIR_RXMBFA) {
35945a1693aSRoberto Cerati printf(DRIVERNAME ": RX memory selftest fails\n");
36045a1693aSRoberto Cerati ret |= 2;
36145a1693aSRoberto Cerati }
36245a1693aSRoberto Cerati
36345a1693aSRoberto Cerati debug(DRIVERNAME ": the selftest passes\n");
36445a1693aSRoberto Cerati
36545a1693aSRoberto Cerati return ret;
36645a1693aSRoberto Cerati }
36745a1693aSRoberto Cerati
ks_setup(struct eth_device * dev)36845a1693aSRoberto Cerati static void ks_setup(struct eth_device *dev)
36945a1693aSRoberto Cerati {
37045a1693aSRoberto Cerati u16 w;
37145a1693aSRoberto Cerati
37245a1693aSRoberto Cerati /* Setup Transmit Frame Data Pointer Auto-Increment (TXFDPR) */
37345a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI);
37445a1693aSRoberto Cerati
37545a1693aSRoberto Cerati /* Setup Receive Frame Data Pointer Auto-Increment */
37645a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI);
37745a1693aSRoberto Cerati
37845a1693aSRoberto Cerati /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */
37945a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK);
38045a1693aSRoberto Cerati
38145a1693aSRoberto Cerati /* Setup RxQ Command Control (RXQCR) */
38245a1693aSRoberto Cerati ks->rc_rxqcr = RXQCR_CMD_CNTL;
38345a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXQCR, ks->rc_rxqcr);
38445a1693aSRoberto Cerati
38545a1693aSRoberto Cerati /*
38645a1693aSRoberto Cerati * set the force mode to half duplex, default is full duplex
38745a1693aSRoberto Cerati * because if the auto-negotiation fails, most switch uses
38845a1693aSRoberto Cerati * half-duplex.
38945a1693aSRoberto Cerati */
39045a1693aSRoberto Cerati w = ks_rdreg16(dev, KS_P1MBCR);
39145a1693aSRoberto Cerati w &= ~P1MBCR_FORCE_FDX;
39245a1693aSRoberto Cerati ks_wrreg16(dev, KS_P1MBCR, w);
39345a1693aSRoberto Cerati
39445a1693aSRoberto Cerati w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP;
39545a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXCR, w);
39645a1693aSRoberto Cerati
39745a1693aSRoberto Cerati w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC;
39845a1693aSRoberto Cerati
39945a1693aSRoberto Cerati /* Normal mode */
40045a1693aSRoberto Cerati w |= RXCR1_RXPAFMA;
40145a1693aSRoberto Cerati
40245a1693aSRoberto Cerati ks_wrreg16(dev, KS_RXCR1, w);
40345a1693aSRoberto Cerati }
40445a1693aSRoberto Cerati
ks_setup_int(struct eth_device * dev)40545a1693aSRoberto Cerati static void ks_setup_int(struct eth_device *dev)
40645a1693aSRoberto Cerati {
40745a1693aSRoberto Cerati ks->rc_ier = 0x00;
40845a1693aSRoberto Cerati
40945a1693aSRoberto Cerati /* Clear the interrupts status of the hardware. */
41045a1693aSRoberto Cerati ks_wrreg16(dev, KS_ISR, 0xffff);
41145a1693aSRoberto Cerati
41245a1693aSRoberto Cerati /* Enables the interrupts of the hardware. */
41345a1693aSRoberto Cerati ks->rc_ier = (IRQ_LCI | IRQ_TXI | IRQ_RXI);
41445a1693aSRoberto Cerati }
41545a1693aSRoberto Cerati
ks8851_mll_detect_chip(struct eth_device * dev)41645a1693aSRoberto Cerati static int ks8851_mll_detect_chip(struct eth_device *dev)
41745a1693aSRoberto Cerati {
41845a1693aSRoberto Cerati unsigned short val, i;
41945a1693aSRoberto Cerati
42045a1693aSRoberto Cerati ks_read_config(dev);
42145a1693aSRoberto Cerati
42245a1693aSRoberto Cerati val = ks_rdreg16(dev, KS_CIDER);
42345a1693aSRoberto Cerati
42445a1693aSRoberto Cerati if (val == 0xffff) {
42545a1693aSRoberto Cerati /* Special case -- no chip present */
42645a1693aSRoberto Cerati printf(DRIVERNAME ": is chip mounted ?\n");
42745a1693aSRoberto Cerati return -1;
42845a1693aSRoberto Cerati } else if ((val & 0xfff0) != CIDER_ID) {
42945a1693aSRoberto Cerati printf(DRIVERNAME ": Invalid chip id 0x%04x\n", val);
43045a1693aSRoberto Cerati return -1;
43145a1693aSRoberto Cerati }
43245a1693aSRoberto Cerati
43345a1693aSRoberto Cerati debug("Read back KS8851 id 0x%x\n", val);
43445a1693aSRoberto Cerati
43545a1693aSRoberto Cerati /* only one entry in the table */
43645a1693aSRoberto Cerati val &= 0xfff0;
43745a1693aSRoberto Cerati for (i = 0; chip_ids[i].id != 0; i++) {
43845a1693aSRoberto Cerati if (chip_ids[i].id == val)
43945a1693aSRoberto Cerati break;
44045a1693aSRoberto Cerati }
44145a1693aSRoberto Cerati if (!chip_ids[i].id) {
44245a1693aSRoberto Cerati printf(DRIVERNAME ": Unknown chip ID %04x\n", val);
44345a1693aSRoberto Cerati return -1;
44445a1693aSRoberto Cerati }
44545a1693aSRoberto Cerati
44645a1693aSRoberto Cerati dev->priv = (void *)&chip_ids[i];
44745a1693aSRoberto Cerati
44845a1693aSRoberto Cerati return 0;
44945a1693aSRoberto Cerati }
45045a1693aSRoberto Cerati
ks8851_mll_reset(struct eth_device * dev)45145a1693aSRoberto Cerati static void ks8851_mll_reset(struct eth_device *dev)
45245a1693aSRoberto Cerati {
45345a1693aSRoberto Cerati /* wake up powermode to normal mode */
45445a1693aSRoberto Cerati ks_set_powermode(dev, PMECR_PM_NORMAL);
45545a1693aSRoberto Cerati mdelay(1); /* wait for normal mode to take effect */
45645a1693aSRoberto Cerati
45745a1693aSRoberto Cerati /* Disable interrupt and reset */
45845a1693aSRoberto Cerati ks_soft_reset(dev, GRR_GSR);
45945a1693aSRoberto Cerati
46045a1693aSRoberto Cerati /* turn off the IRQs and ack any outstanding */
46145a1693aSRoberto Cerati ks_wrreg16(dev, KS_IER, 0x0000);
46245a1693aSRoberto Cerati ks_wrreg16(dev, KS_ISR, 0xffff);
46345a1693aSRoberto Cerati
46445a1693aSRoberto Cerati /* shutdown RX/TX QMU */
46545a1693aSRoberto Cerati ks_disable_qmu(dev);
46645a1693aSRoberto Cerati }
46745a1693aSRoberto Cerati
ks8851_mll_phy_configure(struct eth_device * dev)46845a1693aSRoberto Cerati static void ks8851_mll_phy_configure(struct eth_device *dev)
46945a1693aSRoberto Cerati {
47045a1693aSRoberto Cerati u16 data;
47145a1693aSRoberto Cerati
47245a1693aSRoberto Cerati ks_setup(dev);
47345a1693aSRoberto Cerati ks_setup_int(dev);
47445a1693aSRoberto Cerati
47545a1693aSRoberto Cerati /* Probing the phy */
47645a1693aSRoberto Cerati data = ks_rdreg16(dev, KS_OBCR);
47745a1693aSRoberto Cerati ks_wrreg16(dev, KS_OBCR, data | OBCR_ODS_16MA);
47845a1693aSRoberto Cerati
47945a1693aSRoberto Cerati debug(DRIVERNAME ": phy initialized\n");
48045a1693aSRoberto Cerati }
48145a1693aSRoberto Cerati
ks8851_mll_enable(struct eth_device * dev)48245a1693aSRoberto Cerati static void ks8851_mll_enable(struct eth_device *dev)
48345a1693aSRoberto Cerati {
48445a1693aSRoberto Cerati ks_wrreg16(dev, KS_ISR, 0xffff);
48545a1693aSRoberto Cerati ks_enable_int(dev);
48645a1693aSRoberto Cerati ks_enable_qmu(dev);
48745a1693aSRoberto Cerati }
48845a1693aSRoberto Cerati
ks8851_mll_init(struct eth_device * dev,bd_t * bd)48945a1693aSRoberto Cerati static int ks8851_mll_init(struct eth_device *dev, bd_t *bd)
49045a1693aSRoberto Cerati {
49145a1693aSRoberto Cerati struct chip_id *id = dev->priv;
49245a1693aSRoberto Cerati
49345a1693aSRoberto Cerati debug(DRIVERNAME ": detected %s controller\n", id->name);
49445a1693aSRoberto Cerati
49545a1693aSRoberto Cerati if (ks_read_selftest(dev)) {
49645a1693aSRoberto Cerati printf(DRIVERNAME ": Selftest failed\n");
49745a1693aSRoberto Cerati return -1;
49845a1693aSRoberto Cerati }
49945a1693aSRoberto Cerati
50045a1693aSRoberto Cerati ks8851_mll_reset(dev);
50145a1693aSRoberto Cerati
50245a1693aSRoberto Cerati /* Configure the PHY, initialize the link state */
50345a1693aSRoberto Cerati ks8851_mll_phy_configure(dev);
50445a1693aSRoberto Cerati
50545a1693aSRoberto Cerati /* static allocation of private informations */
50645a1693aSRoberto Cerati ks->frame_head_info = fr_h_i;
50745a1693aSRoberto Cerati
50845a1693aSRoberto Cerati /* Turn on Tx + Rx */
50945a1693aSRoberto Cerati ks8851_mll_enable(dev);
51045a1693aSRoberto Cerati
51145a1693aSRoberto Cerati return 0;
51245a1693aSRoberto Cerati }
51345a1693aSRoberto Cerati
ks_write_qmu(struct eth_device * dev,u8 * pdata,u16 len)51445a1693aSRoberto Cerati static void ks_write_qmu(struct eth_device *dev, u8 *pdata, u16 len)
51545a1693aSRoberto Cerati {
51645a1693aSRoberto Cerati /* start header at txb[0] to align txw entries */
51745a1693aSRoberto Cerati ks->txh.txw[0] = 0;
51845a1693aSRoberto Cerati ks->txh.txw[1] = cpu_to_le16(len);
51945a1693aSRoberto Cerati
52045a1693aSRoberto Cerati /* 1. set sudo-DMA mode */
52145a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI);
52245a1693aSRoberto Cerati ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff);
52345a1693aSRoberto Cerati /* 2. write status/lenth info */
52445a1693aSRoberto Cerati ks_outblk(dev, ks->txh.txw, 4);
52545a1693aSRoberto Cerati /* 3. write pkt data */
52645a1693aSRoberto Cerati ks_outblk(dev, (u16 *)pdata, ALIGN(len, 4));
52745a1693aSRoberto Cerati /* 4. reset sudo-DMA mode */
52845a1693aSRoberto Cerati ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff);
52945a1693aSRoberto Cerati /* 5. Enqueue Tx(move the pkt from TX buffer into TXQ) */
53045a1693aSRoberto Cerati ks_wrreg16(dev, KS_TXQCR, TXQCR_METFE);
53145a1693aSRoberto Cerati /* 6. wait until TXQCR_METFE is auto-cleared */
53245a1693aSRoberto Cerati do { } while (ks_rdreg16(dev, KS_TXQCR) & TXQCR_METFE);
53345a1693aSRoberto Cerati }
53445a1693aSRoberto Cerati
ks8851_mll_send(struct eth_device * dev,void * packet,int length)53545a1693aSRoberto Cerati static int ks8851_mll_send(struct eth_device *dev, void *packet, int length)
53645a1693aSRoberto Cerati {
53745a1693aSRoberto Cerati u8 *data = (u8 *)packet;
53845a1693aSRoberto Cerati u16 tmplen = (u16)length;
53945a1693aSRoberto Cerati u16 retv;
54045a1693aSRoberto Cerati
54145a1693aSRoberto Cerati /*
54245a1693aSRoberto Cerati * Extra space are required:
54345a1693aSRoberto Cerati * 4 byte for alignment, 4 for status/length, 4 for CRC
54445a1693aSRoberto Cerati */
54545a1693aSRoberto Cerati retv = ks_rdreg16(dev, KS_TXMIR) & 0x1fff;
54645a1693aSRoberto Cerati if (retv >= tmplen + 12) {
54745a1693aSRoberto Cerati ks_write_qmu(dev, data, tmplen);
54845a1693aSRoberto Cerati return 0;
54945a1693aSRoberto Cerati } else {
55045a1693aSRoberto Cerati printf(DRIVERNAME ": failed to send packet: No buffer\n");
55145a1693aSRoberto Cerati return -1;
55245a1693aSRoberto Cerati }
55345a1693aSRoberto Cerati }
55445a1693aSRoberto Cerati
ks8851_mll_halt(struct eth_device * dev)55545a1693aSRoberto Cerati static void ks8851_mll_halt(struct eth_device *dev)
55645a1693aSRoberto Cerati {
55745a1693aSRoberto Cerati ks8851_mll_reset(dev);
55845a1693aSRoberto Cerati }
55945a1693aSRoberto Cerati
56045a1693aSRoberto Cerati /*
56145a1693aSRoberto Cerati * Maximum receive ring size; that is, the number of packets
56245a1693aSRoberto Cerati * we can buffer before overflow happens. Basically, this just
56345a1693aSRoberto Cerati * needs to be enough to prevent a packet being discarded while
56445a1693aSRoberto Cerati * we are processing the previous one.
56545a1693aSRoberto Cerati */
ks8851_mll_recv(struct eth_device * dev)56645a1693aSRoberto Cerati static int ks8851_mll_recv(struct eth_device *dev)
56745a1693aSRoberto Cerati {
56845a1693aSRoberto Cerati u16 status;
56945a1693aSRoberto Cerati
57045a1693aSRoberto Cerati status = ks_rdreg16(dev, KS_ISR);
57145a1693aSRoberto Cerati
57245a1693aSRoberto Cerati ks_wrreg16(dev, KS_ISR, status);
57345a1693aSRoberto Cerati
57445a1693aSRoberto Cerati if ((status & IRQ_RXI))
5751fd92db8SJoe Hershberger ks_rcv(dev, (uchar **)net_rx_packets);
57645a1693aSRoberto Cerati
57745a1693aSRoberto Cerati if ((status & IRQ_LDI)) {
57845a1693aSRoberto Cerati u16 pmecr = ks_rdreg16(dev, KS_PMECR);
57945a1693aSRoberto Cerati pmecr &= ~PMECR_WKEVT_MASK;
58045a1693aSRoberto Cerati ks_wrreg16(dev, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
58145a1693aSRoberto Cerati }
58245a1693aSRoberto Cerati
58345a1693aSRoberto Cerati return 0;
58445a1693aSRoberto Cerati }
58545a1693aSRoberto Cerati
ks8851_mll_write_hwaddr(struct eth_device * dev)58645a1693aSRoberto Cerati static int ks8851_mll_write_hwaddr(struct eth_device *dev)
58745a1693aSRoberto Cerati {
58845a1693aSRoberto Cerati u16 addrl, addrm, addrh;
58945a1693aSRoberto Cerati
59045a1693aSRoberto Cerati addrh = (dev->enetaddr[0] << 8) | dev->enetaddr[1];
59145a1693aSRoberto Cerati addrm = (dev->enetaddr[2] << 8) | dev->enetaddr[3];
59245a1693aSRoberto Cerati addrl = (dev->enetaddr[4] << 8) | dev->enetaddr[5];
59345a1693aSRoberto Cerati
59445a1693aSRoberto Cerati ks_wrreg16(dev, KS_MARH, addrh);
59545a1693aSRoberto Cerati ks_wrreg16(dev, KS_MARM, addrm);
59645a1693aSRoberto Cerati ks_wrreg16(dev, KS_MARL, addrl);
59745a1693aSRoberto Cerati
59845a1693aSRoberto Cerati return 0;
59945a1693aSRoberto Cerati }
60045a1693aSRoberto Cerati
ks8851_mll_initialize(u8 dev_num,int base_addr)60145a1693aSRoberto Cerati int ks8851_mll_initialize(u8 dev_num, int base_addr)
60245a1693aSRoberto Cerati {
60345a1693aSRoberto Cerati struct eth_device *dev;
60445a1693aSRoberto Cerati
60545a1693aSRoberto Cerati dev = malloc(sizeof(*dev));
60645a1693aSRoberto Cerati if (!dev) {
60745a1693aSRoberto Cerati printf("Error: Failed to allocate memory\n");
60845a1693aSRoberto Cerati return -1;
60945a1693aSRoberto Cerati }
61045a1693aSRoberto Cerati memset(dev, 0, sizeof(*dev));
61145a1693aSRoberto Cerati
61245a1693aSRoberto Cerati dev->iobase = base_addr;
61345a1693aSRoberto Cerati
61445a1693aSRoberto Cerati ks = &ks_str;
61545a1693aSRoberto Cerati
61645a1693aSRoberto Cerati /* Try to detect chip. Will fail if not present. */
61745a1693aSRoberto Cerati if (ks8851_mll_detect_chip(dev)) {
61845a1693aSRoberto Cerati free(dev);
61945a1693aSRoberto Cerati return -1;
62045a1693aSRoberto Cerati }
62145a1693aSRoberto Cerati
62245a1693aSRoberto Cerati dev->init = ks8851_mll_init;
62345a1693aSRoberto Cerati dev->halt = ks8851_mll_halt;
62445a1693aSRoberto Cerati dev->send = ks8851_mll_send;
62545a1693aSRoberto Cerati dev->recv = ks8851_mll_recv;
62645a1693aSRoberto Cerati dev->write_hwaddr = ks8851_mll_write_hwaddr;
62745a1693aSRoberto Cerati sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
62845a1693aSRoberto Cerati
62945a1693aSRoberto Cerati eth_register(dev);
63045a1693aSRoberto Cerati
63145a1693aSRoberto Cerati return 0;
63245a1693aSRoberto Cerati }
633