1 /* 2 * Faraday 10/100Mbps Ethernet Controller 3 * 4 * (C) Copyright 2010 Faraday Technology 5 * Dante Su <dantesu@faraday-tech.com> 6 * 7 * This file is released under the terms of GPL v2 and any later version. 8 * See the file COPYING in the root directory of the source tree for details. 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <malloc.h> 14 #include <net.h> 15 #include <asm/errno.h> 16 #include <asm/io.h> 17 #include <asm/dma-mapping.h> 18 19 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) 20 #include <miiphy.h> 21 #endif 22 23 #include "ftmac110.h" 24 25 #define CFG_RXDES_NUM 8 26 #define CFG_TXDES_NUM 2 27 #define CFG_XBUF_SIZE 1536 28 29 #define CFG_MDIORD_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ 30 #define CFG_MDIOWR_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ 31 #define CFG_LINKUP_TIMEOUT (CONFIG_SYS_HZ << 2) /* 4 sec */ 32 33 /* 34 * FTMAC110 DMA design issue 35 * 36 * Its DMA engine has a weird restriction that its Rx DMA engine 37 * accepts only 16-bits aligned address, 32-bits aligned is not 38 * acceptable. However this restriction does not apply to Tx DMA. 39 * 40 * Conclusion: 41 * (1) Tx DMA Buffer Address: 42 * 1 bytes aligned: Invalid 43 * 2 bytes aligned: O.K 44 * 4 bytes aligned: O.K (-> u-boot ZeroCopy is possible) 45 * (2) Rx DMA Buffer Address: 46 * 1 bytes aligned: Invalid 47 * 2 bytes aligned: O.K 48 * 4 bytes aligned: Invalid 49 */ 50 51 struct ftmac110_chip { 52 void __iomem *regs; 53 uint32_t imr; 54 uint32_t maccr; 55 uint32_t lnkup; 56 uint32_t phy_addr; 57 58 struct ftmac110_rxd *rxd; 59 ulong rxd_dma; 60 uint32_t rxd_idx; 61 62 struct ftmac110_txd *txd; 63 ulong txd_dma; 64 uint32_t txd_idx; 65 }; 66 67 static int ftmac110_reset(struct eth_device *dev); 68 69 static uint16_t mdio_read(struct eth_device *dev, 70 uint8_t phyaddr, uint8_t phyreg) 71 { 72 struct ftmac110_chip *chip = dev->priv; 73 struct ftmac110_regs __iomem *regs = chip->regs; 74 uint32_t tmp, ts; 75 uint16_t ret = 0xffff; 76 77 tmp = PHYCR_READ 78 | (phyaddr << PHYCR_ADDR_SHIFT) 79 | (phyreg << PHYCR_REG_SHIFT); 80 81 writel(tmp, ®s->phycr); 82 83 for (ts = get_timer(0); get_timer(ts) < CFG_MDIORD_TIMEOUT; ) { 84 tmp = readl(®s->phycr); 85 if (tmp & PHYCR_READ) 86 continue; 87 break; 88 } 89 90 if (tmp & PHYCR_READ) 91 printf("ftmac110: mdio read timeout\n"); 92 else 93 ret = (uint16_t)(tmp & 0xffff); 94 95 return ret; 96 } 97 98 static void mdio_write(struct eth_device *dev, 99 uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) 100 { 101 struct ftmac110_chip *chip = dev->priv; 102 struct ftmac110_regs __iomem *regs = chip->regs; 103 uint32_t tmp, ts; 104 105 tmp = PHYCR_WRITE 106 | (phyaddr << PHYCR_ADDR_SHIFT) 107 | (phyreg << PHYCR_REG_SHIFT); 108 109 writel(phydata, ®s->phydr); 110 writel(tmp, ®s->phycr); 111 112 for (ts = get_timer(0); get_timer(ts) < CFG_MDIOWR_TIMEOUT; ) { 113 if (readl(®s->phycr) & PHYCR_WRITE) 114 continue; 115 break; 116 } 117 118 if (readl(®s->phycr) & PHYCR_WRITE) 119 printf("ftmac110: mdio write timeout\n"); 120 } 121 122 static uint32_t ftmac110_phyqry(struct eth_device *dev) 123 { 124 ulong ts; 125 uint32_t maccr; 126 uint16_t pa, tmp, bmsr, bmcr; 127 struct ftmac110_chip *chip = dev->priv; 128 129 /* Default = 100Mbps Full */ 130 maccr = MACCR_100M | MACCR_FD; 131 132 /* 1. find the phy device */ 133 for (pa = 0; pa < 32; ++pa) { 134 tmp = mdio_read(dev, pa, MII_PHYSID1); 135 if (tmp == 0xFFFF || tmp == 0x0000) 136 continue; 137 chip->phy_addr = pa; 138 break; 139 } 140 if (pa >= 32) { 141 puts("ftmac110: phy device not found!\n"); 142 goto exit; 143 } 144 145 /* 2. wait until link-up & auto-negotiation complete */ 146 chip->lnkup = 0; 147 bmcr = mdio_read(dev, chip->phy_addr, MII_BMCR); 148 ts = get_timer(0); 149 do { 150 bmsr = mdio_read(dev, chip->phy_addr, MII_BMSR); 151 chip->lnkup = (bmsr & BMSR_LSTATUS) ? 1 : 0; 152 if (!chip->lnkup) 153 continue; 154 if (!(bmcr & BMCR_ANENABLE) || (bmsr & BMSR_ANEGCOMPLETE)) 155 break; 156 } while (get_timer(ts) < CFG_LINKUP_TIMEOUT); 157 if (!chip->lnkup) { 158 puts("ftmac110: link down\n"); 159 goto exit; 160 } 161 if (!(bmcr & BMCR_ANENABLE)) 162 puts("ftmac110: auto negotiation disabled\n"); 163 else if (!(bmsr & BMSR_ANEGCOMPLETE)) 164 puts("ftmac110: auto negotiation timeout\n"); 165 166 /* 3. derive MACCR */ 167 if ((bmcr & BMCR_ANENABLE) && (bmsr & BMSR_ANEGCOMPLETE)) { 168 tmp = mdio_read(dev, chip->phy_addr, MII_ADVERTISE); 169 tmp &= mdio_read(dev, chip->phy_addr, MII_LPA); 170 if (tmp & LPA_100FULL) /* 100Mbps full-duplex */ 171 maccr = MACCR_100M | MACCR_FD; 172 else if (tmp & LPA_100HALF) /* 100Mbps half-duplex */ 173 maccr = MACCR_100M; 174 else if (tmp & LPA_10FULL) /* 10Mbps full-duplex */ 175 maccr = MACCR_FD; 176 else if (tmp & LPA_10HALF) /* 10Mbps half-duplex */ 177 maccr = 0; 178 } else { 179 if (bmcr & BMCR_SPEED100) 180 maccr = MACCR_100M; 181 else 182 maccr = 0; 183 if (bmcr & BMCR_FULLDPLX) 184 maccr |= MACCR_FD; 185 } 186 187 exit: 188 printf("ftmac110: %d Mbps, %s\n", 189 (maccr & MACCR_100M) ? 100 : 10, 190 (maccr & MACCR_FD) ? "Full" : "half"); 191 return maccr; 192 } 193 194 static int ftmac110_reset(struct eth_device *dev) 195 { 196 uint8_t *a; 197 uint32_t i, maccr; 198 struct ftmac110_chip *chip = dev->priv; 199 struct ftmac110_regs __iomem *regs = chip->regs; 200 201 /* 1. MAC reset */ 202 writel(MACCR_RESET, ®s->maccr); 203 for (i = get_timer(0); get_timer(i) < 1000; ) { 204 if (readl(®s->maccr) & MACCR_RESET) 205 continue; 206 break; 207 } 208 if (readl(®s->maccr) & MACCR_RESET) { 209 printf("ftmac110: reset failed\n"); 210 return -ENXIO; 211 } 212 213 /* 1-1. Init tx ring */ 214 for (i = 0; i < CFG_TXDES_NUM; ++i) { 215 /* owned by SW */ 216 chip->txd[i].ct[0] = 0; 217 } 218 chip->txd_idx = 0; 219 220 /* 1-2. Init rx ring */ 221 for (i = 0; i < CFG_RXDES_NUM; ++i) { 222 /* owned by HW */ 223 chip->rxd[i].ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); 224 } 225 chip->rxd_idx = 0; 226 227 /* 2. PHY status query */ 228 maccr = ftmac110_phyqry(dev); 229 230 /* 3. Fix up the MACCR value */ 231 chip->maccr = maccr | MACCR_CRCAPD | MACCR_RXALL | MACCR_RXRUNT 232 | MACCR_RXEN | MACCR_TXEN | MACCR_RXDMAEN | MACCR_TXDMAEN; 233 234 /* 4. MAC address setup */ 235 a = dev->enetaddr; 236 writel(a[1] | (a[0] << 8), ®s->mac[0]); 237 writel(a[5] | (a[4] << 8) | (a[3] << 16) 238 | (a[2] << 24), ®s->mac[1]); 239 240 /* 5. MAC registers setup */ 241 writel(chip->rxd_dma, ®s->rxba); 242 writel(chip->txd_dma, ®s->txba); 243 /* interrupt at each tx/rx */ 244 writel(ITC_DEFAULT, ®s->itc); 245 /* no tx pool, rx poll = 1 normal cycle */ 246 writel(APTC_DEFAULT, ®s->aptc); 247 /* rx threshold = [6/8 fifo, 2/8 fifo] */ 248 writel(DBLAC_DEFAULT, ®s->dblac); 249 /* disable & clear all interrupt status */ 250 chip->imr = 0; 251 writel(ISR_ALL, ®s->isr); 252 writel(chip->imr, ®s->imr); 253 /* enable mac */ 254 writel(chip->maccr, ®s->maccr); 255 256 return 0; 257 } 258 259 static int ftmac110_probe(struct eth_device *dev, bd_t *bis) 260 { 261 debug("ftmac110: probe\n"); 262 263 if (ftmac110_reset(dev)) 264 return -1; 265 266 return 0; 267 } 268 269 static void ftmac110_halt(struct eth_device *dev) 270 { 271 struct ftmac110_chip *chip = dev->priv; 272 struct ftmac110_regs __iomem *regs = chip->regs; 273 274 writel(0, ®s->imr); 275 writel(0, ®s->maccr); 276 277 debug("ftmac110: halt\n"); 278 } 279 280 static int ftmac110_send(struct eth_device *dev, void *pkt, int len) 281 { 282 struct ftmac110_chip *chip = dev->priv; 283 struct ftmac110_regs __iomem *regs = chip->regs; 284 struct ftmac110_txd *des; 285 286 if (!chip->lnkup) 287 return 0; 288 289 if (len <= 0 || len > CFG_XBUF_SIZE) { 290 printf("ftmac110: bad tx pkt len(%d)\n", len); 291 return 0; 292 } 293 294 len = max(60, len); 295 296 des = &chip->txd[chip->txd_idx]; 297 if (le32_to_cpu(des->ct[0]) & FTMAC110_TXCT0_OWNER) { 298 /* kick-off Tx DMA */ 299 writel(0xffffffff, ®s->txpd); 300 printf("ftmac110: out of txd\n"); 301 return 0; 302 } 303 304 memcpy(des->vbuf, (void *)pkt, len); 305 dma_map_single(des->vbuf, len, DMA_TO_DEVICE); 306 307 /* update len, fts and lts */ 308 des->ct[1] &= cpu_to_le32(FTMAC110_TXCT1_END); 309 des->ct[1] |= cpu_to_le32(FTMAC110_TXCT1_LEN(len) 310 | FTMAC110_TXCT1_FTS | FTMAC110_TXCT1_LTS); 311 312 /* set owner bit and clear others */ 313 des->ct[0] = cpu_to_le32(FTMAC110_TXCT0_OWNER); 314 315 /* kick-off Tx DMA */ 316 writel(0xffffffff, ®s->txpd); 317 318 chip->txd_idx = (chip->txd_idx + 1) % CFG_TXDES_NUM; 319 320 return len; 321 } 322 323 static int ftmac110_recv(struct eth_device *dev) 324 { 325 struct ftmac110_chip *chip = dev->priv; 326 struct ftmac110_rxd *des; 327 uint32_t ct0, len, rlen = 0; 328 uint8_t *buf; 329 330 if (!chip->lnkup) 331 return 0; 332 333 do { 334 des = &chip->rxd[chip->rxd_idx]; 335 ct0 = le32_to_cpu(des->ct[0]); 336 if (ct0 & FTMAC110_RXCT0_OWNER) 337 break; 338 339 len = FTMAC110_RXCT0_LEN(ct0); 340 buf = des->vbuf; 341 342 if (ct0 & FTMAC110_RXCT0_ERRMASK) { 343 printf("ftmac110: rx error\n"); 344 } else { 345 dma_map_single(buf, len, DMA_FROM_DEVICE); 346 NetReceive(buf, len); 347 rlen += len; 348 } 349 350 /* owned by hardware */ 351 des->ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); 352 353 chip->rxd_idx = (chip->rxd_idx + 1) % CFG_RXDES_NUM; 354 } while (0); 355 356 return rlen; 357 } 358 359 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) 360 361 static int ftmac110_mdio_read( 362 const char *devname, uint8_t addr, uint8_t reg, uint16_t *value) 363 { 364 int ret = 0; 365 struct eth_device *dev; 366 367 dev = eth_get_dev_by_name(devname); 368 if (dev == NULL) { 369 printf("%s: no such device\n", devname); 370 ret = -1; 371 } else { 372 *value = mdio_read(dev, addr, reg); 373 } 374 375 return ret; 376 } 377 378 static int ftmac110_mdio_write( 379 const char *devname, uint8_t addr, uint8_t reg, uint16_t value) 380 { 381 int ret = 0; 382 struct eth_device *dev; 383 384 dev = eth_get_dev_by_name(devname); 385 if (dev == NULL) { 386 printf("%s: no such device\n", devname); 387 ret = -1; 388 } else { 389 mdio_write(dev, addr, reg, value); 390 } 391 392 return ret; 393 } 394 395 #endif /* #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) */ 396 397 int ftmac110_initialize(bd_t *bis) 398 { 399 int i, card_nr = 0; 400 struct eth_device *dev; 401 struct ftmac110_chip *chip; 402 403 dev = malloc(sizeof(*dev) + sizeof(*chip)); 404 if (dev == NULL) { 405 panic("ftmac110: out of memory 1\n"); 406 return -1; 407 } 408 chip = (struct ftmac110_chip *)(dev + 1); 409 memset(dev, 0, sizeof(*dev) + sizeof(*chip)); 410 411 sprintf(dev->name, "FTMAC110#%d", card_nr); 412 413 dev->iobase = CONFIG_FTMAC110_BASE; 414 chip->regs = (void __iomem *)dev->iobase; 415 dev->priv = chip; 416 dev->init = ftmac110_probe; 417 dev->halt = ftmac110_halt; 418 dev->send = ftmac110_send; 419 dev->recv = ftmac110_recv; 420 421 if (!eth_getenv_enetaddr_by_index("eth", card_nr, dev->enetaddr)) 422 eth_random_enetaddr(dev->enetaddr); 423 424 /* allocate tx descriptors (it must be 16 bytes aligned) */ 425 chip->txd = dma_alloc_coherent( 426 sizeof(struct ftmac110_txd) * CFG_TXDES_NUM, &chip->txd_dma); 427 if (!chip->txd) 428 panic("ftmac110: out of memory 3\n"); 429 memset(chip->txd, 0, 430 sizeof(struct ftmac110_txd) * CFG_TXDES_NUM); 431 for (i = 0; i < CFG_TXDES_NUM; ++i) { 432 void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE); 433 if (!va) 434 panic("ftmac110: out of memory 4\n"); 435 chip->txd[i].vbuf = va; 436 chip->txd[i].buf = cpu_to_le32(virt_to_phys(va)); 437 chip->txd[i].ct[1] = 0; 438 chip->txd[i].ct[0] = 0; /* owned by SW */ 439 } 440 chip->txd[i - 1].ct[1] |= cpu_to_le32(FTMAC110_TXCT1_END); 441 chip->txd_idx = 0; 442 443 /* allocate rx descriptors (it must be 16 bytes aligned) */ 444 chip->rxd = dma_alloc_coherent( 445 sizeof(struct ftmac110_rxd) * CFG_RXDES_NUM, &chip->rxd_dma); 446 if (!chip->rxd) 447 panic("ftmac110: out of memory 4\n"); 448 memset((void *)chip->rxd, 0, 449 sizeof(struct ftmac110_rxd) * CFG_RXDES_NUM); 450 for (i = 0; i < CFG_RXDES_NUM; ++i) { 451 void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2); 452 if (!va) 453 panic("ftmac110: out of memory 5\n"); 454 /* it needs to be exactly 2 bytes aligned */ 455 va = ((uint8_t *)va + 2); 456 chip->rxd[i].vbuf = va; 457 chip->rxd[i].buf = cpu_to_le32(virt_to_phys(va)); 458 chip->rxd[i].ct[1] = cpu_to_le32(CFG_XBUF_SIZE); 459 chip->rxd[i].ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); 460 } 461 chip->rxd[i - 1].ct[1] |= cpu_to_le32(FTMAC110_RXCT1_END); 462 chip->rxd_idx = 0; 463 464 eth_register(dev); 465 466 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) 467 miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write); 468 #endif 469 470 card_nr++; 471 472 return card_nr; 473 } 474