1 /* 2 * Copyright (C) 2014 Freescale Semiconductor 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <errno.h> 8 #include <linux/bug.h> 9 #include <asm/io.h> 10 #include <libfdt.h> 11 #include <fdt_support.h> 12 #include <fsl-mc/fsl_mc.h> 13 #include <fsl-mc/fsl_mc_sys.h> 14 #include <fsl-mc/fsl_mc_private.h> 15 #include <fsl-mc/fsl_dpmng.h> 16 #include <fsl-mc/fsl_dprc.h> 17 #include <fsl-mc/fsl_dpio.h> 18 #include <fsl-mc/fsl_dpni.h> 19 #include <fsl-mc/fsl_qbman_portal.h> 20 #include <fsl-mc/ldpaa_wriop.h> 21 22 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024) 23 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1)) 24 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024) 25 26 #define MC_MEM_SIZE_ENV_VAR "mcmemsize" 27 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" 28 29 DECLARE_GLOBAL_DATA_PTR; 30 static int mc_boot_status = -1; 31 static int mc_dpl_applied = -1; 32 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 33 static int mc_aiop_applied = -1; 34 #endif 35 struct fsl_mc_io *root_mc_io = NULL; 36 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */ 37 uint16_t root_dprc_handle = 0; 38 uint16_t dflt_dprc_handle = 0; 39 int child_dprc_id; 40 struct fsl_dpbp_obj *dflt_dpbp = NULL; 41 struct fsl_dpio_obj *dflt_dpio = NULL; 42 struct fsl_dpni_obj *dflt_dpni = NULL; 43 44 #ifdef DEBUG 45 void dump_ram_words(const char *title, void *addr) 46 { 47 int i; 48 uint32_t *words = addr; 49 50 printf("Dumping beginning of %s (%p):\n", title, addr); 51 for (i = 0; i < 16; i++) 52 printf("%#x ", words[i]); 53 54 printf("\n"); 55 } 56 57 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs) 58 { 59 printf("MC CCSR registers:\n" 60 "reg_gcr1 %#x\n" 61 "reg_gsr %#x\n" 62 "reg_sicbalr %#x\n" 63 "reg_sicbahr %#x\n" 64 "reg_sicapr %#x\n" 65 "reg_mcfbalr %#x\n" 66 "reg_mcfbahr %#x\n" 67 "reg_mcfapr %#x\n" 68 "reg_psr %#x\n", 69 mc_ccsr_regs->reg_gcr1, 70 mc_ccsr_regs->reg_gsr, 71 mc_ccsr_regs->reg_sicbalr, 72 mc_ccsr_regs->reg_sicbahr, 73 mc_ccsr_regs->reg_sicapr, 74 mc_ccsr_regs->reg_mcfbalr, 75 mc_ccsr_regs->reg_mcfbahr, 76 mc_ccsr_regs->reg_mcfapr, 77 mc_ccsr_regs->reg_psr); 78 } 79 #else 80 81 #define dump_ram_words(title, addr) 82 #define dump_mc_ccsr_regs(mc_ccsr_regs) 83 84 #endif /* DEBUG */ 85 86 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 87 /** 88 * Copying MC firmware or DPL image to DDR 89 */ 90 static int mc_copy_image(const char *title, 91 u64 image_addr, u32 image_size, u64 mc_ram_addr) 92 { 93 debug("%s copied to address %p\n", title, (void *)mc_ram_addr); 94 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); 95 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size); 96 return 0; 97 } 98 99 /** 100 * MC firmware FIT image parser checks if the image is in FIT 101 * format, verifies integrity of the image and calculates 102 * raw image address and size values. 103 * Returns 0 on success and a negative errno on error. 104 * task fail. 105 **/ 106 int parse_mc_firmware_fit_image(u64 mc_fw_addr, 107 const void **raw_image_addr, 108 size_t *raw_image_size) 109 { 110 int format; 111 void *fit_hdr; 112 int node_offset; 113 const void *data; 114 size_t size; 115 const char *uname = "firmware"; 116 117 fit_hdr = (void *)mc_fw_addr; 118 119 /* Check if Image is in FIT format */ 120 format = genimg_get_format(fit_hdr); 121 122 if (format != IMAGE_FORMAT_FIT) { 123 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n"); 124 return -EINVAL; 125 } 126 127 if (!fit_check_format(fit_hdr)) { 128 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n"); 129 return -EINVAL; 130 } 131 132 node_offset = fit_image_get_node(fit_hdr, uname); 133 134 if (node_offset < 0) { 135 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n"); 136 return -ENOENT; 137 } 138 139 /* Verify MC firmware image */ 140 if (!(fit_image_verify(fit_hdr, node_offset))) { 141 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n"); 142 return -EINVAL; 143 } 144 145 /* Get address and size of raw image */ 146 fit_image_get_data(fit_hdr, node_offset, &data, &size); 147 148 *raw_image_addr = data; 149 *raw_image_size = size; 150 151 return 0; 152 } 153 #endif 154 155 /* 156 * Calculates the values to be used to specify the address range 157 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers. 158 * It returns the highest 512MB-aligned address within the given 159 * address range, in '*aligned_base_addr', and the number of 256 MiB 160 * blocks in it, in 'num_256mb_blocks'. 161 */ 162 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr, 163 size_t mc_ram_size, 164 u64 *aligned_base_addr, 165 u8 *num_256mb_blocks) 166 { 167 u64 addr; 168 u16 num_blocks; 169 170 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) { 171 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 172 mc_ram_size); 173 return -EINVAL; 174 } 175 176 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; 177 if (num_blocks < 1 || num_blocks > 0xff) { 178 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 179 mc_ram_size); 180 return -EINVAL; 181 } 182 183 addr = (mc_private_ram_start_addr + mc_ram_size - 1) & 184 MC_RAM_BASE_ADDR_ALIGNMENT_MASK; 185 186 if (addr < mc_private_ram_start_addr) { 187 printf("fsl-mc: ERROR: bad start address %#llx\n", 188 mc_private_ram_start_addr); 189 return -EFAULT; 190 } 191 192 *aligned_base_addr = addr; 193 *num_256mb_blocks = num_blocks; 194 return 0; 195 } 196 197 static int mc_fixup_dpc(u64 dpc_addr) 198 { 199 void *blob = (void *)dpc_addr; 200 int nodeoffset; 201 202 /* delete any existing ICID pools */ 203 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools"); 204 if (fdt_del_node(blob, nodeoffset) < 0) 205 printf("\nfsl-mc: WARNING: could not delete ICID pool\n"); 206 207 /* add a new pool */ 208 nodeoffset = fdt_path_offset(blob, "/resources"); 209 if (nodeoffset < 0) { 210 printf("\nfsl-mc: ERROR: DPC is missing /resources\n"); 211 return -EINVAL; 212 } 213 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools"); 214 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0"); 215 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 216 "base_icid", FSL_DPAA2_STREAM_ID_START, 1); 217 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 218 "num", 219 FSL_DPAA2_STREAM_ID_END - 220 FSL_DPAA2_STREAM_ID_START + 1, 1); 221 222 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob)); 223 224 return 0; 225 } 226 227 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr) 228 { 229 u64 mc_dpc_offset; 230 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 231 int error; 232 void *dpc_fdt_hdr; 233 int dpc_size; 234 #endif 235 236 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 237 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 || 238 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff); 239 240 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET; 241 #else 242 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined" 243 #endif 244 245 /* 246 * Load the MC DPC blob in the MC private DRAM block: 247 */ 248 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 249 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset); 250 #else 251 /* 252 * Get address and size of the DPC blob stored in flash: 253 */ 254 dpc_fdt_hdr = (void *)mc_dpc_addr; 255 256 error = fdt_check_header(dpc_fdt_hdr); 257 if (error != 0) { 258 /* 259 * Don't return with error here, since the MC firmware can 260 * still boot without a DPC 261 */ 262 printf("\nfsl-mc: WARNING: No DPC image found"); 263 return 0; 264 } 265 266 dpc_size = fdt_totalsize(dpc_fdt_hdr); 267 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) { 268 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n", 269 dpc_size); 270 return -EINVAL; 271 } 272 273 mc_copy_image("MC DPC blob", 274 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset); 275 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */ 276 277 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset)) 278 return -EINVAL; 279 280 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset)); 281 return 0; 282 } 283 284 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr) 285 { 286 u64 mc_dpl_offset; 287 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR 288 int error; 289 void *dpl_fdt_hdr; 290 int dpl_size; 291 #endif 292 293 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 294 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 || 295 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff); 296 297 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET; 298 #else 299 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined" 300 #endif 301 302 /* 303 * Load the MC DPL blob in the MC private DRAM block: 304 */ 305 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR 306 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset); 307 #else 308 /* 309 * Get address and size of the DPL blob stored in flash: 310 */ 311 dpl_fdt_hdr = (void *)mc_dpl_addr; 312 313 error = fdt_check_header(dpl_fdt_hdr); 314 if (error != 0) { 315 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n"); 316 return error; 317 } 318 319 dpl_size = fdt_totalsize(dpl_fdt_hdr); 320 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) { 321 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n", 322 dpl_size); 323 return -EINVAL; 324 } 325 326 mc_copy_image("MC DPL blob", 327 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset); 328 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */ 329 330 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset)); 331 return 0; 332 } 333 334 /** 335 * Return the MC boot timeout value in milliseconds 336 */ 337 static unsigned long get_mc_boot_timeout_ms(void) 338 { 339 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 340 341 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR); 342 343 if (timeout_ms_env_var) { 344 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10); 345 if (timeout_ms == 0) { 346 printf("fsl-mc: WARNING: Invalid value for \'" 347 MC_BOOT_TIMEOUT_ENV_VAR 348 "\' environment variable: %lu\n", 349 timeout_ms); 350 351 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 352 } 353 } 354 355 return timeout_ms; 356 } 357 358 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 359 static int load_mc_aiop_img(u64 aiop_fw_addr) 360 { 361 u64 mc_ram_addr = mc_get_dram_addr(); 362 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 363 void *aiop_img; 364 #endif 365 366 /* 367 * Load the MC AIOP image in the MC private DRAM block: 368 */ 369 370 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 371 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr + 372 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 373 #else 374 aiop_img = (void *)aiop_fw_addr; 375 mc_copy_image("MC AIOP image", 376 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH, 377 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 378 #endif 379 mc_aiop_applied = 0; 380 381 return 0; 382 } 383 #endif 384 385 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr) 386 { 387 u32 reg_gsr; 388 u32 mc_fw_boot_status; 389 unsigned long timeout_ms = get_mc_boot_timeout_ms(); 390 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 391 392 dmb(); 393 assert(timeout_ms > 0); 394 for (;;) { 395 udelay(1000); /* throttle polling */ 396 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr); 397 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK); 398 if (mc_fw_boot_status & 0x1) 399 break; 400 401 timeout_ms--; 402 if (timeout_ms == 0) 403 break; 404 } 405 406 if (timeout_ms == 0) { 407 printf("ERROR: timeout\n"); 408 409 /* TODO: Get an error status from an MC CCSR register */ 410 return -ETIMEDOUT; 411 } 412 413 if (mc_fw_boot_status != 0x1) { 414 /* 415 * TODO: Identify critical errors from the GSR register's FS 416 * field and for those errors, set error to -ENODEV or other 417 * appropriate errno, so that the status property is set to 418 * failure in the fsl,dprc device tree node. 419 */ 420 printf("WARNING: Firmware returned an error (GSR: %#x)\n", 421 reg_gsr); 422 } else { 423 printf("SUCCESS\n"); 424 } 425 426 427 *final_reg_gsr = reg_gsr; 428 return 0; 429 } 430 431 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) 432 { 433 int error = 0; 434 int portal_id = 0; 435 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 436 u64 mc_ram_addr = mc_get_dram_addr(); 437 u32 reg_gsr; 438 u32 reg_mcfbalr; 439 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 440 const void *raw_image_addr; 441 size_t raw_image_size = 0; 442 #endif 443 struct mc_version mc_ver_info; 444 u64 mc_ram_aligned_base_addr; 445 u8 mc_ram_num_256mb_blocks; 446 size_t mc_ram_size = mc_get_dram_block_size(); 447 448 449 error = calculate_mc_private_ram_params(mc_ram_addr, 450 mc_ram_size, 451 &mc_ram_aligned_base_addr, 452 &mc_ram_num_256mb_blocks); 453 if (error != 0) 454 goto out; 455 456 /* 457 * Management Complex cores should be held at reset out of POR. 458 * U-boot should be the first software to touch MC. To be safe, 459 * we reset all cores again by setting GCR1 to 0. It doesn't do 460 * anything if they are held at reset. After we setup the firmware 461 * we kick off MC by deasserting the reset bit for core 0, and 462 * deasserting the reset bits for Command Portal Managers. 463 * The stop bits are not touched here. They are used to stop the 464 * cores when they are active. Setting stop bits doesn't stop the 465 * cores from fetching instructions when they are released from 466 * reset. 467 */ 468 out_le32(&mc_ccsr_regs->reg_gcr1, 0); 469 dmb(); 470 471 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR 472 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr); 473 #else 474 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr, 475 &raw_image_size); 476 if (error != 0) 477 goto out; 478 /* 479 * Load the MC FW at the beginning of the MC private DRAM block: 480 */ 481 mc_copy_image("MC Firmware", 482 (u64)raw_image_addr, raw_image_size, mc_ram_addr); 483 #endif 484 dump_ram_words("firmware", (void *)mc_ram_addr); 485 486 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr); 487 if (error != 0) 488 goto out; 489 490 debug("mc_ccsr_regs %p\n", mc_ccsr_regs); 491 dump_mc_ccsr_regs(mc_ccsr_regs); 492 493 /* 494 * Tell MC what is the address range of the DRAM block assigned to it: 495 */ 496 reg_mcfbalr = (u32)mc_ram_aligned_base_addr | 497 (mc_ram_num_256mb_blocks - 1); 498 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); 499 out_le32(&mc_ccsr_regs->reg_mcfbahr, 500 (u32)(mc_ram_aligned_base_addr >> 32)); 501 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ); 502 503 /* 504 * Tell the MC that we want delayed DPL deployment. 505 */ 506 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00); 507 508 printf("\nfsl-mc: Booting Management Complex ... "); 509 510 /* 511 * Deassert reset and release MC core 0 to run 512 */ 513 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST); 514 error = wait_for_mc(true, ®_gsr); 515 if (error != 0) 516 goto out; 517 518 /* 519 * TODO: need to obtain the portal_id for the root container from the 520 * DPL 521 */ 522 portal_id = 0; 523 524 /* 525 * Initialize the global default MC portal 526 * And check that the MC firmware is responding portal commands: 527 */ 528 root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 529 if (!root_mc_io) { 530 printf(" No memory: malloc() failed\n"); 531 return -ENOMEM; 532 } 533 534 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id); 535 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", 536 portal_id, root_mc_io->mmio_regs); 537 538 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info); 539 if (error != 0) { 540 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n", 541 error); 542 goto out; 543 } 544 545 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n", 546 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision, 547 reg_gsr & GSR_FS_MASK); 548 549 out: 550 if (error != 0) 551 mc_boot_status = error; 552 else 553 mc_boot_status = 0; 554 555 return error; 556 } 557 558 int mc_apply_dpl(u64 mc_dpl_addr) 559 { 560 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 561 int error = 0; 562 u32 reg_gsr; 563 u64 mc_ram_addr = mc_get_dram_addr(); 564 size_t mc_ram_size = mc_get_dram_block_size(); 565 566 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr); 567 if (error != 0) 568 return error; 569 570 /* 571 * Tell the MC to deploy the DPL: 572 */ 573 out_le32(&mc_ccsr_regs->reg_gsr, 0x0); 574 printf("fsl-mc: Deploying data path layout ... "); 575 error = wait_for_mc(false, ®_gsr); 576 577 if (!error) 578 mc_dpl_applied = 0; 579 580 return error; 581 } 582 583 int get_mc_boot_status(void) 584 { 585 return mc_boot_status; 586 } 587 588 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 589 int get_aiop_apply_status(void) 590 { 591 return mc_aiop_applied; 592 } 593 #endif 594 595 int get_dpl_apply_status(void) 596 { 597 return mc_dpl_applied; 598 } 599 600 /** 601 * Return the MC address of private DRAM block. 602 */ 603 u64 mc_get_dram_addr(void) 604 { 605 u64 mc_ram_addr; 606 607 /* 608 * The MC private DRAM block was already carved at the end of DRAM 609 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE: 610 */ 611 if (gd->bd->bi_dram[1].start) { 612 mc_ram_addr = 613 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; 614 } else { 615 mc_ram_addr = 616 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; 617 } 618 619 return mc_ram_addr; 620 } 621 622 /** 623 * Return the actual size of the MC private DRAM block. 624 */ 625 unsigned long mc_get_dram_block_size(void) 626 { 627 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 628 629 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR); 630 631 if (dram_block_size_env_var) { 632 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL, 633 10); 634 635 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) { 636 printf("fsl-mc: WARNING: Invalid value for \'" 637 MC_MEM_SIZE_ENV_VAR 638 "\' environment variable: %lu\n", 639 dram_block_size); 640 641 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 642 } 643 } 644 645 return dram_block_size; 646 } 647 648 int fsl_mc_ldpaa_init(bd_t *bis) 649 { 650 int i; 651 652 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) 653 if ((wriop_is_enabled_dpmac(i) == 1) && 654 (wriop_get_phy_address(i) != -1)) 655 ldpaa_eth_init(i, wriop_get_enet_if(i)); 656 return 0; 657 } 658 659 static int dpio_init(void) 660 { 661 struct qbman_swp_desc p_des; 662 struct dpio_attr attr; 663 struct dpio_cfg dpio_cfg; 664 int err = 0; 665 666 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj)); 667 if (!dflt_dpio) { 668 printf("No memory: malloc() failed\n"); 669 err = -ENOMEM; 670 goto err_malloc; 671 } 672 673 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL; 674 dpio_cfg.num_priorities = 8; 675 676 err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg, 677 &dflt_dpio->dpio_handle); 678 if (err < 0) { 679 printf("dpio_create() failed: %d\n", err); 680 err = -ENODEV; 681 goto err_create; 682 } 683 684 memset(&attr, 0, sizeof(struct dpio_attr)); 685 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 686 dflt_dpio->dpio_handle, &attr); 687 if (err < 0) { 688 printf("dpio_get_attributes() failed: %d\n", err); 689 goto err_get_attr; 690 } 691 692 dflt_dpio->dpio_id = attr.id; 693 #ifdef DEBUG 694 printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id); 695 #endif 696 697 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 698 if (err < 0) { 699 printf("dpio_enable() failed %d\n", err); 700 goto err_get_enable; 701 } 702 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n", 703 attr.qbman_portal_ce_offset, 704 attr.qbman_portal_ci_offset, 705 attr.qbman_portal_id, 706 attr.num_priorities); 707 708 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 709 + attr.qbman_portal_ce_offset); 710 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 711 + attr.qbman_portal_ci_offset); 712 713 dflt_dpio->sw_portal = qbman_swp_init(&p_des); 714 if (dflt_dpio->sw_portal == NULL) { 715 printf("qbman_swp_init() failed\n"); 716 goto err_get_swp_init; 717 } 718 return 0; 719 720 err_get_swp_init: 721 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 722 err_get_enable: 723 free(dflt_dpio); 724 err_get_attr: 725 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 726 dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 727 err_create: 728 err_malloc: 729 return err; 730 } 731 732 static int dpio_exit(void) 733 { 734 int err; 735 736 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 737 if (err < 0) { 738 printf("dpio_disable() failed: %d\n", err); 739 goto err; 740 } 741 742 err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 743 if (err < 0) { 744 printf("dpio_destroy() failed: %d\n", err); 745 goto err; 746 } 747 748 #ifdef DEBUG 749 printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id); 750 #endif 751 752 if (dflt_dpio) 753 free(dflt_dpio); 754 755 return 0; 756 err: 757 return err; 758 } 759 760 static int dprc_init(void) 761 { 762 int err, child_portal_id, container_id; 763 struct dprc_cfg cfg; 764 uint64_t mc_portal_offset; 765 766 /* Open root container */ 767 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id); 768 if (err < 0) { 769 printf("dprc_get_container_id(): Root failed: %d\n", err); 770 goto err_root_container_id; 771 } 772 773 #ifdef DEBUG 774 printf("Root container id = %d\n", container_id); 775 #endif 776 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id, 777 &root_dprc_handle); 778 if (err < 0) { 779 printf("dprc_open(): Root Container failed: %d\n", err); 780 goto err_root_open; 781 } 782 783 if (!root_dprc_handle) { 784 printf("dprc_open(): Root Container Handle is not valid\n"); 785 goto err_root_open; 786 } 787 788 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED | 789 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED | 790 DPRC_CFG_OPT_ALLOC_ALLOWED; 791 cfg.icid = DPRC_GET_ICID_FROM_POOL; 792 cfg.portal_id = 250; 793 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS, 794 root_dprc_handle, 795 &cfg, 796 &child_dprc_id, 797 &mc_portal_offset); 798 if (err < 0) { 799 printf("dprc_create_container() failed: %d\n", err); 800 goto err_create; 801 } 802 803 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 804 if (!dflt_mc_io) { 805 err = -ENOMEM; 806 printf(" No memory: malloc() failed\n"); 807 goto err_malloc; 808 } 809 810 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset); 811 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id); 812 #ifdef DEBUG 813 printf("MC portal of child DPRC container: %d, physical addr %p)\n", 814 child_dprc_id, dflt_mc_io->mmio_regs); 815 #endif 816 817 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id, 818 &dflt_dprc_handle); 819 if (err < 0) { 820 printf("dprc_open(): Child container failed: %d\n", err); 821 goto err_child_open; 822 } 823 824 if (!dflt_dprc_handle) { 825 printf("dprc_open(): Child container Handle is not valid\n"); 826 goto err_child_open; 827 } 828 829 return 0; 830 err_child_open: 831 free(dflt_mc_io); 832 err_malloc: 833 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 834 root_dprc_handle, child_dprc_id); 835 err_create: 836 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 837 err_root_open: 838 err_root_container_id: 839 return err; 840 } 841 842 static int dprc_exit(void) 843 { 844 int err; 845 846 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle); 847 if (err < 0) { 848 printf("dprc_close(): Child failed: %d\n", err); 849 goto err; 850 } 851 852 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 853 root_dprc_handle, child_dprc_id); 854 if (err < 0) { 855 printf("dprc_destroy_container() failed: %d\n", err); 856 goto err; 857 } 858 859 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 860 if (err < 0) { 861 printf("dprc_close(): Root failed: %d\n", err); 862 goto err; 863 } 864 865 if (dflt_mc_io) 866 free(dflt_mc_io); 867 868 if (root_mc_io) 869 free(root_mc_io); 870 871 return 0; 872 873 err: 874 return err; 875 } 876 877 static int dpbp_init(void) 878 { 879 int err; 880 struct dpbp_attr dpbp_attr; 881 struct dpbp_cfg dpbp_cfg; 882 883 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj)); 884 if (!dflt_dpbp) { 885 printf("No memory: malloc() failed\n"); 886 err = -ENOMEM; 887 goto err_malloc; 888 } 889 890 dpbp_cfg.options = 512; 891 892 err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg, 893 &dflt_dpbp->dpbp_handle); 894 895 if (err < 0) { 896 err = -ENODEV; 897 printf("dpbp_create() failed: %d\n", err); 898 goto err_create; 899 } 900 901 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr)); 902 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 903 dflt_dpbp->dpbp_handle, 904 &dpbp_attr); 905 if (err < 0) { 906 printf("dpbp_get_attributes() failed: %d\n", err); 907 goto err_get_attr; 908 } 909 910 dflt_dpbp->dpbp_attr.id = dpbp_attr.id; 911 #ifdef DEBUG 912 printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 913 #endif 914 915 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 916 if (err < 0) { 917 printf("dpbp_close() failed: %d\n", err); 918 goto err_close; 919 } 920 921 return 0; 922 923 err_close: 924 free(dflt_dpbp); 925 err_get_attr: 926 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 927 dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 928 err_create: 929 err_malloc: 930 return err; 931 } 932 933 static int dpbp_exit(void) 934 { 935 int err; 936 937 err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id, 938 &dflt_dpbp->dpbp_handle); 939 if (err < 0) { 940 printf("dpbp_open() failed: %d\n", err); 941 goto err; 942 } 943 944 err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 945 dflt_dpbp->dpbp_handle); 946 if (err < 0) { 947 printf("dpbp_destroy() failed: %d\n", err); 948 goto err; 949 } 950 951 #ifdef DEBUG 952 printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 953 #endif 954 955 if (dflt_dpbp) 956 free(dflt_dpbp); 957 return 0; 958 959 err: 960 return err; 961 } 962 963 static int dpni_init(void) 964 { 965 int err; 966 struct dpni_attr dpni_attr; 967 struct dpni_cfg dpni_cfg; 968 969 dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj)); 970 if (!dflt_dpni) { 971 printf("No memory: malloc() failed\n"); 972 err = -ENOMEM; 973 goto err_malloc; 974 } 975 976 memset(&dpni_cfg, 0, sizeof(dpni_cfg)); 977 dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER | 978 DPNI_OPT_MULTICAST_FILTER; 979 980 err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg, 981 &dflt_dpni->dpni_handle); 982 983 if (err < 0) { 984 err = -ENODEV; 985 printf("dpni_create() failed: %d\n", err); 986 goto err_create; 987 } 988 989 memset(&dpni_attr, 0, sizeof(struct dpni_attr)); 990 err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 991 dflt_dpni->dpni_handle, 992 &dpni_attr); 993 if (err < 0) { 994 printf("dpni_get_attributes() failed: %d\n", err); 995 goto err_get_attr; 996 } 997 998 dflt_dpni->dpni_id = dpni_attr.id; 999 #ifdef DEBUG 1000 printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1001 #endif 1002 1003 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1004 if (err < 0) { 1005 printf("dpni_close() failed: %d\n", err); 1006 goto err_close; 1007 } 1008 1009 return 0; 1010 1011 err_close: 1012 free(dflt_dpni); 1013 err_get_attr: 1014 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1015 dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1016 err_create: 1017 err_malloc: 1018 return err; 1019 } 1020 1021 static int dpni_exit(void) 1022 { 1023 int err; 1024 1025 err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id, 1026 &dflt_dpni->dpni_handle); 1027 if (err < 0) { 1028 printf("dpni_open() failed: %d\n", err); 1029 goto err; 1030 } 1031 1032 err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 1033 dflt_dpni->dpni_handle); 1034 if (err < 0) { 1035 printf("dpni_destroy() failed: %d\n", err); 1036 goto err; 1037 } 1038 1039 #ifdef DEBUG 1040 printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1041 #endif 1042 1043 if (dflt_dpni) 1044 free(dflt_dpni); 1045 return 0; 1046 1047 err: 1048 return err; 1049 } 1050 1051 static int mc_init_object(void) 1052 { 1053 int err = 0; 1054 1055 err = dprc_init(); 1056 if (err < 0) { 1057 printf("dprc_init() failed: %d\n", err); 1058 goto err; 1059 } 1060 1061 err = dpbp_init(); 1062 if (err < 0) { 1063 printf("dpbp_init() failed: %d\n", err); 1064 goto err; 1065 } 1066 1067 err = dpio_init(); 1068 if (err < 0) { 1069 printf("dpio_init() failed: %d\n", err); 1070 goto err; 1071 } 1072 1073 err = dpni_init(); 1074 if (err < 0) { 1075 printf("dpni_init() failed: %d\n", err); 1076 goto err; 1077 } 1078 1079 return 0; 1080 err: 1081 return err; 1082 } 1083 1084 int fsl_mc_ldpaa_exit(bd_t *bd) 1085 { 1086 int err = 0; 1087 1088 if (bd && get_mc_boot_status() == -1) 1089 return 0; 1090 1091 if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) { 1092 printf("ERROR: fsl-mc: DPL is not applied\n"); 1093 err = -ENODEV; 1094 return err; 1095 } 1096 1097 if (bd && !get_mc_boot_status() && !get_dpl_apply_status()) 1098 return err; 1099 1100 err = dpbp_exit(); 1101 if (err < 0) { 1102 printf("dpni_exit() failed: %d\n", err); 1103 goto err; 1104 } 1105 1106 err = dpio_exit(); 1107 if (err < 0) { 1108 printf("dpio_exit() failed: %d\n", err); 1109 goto err; 1110 } 1111 1112 err = dpni_exit(); 1113 if (err < 0) { 1114 printf("dpni_exit() failed: %d\n", err); 1115 goto err; 1116 } 1117 1118 err = dprc_exit(); 1119 if (err < 0) { 1120 printf("dprc_exit() failed: %d\n", err); 1121 goto err; 1122 } 1123 1124 return 0; 1125 err: 1126 return err; 1127 } 1128 1129 static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1130 { 1131 int err = 0; 1132 if (argc < 3) 1133 goto usage; 1134 1135 switch (argv[1][0]) { 1136 case 's': { 1137 char sub_cmd; 1138 u64 mc_fw_addr, mc_dpc_addr; 1139 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1140 u64 aiop_fw_addr; 1141 #endif 1142 1143 sub_cmd = argv[2][0]; 1144 switch (sub_cmd) { 1145 case 'm': 1146 if (argc < 5) 1147 goto usage; 1148 1149 if (get_mc_boot_status() == 0) { 1150 printf("fsl-mc: MC is already booted"); 1151 printf("\n"); 1152 return err; 1153 } 1154 mc_fw_addr = simple_strtoull(argv[3], NULL, 16); 1155 mc_dpc_addr = simple_strtoull(argv[4], NULL, 1156 16); 1157 1158 if (!mc_init(mc_fw_addr, mc_dpc_addr)) 1159 err = mc_init_object(); 1160 break; 1161 1162 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1163 case 'a': 1164 if (argc < 4) 1165 goto usage; 1166 if (get_aiop_apply_status() == 0) { 1167 printf("fsl-mc: AIOP FW is already"); 1168 printf(" applied\n"); 1169 return err; 1170 } 1171 1172 aiop_fw_addr = simple_strtoull(argv[3], NULL, 1173 16); 1174 1175 err = load_mc_aiop_img(aiop_fw_addr); 1176 if (!err) 1177 printf("fsl-mc: AIOP FW applied\n"); 1178 break; 1179 #endif 1180 default: 1181 printf("Invalid option: %s\n", argv[2]); 1182 goto usage; 1183 1184 break; 1185 } 1186 } 1187 break; 1188 1189 case 'a': { 1190 u64 mc_dpl_addr; 1191 1192 if (argc < 4) 1193 goto usage; 1194 1195 if (get_dpl_apply_status() == 0) { 1196 printf("fsl-mc: DPL already applied\n"); 1197 return err; 1198 } 1199 1200 mc_dpl_addr = simple_strtoull(argv[3], NULL, 1201 16); 1202 1203 if (get_mc_boot_status() != 0) { 1204 printf("fsl-mc: Deploying data path layout .."); 1205 printf("ERROR (MC is not booted)\n"); 1206 return -ENODEV; 1207 } 1208 1209 if (!fsl_mc_ldpaa_exit(NULL)) 1210 err = mc_apply_dpl(mc_dpl_addr); 1211 break; 1212 } 1213 default: 1214 printf("Invalid option: %s\n", argv[1]); 1215 goto usage; 1216 break; 1217 } 1218 return err; 1219 usage: 1220 return CMD_RET_USAGE; 1221 } 1222 1223 U_BOOT_CMD( 1224 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc, 1225 "DPAA2 command to manage Management Complex (MC)", 1226 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n" 1227 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n" 1228 "fsl_mc start aiop [FW_addr] - Start AIOP\n" 1229 ); 1230