1 /* 2 * Copyright (C) 2014 Freescale Semiconductor 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <errno.h> 8 #include <linux/bug.h> 9 #include <asm/io.h> 10 #include <libfdt.h> 11 #include <fdt_support.h> 12 #include <fsl-mc/fsl_mc.h> 13 #include <fsl-mc/fsl_mc_sys.h> 14 #include <fsl-mc/fsl_mc_private.h> 15 #include <fsl-mc/fsl_dpmng.h> 16 #include <fsl-mc/fsl_dprc.h> 17 #include <fsl-mc/fsl_dpio.h> 18 #include <fsl-mc/fsl_dpni.h> 19 #include <fsl-mc/fsl_qbman_portal.h> 20 #include <fsl-mc/ldpaa_wriop.h> 21 22 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024) 23 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1)) 24 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024) 25 26 #define MC_MEM_SIZE_ENV_VAR "mcmemsize" 27 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" 28 29 DECLARE_GLOBAL_DATA_PTR; 30 static int mc_boot_status = -1; 31 static int mc_dpl_applied = -1; 32 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 33 static int mc_aiop_applied = -1; 34 #endif 35 struct fsl_mc_io *root_mc_io = NULL; 36 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */ 37 uint16_t root_dprc_handle = 0; 38 uint16_t dflt_dprc_handle = 0; 39 int child_dprc_id; 40 struct fsl_dpbp_obj *dflt_dpbp = NULL; 41 struct fsl_dpio_obj *dflt_dpio = NULL; 42 struct fsl_dpni_obj *dflt_dpni = NULL; 43 44 #ifdef DEBUG 45 void dump_ram_words(const char *title, void *addr) 46 { 47 int i; 48 uint32_t *words = addr; 49 50 printf("Dumping beginning of %s (%p):\n", title, addr); 51 for (i = 0; i < 16; i++) 52 printf("%#x ", words[i]); 53 54 printf("\n"); 55 } 56 57 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs) 58 { 59 printf("MC CCSR registers:\n" 60 "reg_gcr1 %#x\n" 61 "reg_gsr %#x\n" 62 "reg_sicbalr %#x\n" 63 "reg_sicbahr %#x\n" 64 "reg_sicapr %#x\n" 65 "reg_mcfbalr %#x\n" 66 "reg_mcfbahr %#x\n" 67 "reg_mcfapr %#x\n" 68 "reg_psr %#x\n", 69 mc_ccsr_regs->reg_gcr1, 70 mc_ccsr_regs->reg_gsr, 71 mc_ccsr_regs->reg_sicbalr, 72 mc_ccsr_regs->reg_sicbahr, 73 mc_ccsr_regs->reg_sicapr, 74 mc_ccsr_regs->reg_mcfbalr, 75 mc_ccsr_regs->reg_mcfbahr, 76 mc_ccsr_regs->reg_mcfapr, 77 mc_ccsr_regs->reg_psr); 78 } 79 #else 80 81 #define dump_ram_words(title, addr) 82 #define dump_mc_ccsr_regs(mc_ccsr_regs) 83 84 #endif /* DEBUG */ 85 86 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 87 /** 88 * Copying MC firmware or DPL image to DDR 89 */ 90 static int mc_copy_image(const char *title, 91 u64 image_addr, u32 image_size, u64 mc_ram_addr) 92 { 93 debug("%s copied to address %p\n", title, (void *)mc_ram_addr); 94 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); 95 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size); 96 return 0; 97 } 98 99 /** 100 * MC firmware FIT image parser checks if the image is in FIT 101 * format, verifies integrity of the image and calculates 102 * raw image address and size values. 103 * Returns 0 on success and a negative errno on error. 104 * task fail. 105 **/ 106 int parse_mc_firmware_fit_image(u64 mc_fw_addr, 107 const void **raw_image_addr, 108 size_t *raw_image_size) 109 { 110 int format; 111 void *fit_hdr; 112 int node_offset; 113 const void *data; 114 size_t size; 115 const char *uname = "firmware"; 116 117 fit_hdr = (void *)mc_fw_addr; 118 119 /* Check if Image is in FIT format */ 120 format = genimg_get_format(fit_hdr); 121 122 if (format != IMAGE_FORMAT_FIT) { 123 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n"); 124 return -EINVAL; 125 } 126 127 if (!fit_check_format(fit_hdr)) { 128 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n"); 129 return -EINVAL; 130 } 131 132 node_offset = fit_image_get_node(fit_hdr, uname); 133 134 if (node_offset < 0) { 135 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n"); 136 return -ENOENT; 137 } 138 139 /* Verify MC firmware image */ 140 if (!(fit_image_verify(fit_hdr, node_offset))) { 141 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n"); 142 return -EINVAL; 143 } 144 145 /* Get address and size of raw image */ 146 fit_image_get_data(fit_hdr, node_offset, &data, &size); 147 148 *raw_image_addr = data; 149 *raw_image_size = size; 150 151 return 0; 152 } 153 #endif 154 155 /* 156 * Calculates the values to be used to specify the address range 157 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers. 158 * It returns the highest 512MB-aligned address within the given 159 * address range, in '*aligned_base_addr', and the number of 256 MiB 160 * blocks in it, in 'num_256mb_blocks'. 161 */ 162 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr, 163 size_t mc_ram_size, 164 u64 *aligned_base_addr, 165 u8 *num_256mb_blocks) 166 { 167 u64 addr; 168 u16 num_blocks; 169 170 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) { 171 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 172 mc_ram_size); 173 return -EINVAL; 174 } 175 176 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; 177 if (num_blocks < 1 || num_blocks > 0xff) { 178 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 179 mc_ram_size); 180 return -EINVAL; 181 } 182 183 addr = (mc_private_ram_start_addr + mc_ram_size - 1) & 184 MC_RAM_BASE_ADDR_ALIGNMENT_MASK; 185 186 if (addr < mc_private_ram_start_addr) { 187 printf("fsl-mc: ERROR: bad start address %#llx\n", 188 mc_private_ram_start_addr); 189 return -EFAULT; 190 } 191 192 *aligned_base_addr = addr; 193 *num_256mb_blocks = num_blocks; 194 return 0; 195 } 196 197 static int mc_fixup_dpc(u64 dpc_addr) 198 { 199 void *blob = (void *)dpc_addr; 200 int nodeoffset; 201 202 /* delete any existing ICID pools */ 203 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools"); 204 if (fdt_del_node(blob, nodeoffset) < 0) 205 printf("\nfsl-mc: WARNING: could not delete ICID pool\n"); 206 207 /* add a new pool */ 208 nodeoffset = fdt_path_offset(blob, "/resources"); 209 if (nodeoffset < 0) { 210 printf("\nfsl-mc: ERROR: DPC is missing /resources\n"); 211 return -EINVAL; 212 } 213 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools"); 214 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0"); 215 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 216 "base_icid", FSL_DPAA2_STREAM_ID_START, 1); 217 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 218 "num", 219 FSL_DPAA2_STREAM_ID_END - 220 FSL_DPAA2_STREAM_ID_START + 1, 1); 221 222 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob)); 223 224 return 0; 225 } 226 227 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr) 228 { 229 u64 mc_dpc_offset; 230 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 231 int error; 232 void *dpc_fdt_hdr; 233 int dpc_size; 234 #endif 235 236 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 237 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 || 238 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff); 239 240 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET; 241 #else 242 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined" 243 #endif 244 245 /* 246 * Load the MC DPC blob in the MC private DRAM block: 247 */ 248 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 249 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset); 250 #else 251 /* 252 * Get address and size of the DPC blob stored in flash: 253 */ 254 dpc_fdt_hdr = (void *)mc_dpc_addr; 255 256 error = fdt_check_header(dpc_fdt_hdr); 257 if (error != 0) { 258 /* 259 * Don't return with error here, since the MC firmware can 260 * still boot without a DPC 261 */ 262 printf("\nfsl-mc: WARNING: No DPC image found"); 263 return 0; 264 } 265 266 dpc_size = fdt_totalsize(dpc_fdt_hdr); 267 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) { 268 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n", 269 dpc_size); 270 return -EINVAL; 271 } 272 273 mc_copy_image("MC DPC blob", 274 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset); 275 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */ 276 277 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset)) 278 return -EINVAL; 279 280 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset)); 281 return 0; 282 } 283 284 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr) 285 { 286 u64 mc_dpl_offset; 287 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR 288 int error; 289 void *dpl_fdt_hdr; 290 int dpl_size; 291 #endif 292 293 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 294 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 || 295 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff); 296 297 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET; 298 #else 299 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined" 300 #endif 301 302 /* 303 * Load the MC DPL blob in the MC private DRAM block: 304 */ 305 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR 306 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset); 307 #else 308 /* 309 * Get address and size of the DPL blob stored in flash: 310 */ 311 dpl_fdt_hdr = (void *)mc_dpl_addr; 312 313 error = fdt_check_header(dpl_fdt_hdr); 314 if (error != 0) { 315 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n"); 316 return error; 317 } 318 319 dpl_size = fdt_totalsize(dpl_fdt_hdr); 320 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) { 321 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n", 322 dpl_size); 323 return -EINVAL; 324 } 325 326 mc_copy_image("MC DPL blob", 327 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset); 328 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */ 329 330 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset)); 331 return 0; 332 } 333 334 /** 335 * Return the MC boot timeout value in milliseconds 336 */ 337 static unsigned long get_mc_boot_timeout_ms(void) 338 { 339 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 340 341 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR); 342 343 if (timeout_ms_env_var) { 344 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10); 345 if (timeout_ms == 0) { 346 printf("fsl-mc: WARNING: Invalid value for \'" 347 MC_BOOT_TIMEOUT_ENV_VAR 348 "\' environment variable: %lu\n", 349 timeout_ms); 350 351 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 352 } 353 } 354 355 return timeout_ms; 356 } 357 358 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 359 static int load_mc_aiop_img(u64 aiop_fw_addr) 360 { 361 u64 mc_ram_addr = mc_get_dram_addr(); 362 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 363 void *aiop_img; 364 #endif 365 366 /* 367 * Load the MC AIOP image in the MC private DRAM block: 368 */ 369 370 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 371 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr + 372 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 373 #else 374 aiop_img = (void *)aiop_fw_addr; 375 mc_copy_image("MC AIOP image", 376 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH, 377 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 378 #endif 379 mc_aiop_applied = 0; 380 381 return 0; 382 } 383 #endif 384 385 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr) 386 { 387 u32 reg_gsr; 388 u32 mc_fw_boot_status; 389 unsigned long timeout_ms = get_mc_boot_timeout_ms(); 390 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 391 392 dmb(); 393 assert(timeout_ms > 0); 394 for (;;) { 395 udelay(1000); /* throttle polling */ 396 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr); 397 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK); 398 if (mc_fw_boot_status & 0x1) 399 break; 400 401 timeout_ms--; 402 if (timeout_ms == 0) 403 break; 404 } 405 406 if (timeout_ms == 0) { 407 printf("ERROR: timeout\n"); 408 409 /* TODO: Get an error status from an MC CCSR register */ 410 return -ETIMEDOUT; 411 } 412 413 if (mc_fw_boot_status != 0x1) { 414 /* 415 * TODO: Identify critical errors from the GSR register's FS 416 * field and for those errors, set error to -ENODEV or other 417 * appropriate errno, so that the status property is set to 418 * failure in the fsl,dprc device tree node. 419 */ 420 printf("WARNING: Firmware returned an error (GSR: %#x)\n", 421 reg_gsr); 422 } else { 423 printf("SUCCESS\n"); 424 } 425 426 427 *final_reg_gsr = reg_gsr; 428 return 0; 429 } 430 431 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) 432 { 433 int error = 0; 434 int portal_id = 0; 435 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 436 u64 mc_ram_addr = mc_get_dram_addr(); 437 u32 reg_gsr; 438 u32 reg_mcfbalr; 439 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 440 const void *raw_image_addr; 441 size_t raw_image_size = 0; 442 #endif 443 struct mc_version mc_ver_info; 444 u64 mc_ram_aligned_base_addr; 445 u8 mc_ram_num_256mb_blocks; 446 size_t mc_ram_size = mc_get_dram_block_size(); 447 448 449 error = calculate_mc_private_ram_params(mc_ram_addr, 450 mc_ram_size, 451 &mc_ram_aligned_base_addr, 452 &mc_ram_num_256mb_blocks); 453 if (error != 0) 454 goto out; 455 456 /* 457 * Management Complex cores should be held at reset out of POR. 458 * U-Boot should be the first software to touch MC. To be safe, 459 * we reset all cores again by setting GCR1 to 0. It doesn't do 460 * anything if they are held at reset. After we setup the firmware 461 * we kick off MC by deasserting the reset bit for core 0, and 462 * deasserting the reset bits for Command Portal Managers. 463 * The stop bits are not touched here. They are used to stop the 464 * cores when they are active. Setting stop bits doesn't stop the 465 * cores from fetching instructions when they are released from 466 * reset. 467 */ 468 out_le32(&mc_ccsr_regs->reg_gcr1, 0); 469 dmb(); 470 471 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR 472 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr); 473 #else 474 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr, 475 &raw_image_size); 476 if (error != 0) 477 goto out; 478 /* 479 * Load the MC FW at the beginning of the MC private DRAM block: 480 */ 481 mc_copy_image("MC Firmware", 482 (u64)raw_image_addr, raw_image_size, mc_ram_addr); 483 #endif 484 dump_ram_words("firmware", (void *)mc_ram_addr); 485 486 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr); 487 if (error != 0) 488 goto out; 489 490 debug("mc_ccsr_regs %p\n", mc_ccsr_regs); 491 dump_mc_ccsr_regs(mc_ccsr_regs); 492 493 /* 494 * Tell MC what is the address range of the DRAM block assigned to it: 495 */ 496 reg_mcfbalr = (u32)mc_ram_aligned_base_addr | 497 (mc_ram_num_256mb_blocks - 1); 498 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); 499 out_le32(&mc_ccsr_regs->reg_mcfbahr, 500 (u32)(mc_ram_aligned_base_addr >> 32)); 501 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ); 502 503 /* 504 * Tell the MC that we want delayed DPL deployment. 505 */ 506 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00); 507 508 printf("\nfsl-mc: Booting Management Complex ... "); 509 510 /* 511 * Deassert reset and release MC core 0 to run 512 */ 513 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST); 514 error = wait_for_mc(true, ®_gsr); 515 if (error != 0) 516 goto out; 517 518 /* 519 * TODO: need to obtain the portal_id for the root container from the 520 * DPL 521 */ 522 portal_id = 0; 523 524 /* 525 * Initialize the global default MC portal 526 * And check that the MC firmware is responding portal commands: 527 */ 528 root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 529 if (!root_mc_io) { 530 printf(" No memory: malloc() failed\n"); 531 return -ENOMEM; 532 } 533 534 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id); 535 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", 536 portal_id, root_mc_io->mmio_regs); 537 538 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info); 539 if (error != 0) { 540 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n", 541 error); 542 goto out; 543 } 544 545 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n", 546 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision, 547 reg_gsr & GSR_FS_MASK); 548 549 out: 550 if (error != 0) 551 mc_boot_status = error; 552 else 553 mc_boot_status = 0; 554 555 return error; 556 } 557 558 int mc_apply_dpl(u64 mc_dpl_addr) 559 { 560 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 561 int error = 0; 562 u32 reg_gsr; 563 u64 mc_ram_addr = mc_get_dram_addr(); 564 size_t mc_ram_size = mc_get_dram_block_size(); 565 566 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr); 567 if (error != 0) 568 return error; 569 570 /* 571 * Tell the MC to deploy the DPL: 572 */ 573 out_le32(&mc_ccsr_regs->reg_gsr, 0x0); 574 printf("fsl-mc: Deploying data path layout ... "); 575 error = wait_for_mc(false, ®_gsr); 576 577 if (!error) 578 mc_dpl_applied = 0; 579 580 return error; 581 } 582 583 int get_mc_boot_status(void) 584 { 585 return mc_boot_status; 586 } 587 588 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 589 int get_aiop_apply_status(void) 590 { 591 return mc_aiop_applied; 592 } 593 #endif 594 595 int get_dpl_apply_status(void) 596 { 597 return mc_dpl_applied; 598 } 599 600 /** 601 * Return the MC address of private DRAM block. 602 */ 603 u64 mc_get_dram_addr(void) 604 { 605 u64 mc_ram_addr; 606 607 /* 608 * The MC private DRAM block was already carved at the end of DRAM 609 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE: 610 */ 611 if (gd->bd->bi_dram[1].start) { 612 mc_ram_addr = 613 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; 614 } else { 615 mc_ram_addr = 616 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; 617 } 618 619 return mc_ram_addr; 620 } 621 622 /** 623 * Return the actual size of the MC private DRAM block. 624 */ 625 unsigned long mc_get_dram_block_size(void) 626 { 627 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 628 629 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR); 630 631 if (dram_block_size_env_var) { 632 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL, 633 10); 634 635 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) { 636 printf("fsl-mc: WARNING: Invalid value for \'" 637 MC_MEM_SIZE_ENV_VAR 638 "\' environment variable: %lu\n", 639 dram_block_size); 640 641 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 642 } 643 } 644 645 return dram_block_size; 646 } 647 648 int fsl_mc_ldpaa_init(bd_t *bis) 649 { 650 int i; 651 652 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) 653 if ((wriop_is_enabled_dpmac(i) == 1) && 654 (wriop_get_phy_address(i) != -1)) 655 ldpaa_eth_init(i, wriop_get_enet_if(i)); 656 return 0; 657 } 658 659 static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle) 660 { 661 struct dprc_attributes attr; 662 int error; 663 664 memset(&attr, 0, sizeof(struct dprc_attributes)); 665 error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr); 666 if (error == 0) { 667 if ((attr.version.major != DPRC_VER_MAJOR) || 668 (attr.version.minor != DPRC_VER_MINOR)) { 669 printf("DPRC version mismatch found %u.%u,", 670 attr.version.major, 671 attr.version.minor); 672 printf("supported version is %u.%u\n", 673 DPRC_VER_MAJOR, DPRC_VER_MINOR); 674 } 675 } 676 return error; 677 } 678 679 static int dpio_init(void) 680 { 681 struct qbman_swp_desc p_des; 682 struct dpio_attr attr; 683 struct dpio_cfg dpio_cfg; 684 int err = 0; 685 686 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj)); 687 if (!dflt_dpio) { 688 printf("No memory: malloc() failed\n"); 689 err = -ENOMEM; 690 goto err_malloc; 691 } 692 693 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL; 694 dpio_cfg.num_priorities = 8; 695 696 err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg, 697 &dflt_dpio->dpio_handle); 698 if (err < 0) { 699 printf("dpio_create() failed: %d\n", err); 700 err = -ENODEV; 701 goto err_create; 702 } 703 704 memset(&attr, 0, sizeof(struct dpio_attr)); 705 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 706 dflt_dpio->dpio_handle, &attr); 707 if (err < 0) { 708 printf("dpio_get_attributes() failed: %d\n", err); 709 goto err_get_attr; 710 } 711 712 if ((attr.version.major != DPIO_VER_MAJOR) || 713 (attr.version.minor != DPIO_VER_MINOR)) { 714 printf("DPIO version mismatch found %u.%u,", 715 attr.version.major, attr.version.minor); 716 printf("supported version is %u.%u\n", 717 DPIO_VER_MAJOR, DPIO_VER_MINOR); 718 } 719 720 dflt_dpio->dpio_id = attr.id; 721 #ifdef DEBUG 722 printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id); 723 #endif 724 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 725 if (err < 0) { 726 printf("dpio_enable() failed %d\n", err); 727 goto err_get_enable; 728 } 729 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n", 730 attr.qbman_portal_ce_offset, 731 attr.qbman_portal_ci_offset, 732 attr.qbman_portal_id, 733 attr.num_priorities); 734 735 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 736 + attr.qbman_portal_ce_offset); 737 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 738 + attr.qbman_portal_ci_offset); 739 740 dflt_dpio->sw_portal = qbman_swp_init(&p_des); 741 if (dflt_dpio->sw_portal == NULL) { 742 printf("qbman_swp_init() failed\n"); 743 goto err_get_swp_init; 744 } 745 return 0; 746 747 err_get_swp_init: 748 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 749 err_get_enable: 750 free(dflt_dpio); 751 err_get_attr: 752 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 753 dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 754 err_create: 755 err_malloc: 756 return err; 757 } 758 759 static int dpio_exit(void) 760 { 761 int err; 762 763 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 764 if (err < 0) { 765 printf("dpio_disable() failed: %d\n", err); 766 goto err; 767 } 768 769 err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 770 if (err < 0) { 771 printf("dpio_destroy() failed: %d\n", err); 772 goto err; 773 } 774 775 #ifdef DEBUG 776 printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id); 777 #endif 778 779 if (dflt_dpio) 780 free(dflt_dpio); 781 782 return 0; 783 err: 784 return err; 785 } 786 787 static int dprc_init(void) 788 { 789 int err, child_portal_id, container_id; 790 struct dprc_cfg cfg; 791 uint64_t mc_portal_offset; 792 793 /* Open root container */ 794 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id); 795 if (err < 0) { 796 printf("dprc_get_container_id(): Root failed: %d\n", err); 797 goto err_root_container_id; 798 } 799 800 #ifdef DEBUG 801 printf("Root container id = %d\n", container_id); 802 #endif 803 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id, 804 &root_dprc_handle); 805 if (err < 0) { 806 printf("dprc_open(): Root Container failed: %d\n", err); 807 goto err_root_open; 808 } 809 810 if (!root_dprc_handle) { 811 printf("dprc_open(): Root Container Handle is not valid\n"); 812 goto err_root_open; 813 } 814 815 err = dprc_version_check(root_mc_io, root_dprc_handle); 816 if (err < 0) { 817 printf("dprc_version_check() failed: %d\n", err); 818 goto err_root_open; 819 } 820 821 memset(&cfg, 0, sizeof(struct dprc_cfg)); 822 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED | 823 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED | 824 DPRC_CFG_OPT_ALLOC_ALLOWED; 825 cfg.icid = DPRC_GET_ICID_FROM_POOL; 826 cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL; 827 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS, 828 root_dprc_handle, 829 &cfg, 830 &child_dprc_id, 831 &mc_portal_offset); 832 if (err < 0) { 833 printf("dprc_create_container() failed: %d\n", err); 834 goto err_create; 835 } 836 837 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 838 if (!dflt_mc_io) { 839 err = -ENOMEM; 840 printf(" No memory: malloc() failed\n"); 841 goto err_malloc; 842 } 843 844 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset); 845 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id); 846 #ifdef DEBUG 847 printf("MC portal of child DPRC container: %d, physical addr %p)\n", 848 child_dprc_id, dflt_mc_io->mmio_regs); 849 #endif 850 851 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id, 852 &dflt_dprc_handle); 853 if (err < 0) { 854 printf("dprc_open(): Child container failed: %d\n", err); 855 goto err_child_open; 856 } 857 858 if (!dflt_dprc_handle) { 859 printf("dprc_open(): Child container Handle is not valid\n"); 860 goto err_child_open; 861 } 862 863 return 0; 864 err_child_open: 865 free(dflt_mc_io); 866 err_malloc: 867 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 868 root_dprc_handle, child_dprc_id); 869 err_create: 870 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 871 err_root_open: 872 err_root_container_id: 873 return err; 874 } 875 876 static int dprc_exit(void) 877 { 878 int err; 879 880 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle); 881 if (err < 0) { 882 printf("dprc_close(): Child failed: %d\n", err); 883 goto err; 884 } 885 886 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 887 root_dprc_handle, child_dprc_id); 888 if (err < 0) { 889 printf("dprc_destroy_container() failed: %d\n", err); 890 goto err; 891 } 892 893 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 894 if (err < 0) { 895 printf("dprc_close(): Root failed: %d\n", err); 896 goto err; 897 } 898 899 if (dflt_mc_io) 900 free(dflt_mc_io); 901 902 if (root_mc_io) 903 free(root_mc_io); 904 905 return 0; 906 907 err: 908 return err; 909 } 910 911 static int dpbp_init(void) 912 { 913 int err; 914 struct dpbp_attr dpbp_attr; 915 struct dpbp_cfg dpbp_cfg; 916 917 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj)); 918 if (!dflt_dpbp) { 919 printf("No memory: malloc() failed\n"); 920 err = -ENOMEM; 921 goto err_malloc; 922 } 923 924 dpbp_cfg.options = 512; 925 926 err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg, 927 &dflt_dpbp->dpbp_handle); 928 929 if (err < 0) { 930 err = -ENODEV; 931 printf("dpbp_create() failed: %d\n", err); 932 goto err_create; 933 } 934 935 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr)); 936 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 937 dflt_dpbp->dpbp_handle, 938 &dpbp_attr); 939 if (err < 0) { 940 printf("dpbp_get_attributes() failed: %d\n", err); 941 goto err_get_attr; 942 } 943 944 if ((dpbp_attr.version.major != DPBP_VER_MAJOR) || 945 (dpbp_attr.version.minor != DPBP_VER_MINOR)) { 946 printf("DPBP version mismatch found %u.%u,", 947 dpbp_attr.version.major, dpbp_attr.version.minor); 948 printf("supported version is %u.%u\n", 949 DPBP_VER_MAJOR, DPBP_VER_MINOR); 950 } 951 952 dflt_dpbp->dpbp_attr.id = dpbp_attr.id; 953 #ifdef DEBUG 954 printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 955 #endif 956 957 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 958 if (err < 0) { 959 printf("dpbp_close() failed: %d\n", err); 960 goto err_close; 961 } 962 963 return 0; 964 965 err_close: 966 free(dflt_dpbp); 967 err_get_attr: 968 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 969 dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 970 err_create: 971 err_malloc: 972 return err; 973 } 974 975 static int dpbp_exit(void) 976 { 977 int err; 978 979 err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id, 980 &dflt_dpbp->dpbp_handle); 981 if (err < 0) { 982 printf("dpbp_open() failed: %d\n", err); 983 goto err; 984 } 985 986 err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 987 dflt_dpbp->dpbp_handle); 988 if (err < 0) { 989 printf("dpbp_destroy() failed: %d\n", err); 990 goto err; 991 } 992 993 #ifdef DEBUG 994 printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 995 #endif 996 997 if (dflt_dpbp) 998 free(dflt_dpbp); 999 return 0; 1000 1001 err: 1002 return err; 1003 } 1004 1005 static int dpni_init(void) 1006 { 1007 int err; 1008 struct dpni_attr dpni_attr; 1009 uint8_t ext_cfg_buf[256] = {0}; 1010 struct dpni_extended_cfg dpni_extended_cfg; 1011 struct dpni_cfg dpni_cfg; 1012 1013 dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj)); 1014 if (!dflt_dpni) { 1015 printf("No memory: malloc() failed\n"); 1016 err = -ENOMEM; 1017 goto err_malloc; 1018 } 1019 1020 memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg)); 1021 err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]); 1022 if (err < 0) { 1023 err = -ENODEV; 1024 printf("dpni_prepare_extended_cfg() failed: %d\n", err); 1025 goto err_prepare_extended_cfg; 1026 } 1027 1028 memset(&dpni_cfg, 0, sizeof(dpni_cfg)); 1029 dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER | 1030 DPNI_OPT_MULTICAST_FILTER; 1031 1032 dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0]; 1033 err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg, 1034 &dflt_dpni->dpni_handle); 1035 1036 if (err < 0) { 1037 err = -ENODEV; 1038 printf("dpni_create() failed: %d\n", err); 1039 goto err_create; 1040 } 1041 1042 memset(&dpni_attr, 0, sizeof(struct dpni_attr)); 1043 err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 1044 dflt_dpni->dpni_handle, 1045 &dpni_attr); 1046 if (err < 0) { 1047 printf("dpni_get_attributes() failed: %d\n", err); 1048 goto err_get_attr; 1049 } 1050 1051 if ((dpni_attr.version.major != DPNI_VER_MAJOR) || 1052 (dpni_attr.version.minor != DPNI_VER_MINOR)) { 1053 printf("DPNI version mismatch found %u.%u,", 1054 dpni_attr.version.major, dpni_attr.version.minor); 1055 printf("supported version is %u.%u\n", 1056 DPNI_VER_MAJOR, DPNI_VER_MINOR); 1057 } 1058 1059 dflt_dpni->dpni_id = dpni_attr.id; 1060 #ifdef DEBUG 1061 printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1062 #endif 1063 1064 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1065 if (err < 0) { 1066 printf("dpni_close() failed: %d\n", err); 1067 goto err_close; 1068 } 1069 1070 return 0; 1071 1072 err_close: 1073 err_get_attr: 1074 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1075 dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1076 err_create: 1077 err_prepare_extended_cfg: 1078 free(dflt_dpni); 1079 err_malloc: 1080 return err; 1081 } 1082 1083 static int dpni_exit(void) 1084 { 1085 int err; 1086 1087 err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id, 1088 &dflt_dpni->dpni_handle); 1089 if (err < 0) { 1090 printf("dpni_open() failed: %d\n", err); 1091 goto err; 1092 } 1093 1094 err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 1095 dflt_dpni->dpni_handle); 1096 if (err < 0) { 1097 printf("dpni_destroy() failed: %d\n", err); 1098 goto err; 1099 } 1100 1101 #ifdef DEBUG 1102 printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1103 #endif 1104 1105 if (dflt_dpni) 1106 free(dflt_dpni); 1107 return 0; 1108 1109 err: 1110 return err; 1111 } 1112 1113 static int mc_init_object(void) 1114 { 1115 int err = 0; 1116 1117 err = dprc_init(); 1118 if (err < 0) { 1119 printf("dprc_init() failed: %d\n", err); 1120 goto err; 1121 } 1122 1123 err = dpbp_init(); 1124 if (err < 0) { 1125 printf("dpbp_init() failed: %d\n", err); 1126 goto err; 1127 } 1128 1129 err = dpio_init(); 1130 if (err < 0) { 1131 printf("dpio_init() failed: %d\n", err); 1132 goto err; 1133 } 1134 1135 err = dpni_init(); 1136 if (err < 0) { 1137 printf("dpni_init() failed: %d\n", err); 1138 goto err; 1139 } 1140 1141 return 0; 1142 err: 1143 return err; 1144 } 1145 1146 int fsl_mc_ldpaa_exit(bd_t *bd) 1147 { 1148 int err = 0; 1149 1150 /* MC is not loaded intentionally, So return success. */ 1151 if (bd && get_mc_boot_status() != 0) 1152 return 0; 1153 1154 if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) { 1155 printf("ERROR: fsl-mc: DPL is not applied\n"); 1156 err = -ENODEV; 1157 return err; 1158 } 1159 1160 if (bd && !get_mc_boot_status() && !get_dpl_apply_status()) 1161 return err; 1162 1163 err = dpbp_exit(); 1164 if (err < 0) { 1165 printf("dpbp_exit() failed: %d\n", err); 1166 goto err; 1167 } 1168 1169 err = dpio_exit(); 1170 if (err < 0) { 1171 printf("dpio_exit() failed: %d\n", err); 1172 goto err; 1173 } 1174 1175 err = dpni_exit(); 1176 if (err < 0) { 1177 printf("dpni_exit() failed: %d\n", err); 1178 goto err; 1179 } 1180 1181 err = dprc_exit(); 1182 if (err < 0) { 1183 printf("dprc_exit() failed: %d\n", err); 1184 goto err; 1185 } 1186 1187 return 0; 1188 err: 1189 return err; 1190 } 1191 1192 static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1193 { 1194 int err = 0; 1195 if (argc < 3) 1196 goto usage; 1197 1198 switch (argv[1][0]) { 1199 case 's': { 1200 char sub_cmd; 1201 u64 mc_fw_addr, mc_dpc_addr; 1202 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1203 u64 aiop_fw_addr; 1204 #endif 1205 1206 sub_cmd = argv[2][0]; 1207 switch (sub_cmd) { 1208 case 'm': 1209 if (argc < 5) 1210 goto usage; 1211 1212 if (get_mc_boot_status() == 0) { 1213 printf("fsl-mc: MC is already booted"); 1214 printf("\n"); 1215 return err; 1216 } 1217 mc_fw_addr = simple_strtoull(argv[3], NULL, 16); 1218 mc_dpc_addr = simple_strtoull(argv[4], NULL, 1219 16); 1220 1221 if (!mc_init(mc_fw_addr, mc_dpc_addr)) 1222 err = mc_init_object(); 1223 break; 1224 1225 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1226 case 'a': 1227 if (argc < 4) 1228 goto usage; 1229 if (get_aiop_apply_status() == 0) { 1230 printf("fsl-mc: AIOP FW is already"); 1231 printf(" applied\n"); 1232 return err; 1233 } 1234 1235 aiop_fw_addr = simple_strtoull(argv[3], NULL, 1236 16); 1237 1238 err = load_mc_aiop_img(aiop_fw_addr); 1239 if (!err) 1240 printf("fsl-mc: AIOP FW applied\n"); 1241 break; 1242 #endif 1243 default: 1244 printf("Invalid option: %s\n", argv[2]); 1245 goto usage; 1246 1247 break; 1248 } 1249 } 1250 break; 1251 1252 case 'a': { 1253 u64 mc_dpl_addr; 1254 1255 if (argc < 4) 1256 goto usage; 1257 1258 if (get_dpl_apply_status() == 0) { 1259 printf("fsl-mc: DPL already applied\n"); 1260 return err; 1261 } 1262 1263 mc_dpl_addr = simple_strtoull(argv[3], NULL, 1264 16); 1265 1266 if (get_mc_boot_status() != 0) { 1267 printf("fsl-mc: Deploying data path layout .."); 1268 printf("ERROR (MC is not booted)\n"); 1269 return -ENODEV; 1270 } 1271 1272 if (!fsl_mc_ldpaa_exit(NULL)) 1273 err = mc_apply_dpl(mc_dpl_addr); 1274 break; 1275 } 1276 default: 1277 printf("Invalid option: %s\n", argv[1]); 1278 goto usage; 1279 break; 1280 } 1281 return err; 1282 usage: 1283 return CMD_RET_USAGE; 1284 } 1285 1286 U_BOOT_CMD( 1287 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc, 1288 "DPAA2 command to manage Management Complex (MC)", 1289 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n" 1290 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n" 1291 "fsl_mc start aiop [FW_addr] - Start AIOP\n" 1292 ); 1293