1 /* 2 * Copyright (C) 2014 Freescale Semiconductor 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <errno.h> 8 #include <linux/bug.h> 9 #include <asm/io.h> 10 #include <libfdt.h> 11 #include <fdt_support.h> 12 #include <fsl-mc/fsl_mc.h> 13 #include <fsl-mc/fsl_mc_sys.h> 14 #include <fsl-mc/fsl_mc_private.h> 15 #include <fsl-mc/fsl_dpmng.h> 16 #include <fsl-mc/fsl_dprc.h> 17 #include <fsl-mc/fsl_dpio.h> 18 #include <fsl-mc/fsl_dpni.h> 19 #include <fsl-mc/fsl_qbman_portal.h> 20 #include <fsl-mc/ldpaa_wriop.h> 21 22 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024) 23 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1)) 24 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024) 25 26 #define MC_MEM_SIZE_ENV_VAR "mcmemsize" 27 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" 28 29 DECLARE_GLOBAL_DATA_PTR; 30 static int mc_boot_status = -1; 31 static int mc_dpl_applied = -1; 32 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 33 static int mc_aiop_applied = -1; 34 #endif 35 struct fsl_mc_io *root_mc_io = NULL; 36 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */ 37 uint16_t root_dprc_handle = 0; 38 uint16_t dflt_dprc_handle = 0; 39 int child_dprc_id; 40 struct fsl_dpbp_obj *dflt_dpbp = NULL; 41 struct fsl_dpio_obj *dflt_dpio = NULL; 42 struct fsl_dpni_obj *dflt_dpni = NULL; 43 static u64 mc_lazy_dpl_addr; 44 45 #ifdef DEBUG 46 void dump_ram_words(const char *title, void *addr) 47 { 48 int i; 49 uint32_t *words = addr; 50 51 printf("Dumping beginning of %s (%p):\n", title, addr); 52 for (i = 0; i < 16; i++) 53 printf("%#x ", words[i]); 54 55 printf("\n"); 56 } 57 58 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs) 59 { 60 printf("MC CCSR registers:\n" 61 "reg_gcr1 %#x\n" 62 "reg_gsr %#x\n" 63 "reg_sicbalr %#x\n" 64 "reg_sicbahr %#x\n" 65 "reg_sicapr %#x\n" 66 "reg_mcfbalr %#x\n" 67 "reg_mcfbahr %#x\n" 68 "reg_mcfapr %#x\n" 69 "reg_psr %#x\n", 70 mc_ccsr_regs->reg_gcr1, 71 mc_ccsr_regs->reg_gsr, 72 mc_ccsr_regs->reg_sicbalr, 73 mc_ccsr_regs->reg_sicbahr, 74 mc_ccsr_regs->reg_sicapr, 75 mc_ccsr_regs->reg_mcfbalr, 76 mc_ccsr_regs->reg_mcfbahr, 77 mc_ccsr_regs->reg_mcfapr, 78 mc_ccsr_regs->reg_psr); 79 } 80 #else 81 82 #define dump_ram_words(title, addr) 83 #define dump_mc_ccsr_regs(mc_ccsr_regs) 84 85 #endif /* DEBUG */ 86 87 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 88 /** 89 * Copying MC firmware or DPL image to DDR 90 */ 91 static int mc_copy_image(const char *title, 92 u64 image_addr, u32 image_size, u64 mc_ram_addr) 93 { 94 debug("%s copied to address %p\n", title, (void *)mc_ram_addr); 95 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); 96 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size); 97 return 0; 98 } 99 100 /** 101 * MC firmware FIT image parser checks if the image is in FIT 102 * format, verifies integrity of the image and calculates 103 * raw image address and size values. 104 * Returns 0 on success and a negative errno on error. 105 * task fail. 106 **/ 107 int parse_mc_firmware_fit_image(u64 mc_fw_addr, 108 const void **raw_image_addr, 109 size_t *raw_image_size) 110 { 111 int format; 112 void *fit_hdr; 113 int node_offset; 114 const void *data; 115 size_t size; 116 const char *uname = "firmware"; 117 118 fit_hdr = (void *)mc_fw_addr; 119 120 /* Check if Image is in FIT format */ 121 format = genimg_get_format(fit_hdr); 122 123 if (format != IMAGE_FORMAT_FIT) { 124 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n"); 125 return -EINVAL; 126 } 127 128 if (!fit_check_format(fit_hdr)) { 129 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n"); 130 return -EINVAL; 131 } 132 133 node_offset = fit_image_get_node(fit_hdr, uname); 134 135 if (node_offset < 0) { 136 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n"); 137 return -ENOENT; 138 } 139 140 /* Verify MC firmware image */ 141 if (!(fit_image_verify(fit_hdr, node_offset))) { 142 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n"); 143 return -EINVAL; 144 } 145 146 /* Get address and size of raw image */ 147 fit_image_get_data(fit_hdr, node_offset, &data, &size); 148 149 *raw_image_addr = data; 150 *raw_image_size = size; 151 152 return 0; 153 } 154 #endif 155 156 /* 157 * Calculates the values to be used to specify the address range 158 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers. 159 * It returns the highest 512MB-aligned address within the given 160 * address range, in '*aligned_base_addr', and the number of 256 MiB 161 * blocks in it, in 'num_256mb_blocks'. 162 */ 163 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr, 164 size_t mc_ram_size, 165 u64 *aligned_base_addr, 166 u8 *num_256mb_blocks) 167 { 168 u64 addr; 169 u16 num_blocks; 170 171 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) { 172 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 173 mc_ram_size); 174 return -EINVAL; 175 } 176 177 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; 178 if (num_blocks < 1 || num_blocks > 0xff) { 179 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", 180 mc_ram_size); 181 return -EINVAL; 182 } 183 184 addr = (mc_private_ram_start_addr + mc_ram_size - 1) & 185 MC_RAM_BASE_ADDR_ALIGNMENT_MASK; 186 187 if (addr < mc_private_ram_start_addr) { 188 printf("fsl-mc: ERROR: bad start address %#llx\n", 189 mc_private_ram_start_addr); 190 return -EFAULT; 191 } 192 193 *aligned_base_addr = addr; 194 *num_256mb_blocks = num_blocks; 195 return 0; 196 } 197 198 static int mc_fixup_dpc(u64 dpc_addr) 199 { 200 void *blob = (void *)dpc_addr; 201 int nodeoffset; 202 203 /* delete any existing ICID pools */ 204 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools"); 205 if (fdt_del_node(blob, nodeoffset) < 0) 206 printf("\nfsl-mc: WARNING: could not delete ICID pool\n"); 207 208 /* add a new pool */ 209 nodeoffset = fdt_path_offset(blob, "/resources"); 210 if (nodeoffset < 0) { 211 printf("\nfsl-mc: ERROR: DPC is missing /resources\n"); 212 return -EINVAL; 213 } 214 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools"); 215 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0"); 216 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 217 "base_icid", FSL_DPAA2_STREAM_ID_START, 1); 218 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0", 219 "num", 220 FSL_DPAA2_STREAM_ID_END - 221 FSL_DPAA2_STREAM_ID_START + 1, 1); 222 223 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob)); 224 225 return 0; 226 } 227 228 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr) 229 { 230 u64 mc_dpc_offset; 231 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 232 int error; 233 void *dpc_fdt_hdr; 234 int dpc_size; 235 #endif 236 237 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 238 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 || 239 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff); 240 241 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET; 242 #else 243 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined" 244 #endif 245 246 /* 247 * Load the MC DPC blob in the MC private DRAM block: 248 */ 249 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 250 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset); 251 #else 252 /* 253 * Get address and size of the DPC blob stored in flash: 254 */ 255 dpc_fdt_hdr = (void *)mc_dpc_addr; 256 257 error = fdt_check_header(dpc_fdt_hdr); 258 if (error != 0) { 259 /* 260 * Don't return with error here, since the MC firmware can 261 * still boot without a DPC 262 */ 263 printf("\nfsl-mc: WARNING: No DPC image found"); 264 return 0; 265 } 266 267 dpc_size = fdt_totalsize(dpc_fdt_hdr); 268 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) { 269 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n", 270 dpc_size); 271 return -EINVAL; 272 } 273 274 mc_copy_image("MC DPC blob", 275 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset); 276 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */ 277 278 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset)) 279 return -EINVAL; 280 281 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset)); 282 return 0; 283 } 284 285 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr) 286 { 287 u64 mc_dpl_offset; 288 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR 289 int error; 290 void *dpl_fdt_hdr; 291 int dpl_size; 292 #endif 293 294 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 295 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 || 296 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff); 297 298 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET; 299 #else 300 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined" 301 #endif 302 303 /* 304 * Load the MC DPL blob in the MC private DRAM block: 305 */ 306 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR 307 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset); 308 #else 309 /* 310 * Get address and size of the DPL blob stored in flash: 311 */ 312 dpl_fdt_hdr = (void *)mc_dpl_addr; 313 314 error = fdt_check_header(dpl_fdt_hdr); 315 if (error != 0) { 316 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n"); 317 return error; 318 } 319 320 dpl_size = fdt_totalsize(dpl_fdt_hdr); 321 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) { 322 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n", 323 dpl_size); 324 return -EINVAL; 325 } 326 327 mc_copy_image("MC DPL blob", 328 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset); 329 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */ 330 331 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset)); 332 return 0; 333 } 334 335 /** 336 * Return the MC boot timeout value in milliseconds 337 */ 338 static unsigned long get_mc_boot_timeout_ms(void) 339 { 340 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 341 342 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR); 343 344 if (timeout_ms_env_var) { 345 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10); 346 if (timeout_ms == 0) { 347 printf("fsl-mc: WARNING: Invalid value for \'" 348 MC_BOOT_TIMEOUT_ENV_VAR 349 "\' environment variable: %lu\n", 350 timeout_ms); 351 352 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS; 353 } 354 } 355 356 return timeout_ms; 357 } 358 359 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 360 361 __weak bool soc_has_aiop(void) 362 { 363 return false; 364 } 365 366 static int load_mc_aiop_img(u64 aiop_fw_addr) 367 { 368 u64 mc_ram_addr = mc_get_dram_addr(); 369 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR 370 void *aiop_img; 371 #endif 372 373 /* Check if AIOP is available */ 374 if (!soc_has_aiop()) 375 return -ENODEV; 376 /* 377 * Load the MC AIOP image in the MC private DRAM block: 378 */ 379 380 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR 381 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr + 382 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 383 #else 384 aiop_img = (void *)aiop_fw_addr; 385 mc_copy_image("MC AIOP image", 386 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH, 387 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET); 388 #endif 389 mc_aiop_applied = 0; 390 391 return 0; 392 } 393 #endif 394 395 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr) 396 { 397 u32 reg_gsr; 398 u32 mc_fw_boot_status; 399 unsigned long timeout_ms = get_mc_boot_timeout_ms(); 400 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 401 402 dmb(); 403 assert(timeout_ms > 0); 404 for (;;) { 405 udelay(1000); /* throttle polling */ 406 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr); 407 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK); 408 if (mc_fw_boot_status & 0x1) 409 break; 410 411 timeout_ms--; 412 if (timeout_ms == 0) 413 break; 414 } 415 416 if (timeout_ms == 0) { 417 printf("ERROR: timeout\n"); 418 419 /* TODO: Get an error status from an MC CCSR register */ 420 return -ETIMEDOUT; 421 } 422 423 if (mc_fw_boot_status != 0x1) { 424 /* 425 * TODO: Identify critical errors from the GSR register's FS 426 * field and for those errors, set error to -ENODEV or other 427 * appropriate errno, so that the status property is set to 428 * failure in the fsl,dprc device tree node. 429 */ 430 printf("WARNING: Firmware returned an error (GSR: %#x)\n", 431 reg_gsr); 432 } else { 433 printf("SUCCESS\n"); 434 } 435 436 437 *final_reg_gsr = reg_gsr; 438 return 0; 439 } 440 441 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) 442 { 443 int error = 0; 444 int portal_id = 0; 445 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 446 u64 mc_ram_addr = mc_get_dram_addr(); 447 u32 reg_gsr; 448 u32 reg_mcfbalr; 449 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR 450 const void *raw_image_addr; 451 size_t raw_image_size = 0; 452 #endif 453 struct mc_version mc_ver_info; 454 u64 mc_ram_aligned_base_addr; 455 u8 mc_ram_num_256mb_blocks; 456 size_t mc_ram_size = mc_get_dram_block_size(); 457 458 459 error = calculate_mc_private_ram_params(mc_ram_addr, 460 mc_ram_size, 461 &mc_ram_aligned_base_addr, 462 &mc_ram_num_256mb_blocks); 463 if (error != 0) 464 goto out; 465 466 /* 467 * Management Complex cores should be held at reset out of POR. 468 * U-Boot should be the first software to touch MC. To be safe, 469 * we reset all cores again by setting GCR1 to 0. It doesn't do 470 * anything if they are held at reset. After we setup the firmware 471 * we kick off MC by deasserting the reset bit for core 0, and 472 * deasserting the reset bits for Command Portal Managers. 473 * The stop bits are not touched here. They are used to stop the 474 * cores when they are active. Setting stop bits doesn't stop the 475 * cores from fetching instructions when they are released from 476 * reset. 477 */ 478 out_le32(&mc_ccsr_regs->reg_gcr1, 0); 479 dmb(); 480 481 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR 482 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr); 483 #else 484 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr, 485 &raw_image_size); 486 if (error != 0) 487 goto out; 488 /* 489 * Load the MC FW at the beginning of the MC private DRAM block: 490 */ 491 mc_copy_image("MC Firmware", 492 (u64)raw_image_addr, raw_image_size, mc_ram_addr); 493 #endif 494 dump_ram_words("firmware", (void *)mc_ram_addr); 495 496 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr); 497 if (error != 0) 498 goto out; 499 500 debug("mc_ccsr_regs %p\n", mc_ccsr_regs); 501 dump_mc_ccsr_regs(mc_ccsr_regs); 502 503 /* 504 * Tell MC what is the address range of the DRAM block assigned to it: 505 */ 506 reg_mcfbalr = (u32)mc_ram_aligned_base_addr | 507 (mc_ram_num_256mb_blocks - 1); 508 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); 509 out_le32(&mc_ccsr_regs->reg_mcfbahr, 510 (u32)(mc_ram_aligned_base_addr >> 32)); 511 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ); 512 513 /* 514 * Tell the MC that we want delayed DPL deployment. 515 */ 516 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00); 517 518 printf("\nfsl-mc: Booting Management Complex ... "); 519 520 /* 521 * Deassert reset and release MC core 0 to run 522 */ 523 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST); 524 error = wait_for_mc(true, ®_gsr); 525 if (error != 0) 526 goto out; 527 528 /* 529 * TODO: need to obtain the portal_id for the root container from the 530 * DPL 531 */ 532 portal_id = 0; 533 534 /* 535 * Initialize the global default MC portal 536 * And check that the MC firmware is responding portal commands: 537 */ 538 root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 539 if (!root_mc_io) { 540 printf(" No memory: malloc() failed\n"); 541 return -ENOMEM; 542 } 543 544 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id); 545 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", 546 portal_id, root_mc_io->mmio_regs); 547 548 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info); 549 if (error != 0) { 550 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n", 551 error); 552 goto out; 553 } 554 555 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n", 556 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision, 557 reg_gsr & GSR_FS_MASK); 558 559 out: 560 if (error != 0) 561 mc_boot_status = error; 562 else 563 mc_boot_status = 0; 564 565 return error; 566 } 567 568 int mc_apply_dpl(u64 mc_dpl_addr) 569 { 570 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; 571 int error = 0; 572 u32 reg_gsr; 573 u64 mc_ram_addr = mc_get_dram_addr(); 574 size_t mc_ram_size = mc_get_dram_block_size(); 575 576 if (!mc_dpl_addr) 577 return -1; 578 579 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr); 580 if (error != 0) 581 return error; 582 583 /* 584 * Tell the MC to deploy the DPL: 585 */ 586 out_le32(&mc_ccsr_regs->reg_gsr, 0x0); 587 printf("fsl-mc: Deploying data path layout ... "); 588 error = wait_for_mc(false, ®_gsr); 589 590 if (!error) 591 mc_dpl_applied = 0; 592 593 return error; 594 } 595 596 int get_mc_boot_status(void) 597 { 598 return mc_boot_status; 599 } 600 601 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 602 int get_aiop_apply_status(void) 603 { 604 return mc_aiop_applied; 605 } 606 #endif 607 608 int get_dpl_apply_status(void) 609 { 610 return mc_dpl_applied; 611 } 612 613 /** 614 * Return the MC address of private DRAM block. 615 */ 616 u64 mc_get_dram_addr(void) 617 { 618 u64 mc_ram_addr; 619 620 /* 621 * The MC private DRAM block was already carved at the end of DRAM 622 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE: 623 */ 624 if (gd->bd->bi_dram[1].start) { 625 mc_ram_addr = 626 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; 627 } else { 628 mc_ram_addr = 629 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; 630 } 631 632 return mc_ram_addr; 633 } 634 635 /** 636 * Return the actual size of the MC private DRAM block. 637 */ 638 unsigned long mc_get_dram_block_size(void) 639 { 640 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 641 642 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR); 643 644 if (dram_block_size_env_var) { 645 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL, 646 10); 647 648 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) { 649 printf("fsl-mc: WARNING: Invalid value for \'" 650 MC_MEM_SIZE_ENV_VAR 651 "\' environment variable: %lu\n", 652 dram_block_size); 653 654 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; 655 } 656 } 657 658 return dram_block_size; 659 } 660 661 int fsl_mc_ldpaa_init(bd_t *bis) 662 { 663 int i; 664 665 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) 666 if ((wriop_is_enabled_dpmac(i) == 1) && 667 (wriop_get_phy_address(i) != -1)) 668 ldpaa_eth_init(i, wriop_get_enet_if(i)); 669 return 0; 670 } 671 672 static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle) 673 { 674 struct dprc_attributes attr; 675 int error; 676 677 memset(&attr, 0, sizeof(struct dprc_attributes)); 678 error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr); 679 if (error == 0) { 680 if ((attr.version.major != DPRC_VER_MAJOR) || 681 (attr.version.minor != DPRC_VER_MINOR)) { 682 printf("DPRC version mismatch found %u.%u,", 683 attr.version.major, 684 attr.version.minor); 685 printf("supported version is %u.%u\n", 686 DPRC_VER_MAJOR, DPRC_VER_MINOR); 687 } 688 } 689 return error; 690 } 691 692 static int dpio_init(void) 693 { 694 struct qbman_swp_desc p_des; 695 struct dpio_attr attr; 696 struct dpio_cfg dpio_cfg; 697 int err = 0; 698 699 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj)); 700 if (!dflt_dpio) { 701 printf("No memory: malloc() failed\n"); 702 err = -ENOMEM; 703 goto err_malloc; 704 } 705 706 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL; 707 dpio_cfg.num_priorities = 8; 708 709 err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg, 710 &dflt_dpio->dpio_handle); 711 if (err < 0) { 712 printf("dpio_create() failed: %d\n", err); 713 err = -ENODEV; 714 goto err_create; 715 } 716 717 memset(&attr, 0, sizeof(struct dpio_attr)); 718 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 719 dflt_dpio->dpio_handle, &attr); 720 if (err < 0) { 721 printf("dpio_get_attributes() failed: %d\n", err); 722 goto err_get_attr; 723 } 724 725 if ((attr.version.major != DPIO_VER_MAJOR) || 726 (attr.version.minor != DPIO_VER_MINOR)) { 727 printf("DPIO version mismatch found %u.%u,", 728 attr.version.major, attr.version.minor); 729 printf("supported version is %u.%u\n", 730 DPIO_VER_MAJOR, DPIO_VER_MINOR); 731 } 732 733 dflt_dpio->dpio_id = attr.id; 734 #ifdef DEBUG 735 printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id); 736 #endif 737 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 738 if (err < 0) { 739 printf("dpio_enable() failed %d\n", err); 740 goto err_get_enable; 741 } 742 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n", 743 attr.qbman_portal_ce_offset, 744 attr.qbman_portal_ci_offset, 745 attr.qbman_portal_id, 746 attr.num_priorities); 747 748 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 749 + attr.qbman_portal_ce_offset); 750 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR 751 + attr.qbman_portal_ci_offset); 752 753 dflt_dpio->sw_portal = qbman_swp_init(&p_des); 754 if (dflt_dpio->sw_portal == NULL) { 755 printf("qbman_swp_init() failed\n"); 756 goto err_get_swp_init; 757 } 758 return 0; 759 760 err_get_swp_init: 761 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 762 err_get_enable: 763 err_get_attr: 764 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 765 dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 766 err_create: 767 free(dflt_dpio); 768 err_malloc: 769 return err; 770 } 771 772 static int dpio_exit(void) 773 { 774 int err; 775 776 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 777 if (err < 0) { 778 printf("dpio_disable() failed: %d\n", err); 779 goto err; 780 } 781 782 err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle); 783 if (err < 0) { 784 printf("dpio_destroy() failed: %d\n", err); 785 goto err; 786 } 787 788 #ifdef DEBUG 789 printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id); 790 #endif 791 792 if (dflt_dpio) 793 free(dflt_dpio); 794 795 return 0; 796 err: 797 return err; 798 } 799 800 static int dprc_init(void) 801 { 802 int err, child_portal_id, container_id; 803 struct dprc_cfg cfg; 804 uint64_t mc_portal_offset; 805 806 /* Open root container */ 807 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id); 808 if (err < 0) { 809 printf("dprc_get_container_id(): Root failed: %d\n", err); 810 goto err_root_container_id; 811 } 812 813 #ifdef DEBUG 814 printf("Root container id = %d\n", container_id); 815 #endif 816 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id, 817 &root_dprc_handle); 818 if (err < 0) { 819 printf("dprc_open(): Root Container failed: %d\n", err); 820 goto err_root_open; 821 } 822 823 if (!root_dprc_handle) { 824 printf("dprc_open(): Root Container Handle is not valid\n"); 825 goto err_root_open; 826 } 827 828 err = dprc_version_check(root_mc_io, root_dprc_handle); 829 if (err < 0) { 830 printf("dprc_version_check() failed: %d\n", err); 831 goto err_root_open; 832 } 833 834 memset(&cfg, 0, sizeof(struct dprc_cfg)); 835 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED | 836 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED | 837 DPRC_CFG_OPT_ALLOC_ALLOWED; 838 cfg.icid = DPRC_GET_ICID_FROM_POOL; 839 cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL; 840 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS, 841 root_dprc_handle, 842 &cfg, 843 &child_dprc_id, 844 &mc_portal_offset); 845 if (err < 0) { 846 printf("dprc_create_container() failed: %d\n", err); 847 goto err_create; 848 } 849 850 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 851 if (!dflt_mc_io) { 852 err = -ENOMEM; 853 printf(" No memory: malloc() failed\n"); 854 goto err_malloc; 855 } 856 857 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset); 858 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id); 859 #ifdef DEBUG 860 printf("MC portal of child DPRC container: %d, physical addr %p)\n", 861 child_dprc_id, dflt_mc_io->mmio_regs); 862 #endif 863 864 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id, 865 &dflt_dprc_handle); 866 if (err < 0) { 867 printf("dprc_open(): Child container failed: %d\n", err); 868 goto err_child_open; 869 } 870 871 if (!dflt_dprc_handle) { 872 printf("dprc_open(): Child container Handle is not valid\n"); 873 goto err_child_open; 874 } 875 876 return 0; 877 err_child_open: 878 free(dflt_mc_io); 879 err_malloc: 880 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 881 root_dprc_handle, child_dprc_id); 882 err_create: 883 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 884 err_root_open: 885 err_root_container_id: 886 return err; 887 } 888 889 static int dprc_exit(void) 890 { 891 int err; 892 893 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle); 894 if (err < 0) { 895 printf("dprc_close(): Child failed: %d\n", err); 896 goto err; 897 } 898 899 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS, 900 root_dprc_handle, child_dprc_id); 901 if (err < 0) { 902 printf("dprc_destroy_container() failed: %d\n", err); 903 goto err; 904 } 905 906 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle); 907 if (err < 0) { 908 printf("dprc_close(): Root failed: %d\n", err); 909 goto err; 910 } 911 912 if (dflt_mc_io) 913 free(dflt_mc_io); 914 915 if (root_mc_io) 916 free(root_mc_io); 917 918 return 0; 919 920 err: 921 return err; 922 } 923 924 static int dpbp_init(void) 925 { 926 int err; 927 struct dpbp_attr dpbp_attr; 928 struct dpbp_cfg dpbp_cfg; 929 930 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj)); 931 if (!dflt_dpbp) { 932 printf("No memory: malloc() failed\n"); 933 err = -ENOMEM; 934 goto err_malloc; 935 } 936 937 dpbp_cfg.options = 512; 938 939 err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg, 940 &dflt_dpbp->dpbp_handle); 941 942 if (err < 0) { 943 err = -ENODEV; 944 printf("dpbp_create() failed: %d\n", err); 945 goto err_create; 946 } 947 948 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr)); 949 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 950 dflt_dpbp->dpbp_handle, 951 &dpbp_attr); 952 if (err < 0) { 953 printf("dpbp_get_attributes() failed: %d\n", err); 954 goto err_get_attr; 955 } 956 957 if ((dpbp_attr.version.major != DPBP_VER_MAJOR) || 958 (dpbp_attr.version.minor != DPBP_VER_MINOR)) { 959 printf("DPBP version mismatch found %u.%u,", 960 dpbp_attr.version.major, dpbp_attr.version.minor); 961 printf("supported version is %u.%u\n", 962 DPBP_VER_MAJOR, DPBP_VER_MINOR); 963 } 964 965 dflt_dpbp->dpbp_attr.id = dpbp_attr.id; 966 #ifdef DEBUG 967 printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 968 #endif 969 970 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 971 if (err < 0) { 972 printf("dpbp_close() failed: %d\n", err); 973 goto err_close; 974 } 975 976 return 0; 977 978 err_close: 979 free(dflt_dpbp); 980 err_get_attr: 981 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 982 dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); 983 err_create: 984 err_malloc: 985 return err; 986 } 987 988 static int dpbp_exit(void) 989 { 990 int err; 991 992 err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id, 993 &dflt_dpbp->dpbp_handle); 994 if (err < 0) { 995 printf("dpbp_open() failed: %d\n", err); 996 goto err; 997 } 998 999 err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 1000 dflt_dpbp->dpbp_handle); 1001 if (err < 0) { 1002 printf("dpbp_destroy() failed: %d\n", err); 1003 goto err; 1004 } 1005 1006 #ifdef DEBUG 1007 printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id); 1008 #endif 1009 1010 if (dflt_dpbp) 1011 free(dflt_dpbp); 1012 return 0; 1013 1014 err: 1015 return err; 1016 } 1017 1018 static int dpni_init(void) 1019 { 1020 int err; 1021 struct dpni_attr dpni_attr; 1022 uint8_t ext_cfg_buf[256] = {0}; 1023 struct dpni_extended_cfg dpni_extended_cfg; 1024 struct dpni_cfg dpni_cfg; 1025 1026 dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj)); 1027 if (!dflt_dpni) { 1028 printf("No memory: malloc() failed\n"); 1029 err = -ENOMEM; 1030 goto err_malloc; 1031 } 1032 1033 memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg)); 1034 err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]); 1035 if (err < 0) { 1036 err = -ENODEV; 1037 printf("dpni_prepare_extended_cfg() failed: %d\n", err); 1038 goto err_prepare_extended_cfg; 1039 } 1040 1041 memset(&dpni_cfg, 0, sizeof(dpni_cfg)); 1042 dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER | 1043 DPNI_OPT_MULTICAST_FILTER; 1044 1045 dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0]; 1046 err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg, 1047 &dflt_dpni->dpni_handle); 1048 1049 if (err < 0) { 1050 err = -ENODEV; 1051 printf("dpni_create() failed: %d\n", err); 1052 goto err_create; 1053 } 1054 1055 memset(&dpni_attr, 0, sizeof(struct dpni_attr)); 1056 err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, 1057 dflt_dpni->dpni_handle, 1058 &dpni_attr); 1059 if (err < 0) { 1060 printf("dpni_get_attributes() failed: %d\n", err); 1061 goto err_get_attr; 1062 } 1063 1064 if ((dpni_attr.version.major != DPNI_VER_MAJOR) || 1065 (dpni_attr.version.minor != DPNI_VER_MINOR)) { 1066 printf("DPNI version mismatch found %u.%u,", 1067 dpni_attr.version.major, dpni_attr.version.minor); 1068 printf("supported version is %u.%u\n", 1069 DPNI_VER_MAJOR, DPNI_VER_MINOR); 1070 } 1071 1072 dflt_dpni->dpni_id = dpni_attr.id; 1073 #ifdef DEBUG 1074 printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1075 #endif 1076 1077 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1078 if (err < 0) { 1079 printf("dpni_close() failed: %d\n", err); 1080 goto err_close; 1081 } 1082 1083 return 0; 1084 1085 err_close: 1086 err_get_attr: 1087 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1088 dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); 1089 err_create: 1090 err_prepare_extended_cfg: 1091 free(dflt_dpni); 1092 err_malloc: 1093 return err; 1094 } 1095 1096 static int dpni_exit(void) 1097 { 1098 int err; 1099 1100 err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id, 1101 &dflt_dpni->dpni_handle); 1102 if (err < 0) { 1103 printf("dpni_open() failed: %d\n", err); 1104 goto err; 1105 } 1106 1107 err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, 1108 dflt_dpni->dpni_handle); 1109 if (err < 0) { 1110 printf("dpni_destroy() failed: %d\n", err); 1111 goto err; 1112 } 1113 1114 #ifdef DEBUG 1115 printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id); 1116 #endif 1117 1118 if (dflt_dpni) 1119 free(dflt_dpni); 1120 return 0; 1121 1122 err: 1123 return err; 1124 } 1125 1126 static int mc_init_object(void) 1127 { 1128 int err = 0; 1129 1130 err = dprc_init(); 1131 if (err < 0) { 1132 printf("dprc_init() failed: %d\n", err); 1133 goto err; 1134 } 1135 1136 err = dpbp_init(); 1137 if (err < 0) { 1138 printf("dpbp_init() failed: %d\n", err); 1139 goto err; 1140 } 1141 1142 err = dpio_init(); 1143 if (err < 0) { 1144 printf("dpio_init() failed: %d\n", err); 1145 goto err; 1146 } 1147 1148 err = dpni_init(); 1149 if (err < 0) { 1150 printf("dpni_init() failed: %d\n", err); 1151 goto err; 1152 } 1153 1154 return 0; 1155 err: 1156 return err; 1157 } 1158 1159 int fsl_mc_ldpaa_exit(bd_t *bd) 1160 { 1161 int err = 0; 1162 1163 if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) { 1164 mc_apply_dpl(mc_lazy_dpl_addr); 1165 mc_lazy_dpl_addr = 0; 1166 } 1167 1168 /* MC is not loaded intentionally, So return success. */ 1169 if (bd && get_mc_boot_status() != 0) 1170 return 0; 1171 1172 if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) { 1173 printf("ERROR: fsl-mc: DPL is not applied\n"); 1174 err = -ENODEV; 1175 return err; 1176 } 1177 1178 if (bd && !get_mc_boot_status() && !get_dpl_apply_status()) 1179 return err; 1180 1181 err = dpbp_exit(); 1182 if (err < 0) { 1183 printf("dpbp_exit() failed: %d\n", err); 1184 goto err; 1185 } 1186 1187 err = dpio_exit(); 1188 if (err < 0) { 1189 printf("dpio_exit() failed: %d\n", err); 1190 goto err; 1191 } 1192 1193 err = dpni_exit(); 1194 if (err < 0) { 1195 printf("dpni_exit() failed: %d\n", err); 1196 goto err; 1197 } 1198 1199 err = dprc_exit(); 1200 if (err < 0) { 1201 printf("dprc_exit() failed: %d\n", err); 1202 goto err; 1203 } 1204 1205 return 0; 1206 err: 1207 return err; 1208 } 1209 1210 static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1211 { 1212 int err = 0; 1213 if (argc < 3) 1214 goto usage; 1215 1216 switch (argv[1][0]) { 1217 case 's': { 1218 char sub_cmd; 1219 u64 mc_fw_addr, mc_dpc_addr; 1220 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1221 u64 aiop_fw_addr; 1222 #endif 1223 1224 sub_cmd = argv[2][0]; 1225 switch (sub_cmd) { 1226 case 'm': 1227 if (argc < 5) 1228 goto usage; 1229 1230 if (get_mc_boot_status() == 0) { 1231 printf("fsl-mc: MC is already booted"); 1232 printf("\n"); 1233 return err; 1234 } 1235 mc_fw_addr = simple_strtoull(argv[3], NULL, 16); 1236 mc_dpc_addr = simple_strtoull(argv[4], NULL, 1237 16); 1238 1239 if (!mc_init(mc_fw_addr, mc_dpc_addr)) 1240 err = mc_init_object(); 1241 break; 1242 1243 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 1244 case 'a': 1245 if (argc < 4) 1246 goto usage; 1247 if (get_aiop_apply_status() == 0) { 1248 printf("fsl-mc: AIOP FW is already"); 1249 printf(" applied\n"); 1250 return err; 1251 } 1252 1253 aiop_fw_addr = simple_strtoull(argv[3], NULL, 1254 16); 1255 1256 /* if SoC doesn't have AIOP, err = -ENODEV */ 1257 err = load_mc_aiop_img(aiop_fw_addr); 1258 if (!err) 1259 printf("fsl-mc: AIOP FW applied\n"); 1260 break; 1261 #endif 1262 default: 1263 printf("Invalid option: %s\n", argv[2]); 1264 goto usage; 1265 1266 break; 1267 } 1268 } 1269 break; 1270 1271 case 'l': 1272 case 'a': { 1273 u64 mc_dpl_addr; 1274 1275 if (argc < 4) 1276 goto usage; 1277 1278 if (get_dpl_apply_status() == 0) { 1279 printf("fsl-mc: DPL already applied\n"); 1280 return err; 1281 } 1282 1283 mc_dpl_addr = simple_strtoull(argv[3], NULL, 1284 16); 1285 1286 if (get_mc_boot_status() != 0) { 1287 printf("fsl-mc: Deploying data path layout .."); 1288 printf("ERROR (MC is not booted)\n"); 1289 return -ENODEV; 1290 } 1291 1292 if (argv[1][0] == 'l') { 1293 /* 1294 * We will do the actual dpaa exit and dpl apply 1295 * later from announce_and_cleanup(). 1296 */ 1297 mc_lazy_dpl_addr = mc_dpl_addr; 1298 } else { 1299 /* The user wants it applied now */ 1300 if (!fsl_mc_ldpaa_exit(NULL)) 1301 err = mc_apply_dpl(mc_dpl_addr); 1302 } 1303 break; 1304 } 1305 default: 1306 printf("Invalid option: %s\n", argv[1]); 1307 goto usage; 1308 break; 1309 } 1310 return err; 1311 usage: 1312 return CMD_RET_USAGE; 1313 } 1314 1315 U_BOOT_CMD( 1316 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc, 1317 "DPAA2 command to manage Management Complex (MC)", 1318 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n" 1319 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n" 1320 "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n" 1321 "fsl_mc start aiop [FW_addr] - Start AIOP\n" 1322 ); 1323