1 /* 2 * Copyright (C) 2014 Freescale Semiconductor 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include "qbman_portal.h" 8 9 /* QBMan portal management command codes */ 10 #define QBMAN_MC_ACQUIRE 0x30 11 #define QBMAN_WQCHAN_CONFIGURE 0x46 12 13 /* CINH register offsets */ 14 #define QBMAN_CINH_SWP_EQAR 0x8c0 15 #define QBMAN_CINH_SWP_DCAP 0xac0 16 #define QBMAN_CINH_SWP_SDQCR 0xb00 17 #define QBMAN_CINH_SWP_RAR 0xcc0 18 19 /* CENA register offsets */ 20 #define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6)) 21 #define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6)) 22 #define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6)) 23 #define QBMAN_CENA_SWP_CR 0x600 24 #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1)) 25 #define QBMAN_CENA_SWP_VDQCR 0x780 26 27 /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */ 28 #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0xff) >> 6) 29 30 /*******************************/ 31 /* Pre-defined attribute codes */ 32 /*******************************/ 33 34 struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7); 35 struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8); 36 37 /*************************/ 38 /* SDQCR attribute codes */ 39 /*************************/ 40 41 /* we put these here because at least some of them are required by 42 * qbman_swp_init() */ 43 struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2); 44 struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1); 45 struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8); 46 #define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1) 47 enum qbman_sdqcr_dct { 48 qbman_sdqcr_dct_null = 0, 49 qbman_sdqcr_dct_prio_ics, 50 qbman_sdqcr_dct_active_ics, 51 qbman_sdqcr_dct_active 52 }; 53 enum qbman_sdqcr_fc { 54 qbman_sdqcr_fc_one = 0, 55 qbman_sdqcr_fc_up_to_3 = 1 56 }; 57 58 /*********************************/ 59 /* Portal constructor/destructor */ 60 /*********************************/ 61 62 /* Software portals should always be in the power-on state when we initialise, 63 * due to the CCSR-based portal reset functionality that MC has. */ 64 struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d) 65 { 66 int ret; 67 struct qbman_swp *p = malloc(sizeof(struct qbman_swp)); 68 69 if (!p) 70 return NULL; 71 p->desc = d; 72 #ifdef QBMAN_CHECKING 73 p->mc.check = swp_mc_can_start; 74 #endif 75 p->mc.valid_bit = QB_VALID_BIT; 76 p->sdq = 0; 77 qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics); 78 qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3); 79 qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb); 80 atomic_set(&p->vdq.busy, 1); 81 p->vdq.valid_bit = QB_VALID_BIT; 82 p->dqrr.next_idx = 0; 83 p->dqrr.valid_bit = QB_VALID_BIT; 84 ret = qbman_swp_sys_init(&p->sys, d); 85 if (ret) { 86 free(p); 87 printf("qbman_swp_sys_init() failed %d\n", ret); 88 return NULL; 89 } 90 qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq); 91 return p; 92 } 93 94 /***********************/ 95 /* Management commands */ 96 /***********************/ 97 98 /* 99 * Internal code common to all types of management commands. 100 */ 101 102 void *qbman_swp_mc_start(struct qbman_swp *p) 103 { 104 void *ret; 105 #ifdef QBMAN_CHECKING 106 BUG_ON(p->mc.check != swp_mc_can_start); 107 #endif 108 ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR); 109 #ifdef QBMAN_CHECKING 110 if (!ret) 111 p->mc.check = swp_mc_can_submit; 112 #endif 113 return ret; 114 } 115 116 void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb) 117 { 118 uint32_t *v = cmd; 119 #ifdef QBMAN_CHECKING 120 BUG_ON(!p->mc.check != swp_mc_can_submit); 121 #endif 122 lwsync(); 123 /* TBD: "|=" is going to hurt performance. Need to move as many fields 124 * out of word zero, and for those that remain, the "OR" needs to occur 125 * at the caller side. This debug check helps to catch cases where the 126 * caller wants to OR but has forgotten to do so. */ 127 BUG_ON((*v & cmd_verb) != *v); 128 *v = cmd_verb | p->mc.valid_bit; 129 qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd); 130 /* TODO: add prefetch support for GPP */ 131 #ifdef QBMAN_CHECKING 132 p->mc.check = swp_mc_can_poll; 133 #endif 134 } 135 136 void *qbman_swp_mc_result(struct qbman_swp *p) 137 { 138 uint32_t *ret, verb; 139 #ifdef QBMAN_CHECKING 140 BUG_ON(p->mc.check != swp_mc_can_poll); 141 #endif 142 ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit)); 143 /* Remove the valid-bit - command completed iff the rest is non-zero */ 144 verb = ret[0] & ~QB_VALID_BIT; 145 if (!verb) 146 return NULL; 147 #ifdef QBMAN_CHECKING 148 p->mc.check = swp_mc_can_start; 149 #endif 150 p->mc.valid_bit ^= QB_VALID_BIT; 151 return ret; 152 } 153 154 /***********/ 155 /* Enqueue */ 156 /***********/ 157 158 /* These should be const, eventually */ 159 static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2); 160 static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1); 161 static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24); 162 /* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */ 163 static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1); 164 static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16); 165 static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4); 166 static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1); 167 static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32); 168 169 enum qbman_eq_cmd_e { 170 /* No enqueue, primarily for plugging ORP gaps for dropped frames */ 171 qbman_eq_cmd_empty, 172 /* DMA an enqueue response once complete */ 173 qbman_eq_cmd_respond, 174 /* DMA an enqueue response only if the enqueue fails */ 175 qbman_eq_cmd_respond_reject 176 }; 177 178 void qbman_eq_desc_clear(struct qbman_eq_desc *d) 179 { 180 memset(d, 0, sizeof(*d)); 181 } 182 183 void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success) 184 { 185 uint32_t *cl = qb_cl(d); 186 187 qb_attr_code_encode(&code_eq_orp_en, cl, 0); 188 qb_attr_code_encode(&code_eq_cmd, cl, 189 respond_success ? qbman_eq_cmd_respond : 190 qbman_eq_cmd_respond_reject); 191 } 192 193 void qbman_eq_desc_set_response(struct qbman_eq_desc *d, 194 dma_addr_t storage_phys, 195 int stash) 196 { 197 uint32_t *cl = qb_cl(d); 198 199 qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys); 200 qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash); 201 } 202 203 204 void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid, 205 uint32_t qd_bin, uint32_t qd_prio) 206 { 207 uint32_t *cl = qb_cl(d); 208 209 qb_attr_code_encode(&code_eq_qd_en, cl, 1); 210 qb_attr_code_encode(&code_eq_tgt_id, cl, qdid); 211 qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin); 212 qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio); 213 } 214 215 #define EQAR_IDX(eqar) ((eqar) & 0x7) 216 #define EQAR_VB(eqar) ((eqar) & 0x80) 217 #define EQAR_SUCCESS(eqar) ((eqar) & 0x100) 218 219 int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d, 220 const struct qbman_fd *fd) 221 { 222 uint32_t *p; 223 const uint32_t *cl = qb_cl(d); 224 uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR); 225 debug("EQAR=%08x\n", eqar); 226 if (!EQAR_SUCCESS(eqar)) 227 return -EBUSY; 228 p = qbman_cena_write_start(&s->sys, 229 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar))); 230 word_copy(&p[1], &cl[1], 7); 231 word_copy(&p[8], fd, sizeof(*fd) >> 2); 232 lwsync(); 233 /* Set the verb byte, have to substitute in the valid-bit */ 234 p[0] = cl[0] | EQAR_VB(eqar); 235 qbman_cena_write_complete(&s->sys, 236 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)), 237 p); 238 return 0; 239 } 240 241 /***************************/ 242 /* Volatile (pull) dequeue */ 243 /***************************/ 244 245 /* These should be const, eventually */ 246 static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2); 247 static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2); 248 static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1); 249 static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1); 250 static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4); 251 static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8); 252 static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24); 253 static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32); 254 255 enum qb_pull_dt_e { 256 qb_pull_dt_channel, 257 qb_pull_dt_workqueue, 258 qb_pull_dt_framequeue 259 }; 260 261 void qbman_pull_desc_clear(struct qbman_pull_desc *d) 262 { 263 memset(d, 0, sizeof(*d)); 264 } 265 266 void qbman_pull_desc_set_storage(struct qbman_pull_desc *d, 267 struct ldpaa_dq *storage, 268 dma_addr_t storage_phys, 269 int stash) 270 { 271 uint32_t *cl = qb_cl(d); 272 273 /* Squiggle the pointer 'storage' into the extra 2 words of the 274 * descriptor (which aren't copied to the hw command) */ 275 *(void **)&cl[4] = storage; 276 if (!storage) { 277 qb_attr_code_encode(&code_pull_rls, cl, 0); 278 return; 279 } 280 qb_attr_code_encode(&code_pull_rls, cl, 1); 281 qb_attr_code_encode(&code_pull_stash, cl, !!stash); 282 qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys); 283 } 284 285 void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes) 286 { 287 uint32_t *cl = qb_cl(d); 288 289 BUG_ON(!numframes || (numframes > 16)); 290 qb_attr_code_encode(&code_pull_numframes, cl, 291 (uint32_t)(numframes - 1)); 292 } 293 294 void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token) 295 { 296 uint32_t *cl = qb_cl(d); 297 298 qb_attr_code_encode(&code_pull_token, cl, token); 299 } 300 301 void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid) 302 { 303 uint32_t *cl = qb_cl(d); 304 305 qb_attr_code_encode(&code_pull_dct, cl, 1); 306 qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue); 307 qb_attr_code_encode(&code_pull_dqsource, cl, fqid); 308 } 309 310 int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d) 311 { 312 uint32_t *p; 313 uint32_t *cl = qb_cl(d); 314 315 if (!atomic_dec_and_test(&s->vdq.busy)) { 316 atomic_inc(&s->vdq.busy); 317 return -EBUSY; 318 } 319 s->vdq.storage = *(void **)&cl[4]; 320 s->vdq.token = qb_attr_code_decode(&code_pull_token, cl); 321 p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR); 322 word_copy(&p[1], &cl[1], 3); 323 lwsync(); 324 /* Set the verb byte, have to substitute in the valid-bit */ 325 p[0] = cl[0] | s->vdq.valid_bit; 326 s->vdq.valid_bit ^= QB_VALID_BIT; 327 qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p); 328 return 0; 329 } 330 331 /****************/ 332 /* Polling DQRR */ 333 /****************/ 334 335 static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8); 336 static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7); 337 static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8); 338 339 #define QBMAN_DQRR_RESPONSE_DQ 0x60 340 #define QBMAN_DQRR_RESPONSE_FQRN 0x21 341 #define QBMAN_DQRR_RESPONSE_FQRNI 0x22 342 #define QBMAN_DQRR_RESPONSE_FQPN 0x24 343 #define QBMAN_DQRR_RESPONSE_FQDAN 0x25 344 #define QBMAN_DQRR_RESPONSE_CDAN 0x26 345 #define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27 346 #define QBMAN_DQRR_RESPONSE_CGCU 0x28 347 #define QBMAN_DQRR_RESPONSE_BPSCN 0x29 348 #define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a 349 350 351 /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry 352 * only once, so repeated calls can return a sequence of DQRR entries, without 353 * requiring they be consumed immediately or in any particular order. */ 354 const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s) 355 { 356 uint32_t verb; 357 uint32_t response_verb; 358 uint32_t flags; 359 const struct ldpaa_dq *dq; 360 const uint32_t *p; 361 362 dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); 363 p = qb_cl(dq); 364 verb = qb_attr_code_decode(&code_dqrr_verb, p); 365 366 /* If the valid-bit isn't of the expected polarity, nothing there. Note, 367 * in the DQRR reset bug workaround, we shouldn't need to skip these 368 * check, because we've already determined that a new entry is available 369 * and we've invalidated the cacheline before reading it, so the 370 * valid-bit behaviour is repaired and should tell us what we already 371 * knew from reading PI. 372 */ 373 if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) { 374 qbman_cena_invalidate_prefetch(&s->sys, 375 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); 376 return NULL; 377 } 378 /* There's something there. Move "next_idx" attention to the next ring 379 * entry (and prefetch it) before returning what we found. */ 380 s->dqrr.next_idx++; 381 s->dqrr.next_idx &= QBMAN_DQRR_SIZE - 1; /* Wrap around at 4 */ 382 /* TODO: it's possible to do all this without conditionals, optimise it 383 * later. */ 384 if (!s->dqrr.next_idx) 385 s->dqrr.valid_bit ^= QB_VALID_BIT; 386 387 /* If this is the final response to a volatile dequeue command 388 indicate that the vdq is no longer busy */ 389 flags = ldpaa_dq_flags(dq); 390 response_verb = qb_attr_code_decode(&code_dqrr_response, &verb); 391 if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) && 392 (flags & LDPAA_DQ_STAT_VOLATILE) && 393 (flags & LDPAA_DQ_STAT_EXPIRED)) 394 atomic_inc(&s->vdq.busy); 395 396 qbman_cena_invalidate_prefetch(&s->sys, 397 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); 398 return dq; 399 } 400 401 /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */ 402 void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq) 403 { 404 qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq)); 405 } 406 407 /*********************************/ 408 /* Polling user-provided storage */ 409 /*********************************/ 410 411 void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq, 412 unsigned int num_entries, 413 uint8_t oldtoken) 414 { 415 memset(dq, oldtoken, num_entries * sizeof(*dq)); 416 } 417 418 int qbman_dq_entry_has_newtoken(struct qbman_swp *s, 419 const struct ldpaa_dq *dq, 420 uint8_t newtoken) 421 { 422 /* To avoid converting the little-endian DQ entry to host-endian prior 423 * to us knowing whether there is a valid entry or not (and run the 424 * risk of corrupting the incoming hardware LE write), we detect in 425 * hardware endianness rather than host. This means we need a different 426 * "code" depending on whether we are BE or LE in software, which is 427 * where DQRR_TOK_OFFSET comes in... */ 428 static struct qb_attr_code code_dqrr_tok_detect = 429 QB_CODE(0, DQRR_TOK_OFFSET, 8); 430 /* The user trying to poll for a result treats "dq" as const. It is 431 * however the same address that was provided to us non-const in the 432 * first place, for directing hardware DMA to. So we can cast away the 433 * const because it is mutable from our perspective. */ 434 uint32_t *p = qb_cl((struct ldpaa_dq *)dq); 435 uint32_t token; 436 437 token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]); 438 if (token != newtoken) 439 return 0; 440 441 /* Only now do we convert from hardware to host endianness. Also, as we 442 * are returning success, the user has promised not to call us again, so 443 * there's no risk of us converting the endianness twice... */ 444 make_le32_n(p, 16); 445 446 /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the 447 * fact "VDQCR" shows busy doesn't mean that the result we're looking at 448 * is from the same command. Eg. we may be looking at our 10th dequeue 449 * result from our first VDQCR command, yet the second dequeue command 450 * could have been kicked off already, after seeing the 1st result. Ie. 451 * the result we're looking at is not necessarily proof that we can 452 * reset "busy". We instead base the decision on whether the current 453 * result is sitting at the first 'storage' location of the busy 454 * command. */ 455 if (s->vdq.storage == dq) { 456 s->vdq.storage = NULL; 457 atomic_inc(&s->vdq.busy); 458 } 459 return 1; 460 } 461 462 /********************************/ 463 /* Categorising dequeue entries */ 464 /********************************/ 465 466 static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x) 467 { 468 const uint32_t *p = qb_cl(dq); 469 uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p); 470 471 return response_verb == x; 472 } 473 474 int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq) 475 { 476 return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ); 477 } 478 479 /*********************************/ 480 /* Parsing frame dequeue results */ 481 /*********************************/ 482 483 /* These APIs assume qbman_dq_entry_is_DQ() is TRUE */ 484 485 uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq) 486 { 487 const uint32_t *p = qb_cl(dq); 488 489 return qb_attr_code_decode(&code_dqrr_stat, p); 490 } 491 492 const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq) 493 { 494 const uint32_t *p = qb_cl(dq); 495 496 return (const struct dpaa_fd *)&p[8]; 497 } 498 499 /******************/ 500 /* Buffer release */ 501 /******************/ 502 503 /* These should be const, eventually */ 504 /* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */ 505 static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1); 506 static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16); 507 508 void qbman_release_desc_clear(struct qbman_release_desc *d) 509 { 510 uint32_t *cl; 511 512 memset(d, 0, sizeof(*d)); 513 cl = qb_cl(d); 514 qb_attr_code_encode(&code_release_set_me, cl, 1); 515 } 516 517 void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid) 518 { 519 uint32_t *cl = qb_cl(d); 520 521 qb_attr_code_encode(&code_release_bpid, cl, bpid); 522 } 523 524 #define RAR_IDX(rar) ((rar) & 0x7) 525 #define RAR_VB(rar) ((rar) & 0x80) 526 #define RAR_SUCCESS(rar) ((rar) & 0x100) 527 528 int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d, 529 const uint64_t *buffers, unsigned int num_buffers) 530 { 531 uint32_t *p; 532 const uint32_t *cl = qb_cl(d); 533 uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR); 534 debug("RAR=%08x\n", rar); 535 if (!RAR_SUCCESS(rar)) 536 return -EBUSY; 537 BUG_ON(!num_buffers || (num_buffers > 7)); 538 /* Start the release command */ 539 p = qbman_cena_write_start(&s->sys, 540 QBMAN_CENA_SWP_RCR(RAR_IDX(rar))); 541 /* Copy the caller's buffer pointers to the command */ 542 u64_to_le32_copy(&p[2], buffers, num_buffers); 543 lwsync(); 544 /* Set the verb byte, have to substitute in the valid-bit and the number 545 * of buffers. */ 546 p[0] = cl[0] | RAR_VB(rar) | num_buffers; 547 qbman_cena_write_complete(&s->sys, 548 QBMAN_CENA_SWP_RCR(RAR_IDX(rar)), 549 p); 550 return 0; 551 } 552 553 /*******************/ 554 /* Buffer acquires */ 555 /*******************/ 556 557 /* These should be const, eventually */ 558 static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16); 559 static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3); 560 static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3); 561 562 int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers, 563 unsigned int num_buffers) 564 { 565 uint32_t *p; 566 uint32_t verb, rslt, num; 567 568 BUG_ON(!num_buffers || (num_buffers > 7)); 569 570 /* Start the management command */ 571 p = qbman_swp_mc_start(s); 572 573 if (!p) 574 return -EBUSY; 575 576 /* Encode the caller-provided attributes */ 577 qb_attr_code_encode(&code_acquire_bpid, p, bpid); 578 qb_attr_code_encode(&code_acquire_num, p, num_buffers); 579 580 /* Complete the management command */ 581 p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE); 582 583 /* Decode the outcome */ 584 verb = qb_attr_code_decode(&code_generic_verb, p); 585 rslt = qb_attr_code_decode(&code_generic_rslt, p); 586 num = qb_attr_code_decode(&code_acquire_r_num, p); 587 BUG_ON(verb != QBMAN_MC_ACQUIRE); 588 589 /* Determine success or failure */ 590 if (unlikely(rslt != QBMAN_MC_RSLT_OK)) { 591 printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n", 592 bpid, rslt); 593 return -EIO; 594 } 595 BUG_ON(num > num_buffers); 596 /* Copy the acquired buffers to the caller's array */ 597 u64_from_le32_copy(buffers, &p[2], num); 598 return (int)num; 599 } 600