1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2014 Freescale Semiconductor
4  */
5 
6 #include <asm/arch/clock.h>
7 #include "qbman_portal.h"
8 
9 /* QBMan portal management command codes */
10 #define QBMAN_MC_ACQUIRE       0x30
11 #define QBMAN_WQCHAN_CONFIGURE 0x46
12 
13 /* CINH register offsets */
14 #define QBMAN_CINH_SWP_EQAR    0x8c0
15 #define QBMAN_CINH_SWP_DCAP    0xac0
16 #define QBMAN_CINH_SWP_SDQCR   0xb00
17 #define QBMAN_CINH_SWP_RAR     0xcc0
18 
19 /* CENA register offsets */
20 #define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
21 #define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
22 #define QBMAN_CENA_SWP_RCR(n)  (0x400 + ((uint32_t)(n) << 6))
23 #define QBMAN_CENA_SWP_CR      0x600
24 #define QBMAN_CENA_SWP_RR(vb)  (0x700 + ((uint32_t)(vb) >> 1))
25 #define QBMAN_CENA_SWP_VDQCR   0x780
26 
27 /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
28 #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
29 
30 /*******************************/
31 /* Pre-defined attribute codes */
32 /*******************************/
33 
34 struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
35 struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
36 
37 /*************************/
38 /* SDQCR attribute codes */
39 /*************************/
40 
41 /* we put these here because at least some of them are required by
42  * qbman_swp_init() */
43 struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
44 struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
45 struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
46 #define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
47 enum qbman_sdqcr_dct {
48 	qbman_sdqcr_dct_null = 0,
49 	qbman_sdqcr_dct_prio_ics,
50 	qbman_sdqcr_dct_active_ics,
51 	qbman_sdqcr_dct_active
52 };
53 enum qbman_sdqcr_fc {
54 	qbman_sdqcr_fc_one = 0,
55 	qbman_sdqcr_fc_up_to_3 = 1
56 };
57 
58 /*********************************/
59 /* Portal constructor/destructor */
60 /*********************************/
61 
62 /* Software portals should always be in the power-on state when we initialise,
63  * due to the CCSR-based portal reset functionality that MC has. */
64 struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
65 {
66 	int ret;
67 	struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
68 	u32 major = 0, minor = 0;
69 
70 	if (!p)
71 		return NULL;
72 	p->desc = d;
73 #ifdef QBMAN_CHECKING
74 	p->mc.check = swp_mc_can_start;
75 #endif
76 	p->mc.valid_bit = QB_VALID_BIT;
77 	p->sdq = 0;
78 	qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
79 	qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
80 	qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
81 	atomic_set(&p->vdq.busy, 1);
82 	p->vdq.valid_bit = QB_VALID_BIT;
83 	p->dqrr.next_idx = 0;
84 
85 	qbman_version(&major, &minor);
86 	if (!major) {
87 		printf("invalid qbman version\n");
88 		return NULL;
89 	}
90 
91 	if (major >= 4 && minor >= 1)
92 		p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
93 	else
94 		p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
95 
96 	p->dqrr.valid_bit = QB_VALID_BIT;
97 	ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
98 	if (ret) {
99 		free(p);
100 		printf("qbman_swp_sys_init() failed %d\n", ret);
101 		return NULL;
102 	}
103 	qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
104 	return p;
105 }
106 
107 /***********************/
108 /* Management commands */
109 /***********************/
110 
111 /*
112  * Internal code common to all types of management commands.
113  */
114 
115 void *qbman_swp_mc_start(struct qbman_swp *p)
116 {
117 	void *ret;
118 	int *return_val;
119 #ifdef QBMAN_CHECKING
120 	BUG_ON(p->mc.check != swp_mc_can_start);
121 #endif
122 	ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
123 #ifdef QBMAN_CHECKING
124 	return_val = (int *)ret;
125 	if (!(*return_val))
126 		p->mc.check = swp_mc_can_submit;
127 #endif
128 	return ret;
129 }
130 
131 void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
132 {
133 	uint32_t *v = cmd;
134 #ifdef QBMAN_CHECKING
135 	BUG_ON(p->mc.check != swp_mc_can_submit);
136 #endif
137 	lwsync();
138 	/* TBD: "|=" is going to hurt performance. Need to move as many fields
139 	 * out of word zero, and for those that remain, the "OR" needs to occur
140 	 * at the caller side. This debug check helps to catch cases where the
141 	 * caller wants to OR but has forgotten to do so. */
142 	BUG_ON((*v & cmd_verb) != *v);
143 	*v = cmd_verb | p->mc.valid_bit;
144 	qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
145 	/* TODO: add prefetch support for GPP */
146 #ifdef QBMAN_CHECKING
147 	p->mc.check = swp_mc_can_poll;
148 #endif
149 }
150 
151 void *qbman_swp_mc_result(struct qbman_swp *p)
152 {
153 	uint32_t *ret, verb;
154 #ifdef QBMAN_CHECKING
155 	BUG_ON(p->mc.check != swp_mc_can_poll);
156 #endif
157 	ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
158 	/* Remove the valid-bit - command completed iff the rest is non-zero */
159 	verb = ret[0] & ~QB_VALID_BIT;
160 	if (!verb)
161 		return NULL;
162 #ifdef QBMAN_CHECKING
163 	p->mc.check = swp_mc_can_start;
164 #endif
165 	p->mc.valid_bit ^= QB_VALID_BIT;
166 	return ret;
167 }
168 
169 /***********/
170 /* Enqueue */
171 /***********/
172 
173 /* These should be const, eventually */
174 static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
175 static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
176 static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
177 /* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
178 static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
179 static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
180 static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
181 static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
182 static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
183 
184 enum qbman_eq_cmd_e {
185 	/* No enqueue, primarily for plugging ORP gaps for dropped frames */
186 	qbman_eq_cmd_empty,
187 	/* DMA an enqueue response once complete */
188 	qbman_eq_cmd_respond,
189 	/* DMA an enqueue response only if the enqueue fails */
190 	qbman_eq_cmd_respond_reject
191 };
192 
193 void qbman_eq_desc_clear(struct qbman_eq_desc *d)
194 {
195 	memset(d, 0, sizeof(*d));
196 }
197 
198 void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
199 {
200 	uint32_t *cl = qb_cl(d);
201 
202 	qb_attr_code_encode(&code_eq_orp_en, cl, 0);
203 	qb_attr_code_encode(&code_eq_cmd, cl,
204 			    respond_success ? qbman_eq_cmd_respond :
205 					      qbman_eq_cmd_respond_reject);
206 }
207 
208 void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
209 				dma_addr_t storage_phys,
210 				int stash)
211 {
212 	uint32_t *cl = qb_cl(d);
213 
214 	qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
215 	qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
216 }
217 
218 
219 void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
220 			  uint32_t qd_bin, uint32_t qd_prio)
221 {
222 	uint32_t *cl = qb_cl(d);
223 
224 	qb_attr_code_encode(&code_eq_qd_en, cl, 1);
225 	qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
226 	qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
227 	qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
228 }
229 
230 #define EQAR_IDX(eqar)     ((eqar) & 0x7)
231 #define EQAR_VB(eqar)      ((eqar) & 0x80)
232 #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
233 
234 int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
235 		      const struct qbman_fd *fd)
236 {
237 	uint32_t *p;
238 	const uint32_t *cl = qb_cl(d);
239 	uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
240 	debug("EQAR=%08x\n", eqar);
241 	if (!EQAR_SUCCESS(eqar))
242 		return -EBUSY;
243 	p = qbman_cena_write_start(&s->sys,
244 				   QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
245 	word_copy(&p[1], &cl[1], 7);
246 	word_copy(&p[8], fd, sizeof(*fd) >> 2);
247 	lwsync();
248 	/* Set the verb byte, have to substitute in the valid-bit */
249 	p[0] = cl[0] | EQAR_VB(eqar);
250 	qbman_cena_write_complete(&s->sys,
251 				  QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
252 				  p);
253 	return 0;
254 }
255 
256 /***************************/
257 /* Volatile (pull) dequeue */
258 /***************************/
259 
260 /* These should be const, eventually */
261 static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
262 static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
263 static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
264 static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
265 static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
266 static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
267 static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
268 static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
269 
270 enum qb_pull_dt_e {
271 	qb_pull_dt_channel,
272 	qb_pull_dt_workqueue,
273 	qb_pull_dt_framequeue
274 };
275 
276 void qbman_pull_desc_clear(struct qbman_pull_desc *d)
277 {
278 	memset(d, 0, sizeof(*d));
279 }
280 
281 void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
282 				 struct ldpaa_dq *storage,
283 				 dma_addr_t storage_phys,
284 				 int stash)
285 {
286 	uint32_t *cl = qb_cl(d);
287 
288 	/* Squiggle the pointer 'storage' into the extra 2 words of the
289 	 * descriptor (which aren't copied to the hw command) */
290 	*(void **)&cl[4] = storage;
291 	if (!storage) {
292 		qb_attr_code_encode(&code_pull_rls, cl, 0);
293 		return;
294 	}
295 	qb_attr_code_encode(&code_pull_rls, cl, 1);
296 	qb_attr_code_encode(&code_pull_stash, cl, !!stash);
297 	qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
298 }
299 
300 void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
301 {
302 	uint32_t *cl = qb_cl(d);
303 
304 	BUG_ON(!numframes || (numframes > 16));
305 	qb_attr_code_encode(&code_pull_numframes, cl,
306 			    (uint32_t)(numframes - 1));
307 }
308 
309 void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
310 {
311 	uint32_t *cl = qb_cl(d);
312 
313 	qb_attr_code_encode(&code_pull_token, cl, token);
314 }
315 
316 void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
317 {
318 	uint32_t *cl = qb_cl(d);
319 
320 	qb_attr_code_encode(&code_pull_dct, cl, 1);
321 	qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
322 	qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
323 }
324 
325 int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
326 {
327 	uint32_t *p;
328 	uint32_t *cl = qb_cl(d);
329 
330 	if (!atomic_dec_and_test(&s->vdq.busy)) {
331 		atomic_inc(&s->vdq.busy);
332 		return -EBUSY;
333 	}
334 	s->vdq.storage = *(void **)&cl[4];
335 	s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
336 	p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
337 	word_copy(&p[1], &cl[1], 3);
338 	lwsync();
339 	/* Set the verb byte, have to substitute in the valid-bit */
340 	p[0] = cl[0] | s->vdq.valid_bit;
341 	s->vdq.valid_bit ^= QB_VALID_BIT;
342 	qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
343 	return 0;
344 }
345 
346 /****************/
347 /* Polling DQRR */
348 /****************/
349 
350 static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
351 static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
352 static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
353 
354 #define QBMAN_DQRR_RESPONSE_DQ        0x60
355 #define QBMAN_DQRR_RESPONSE_FQRN      0x21
356 #define QBMAN_DQRR_RESPONSE_FQRNI     0x22
357 #define QBMAN_DQRR_RESPONSE_FQPN      0x24
358 #define QBMAN_DQRR_RESPONSE_FQDAN     0x25
359 #define QBMAN_DQRR_RESPONSE_CDAN      0x26
360 #define QBMAN_DQRR_RESPONSE_CSCN_MEM  0x27
361 #define QBMAN_DQRR_RESPONSE_CGCU      0x28
362 #define QBMAN_DQRR_RESPONSE_BPSCN     0x29
363 #define QBMAN_DQRR_RESPONSE_CSCN_WQ   0x2a
364 
365 
366 /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
367  * only once, so repeated calls can return a sequence of DQRR entries, without
368  * requiring they be consumed immediately or in any particular order. */
369 const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
370 {
371 	uint32_t verb;
372 	uint32_t response_verb;
373 	uint32_t flags;
374 	const struct ldpaa_dq *dq;
375 	const uint32_t *p;
376 
377 	dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
378 	p = qb_cl(dq);
379 	verb = qb_attr_code_decode(&code_dqrr_verb, p);
380 
381 	/* If the valid-bit isn't of the expected polarity, nothing there. Note,
382 	 * in the DQRR reset bug workaround, we shouldn't need to skip these
383 	 * check, because we've already determined that a new entry is available
384 	 * and we've invalidated the cacheline before reading it, so the
385 	 * valid-bit behaviour is repaired and should tell us what we already
386 	 * knew from reading PI.
387 	 */
388 	if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
389 		qbman_cena_invalidate_prefetch(&s->sys,
390 					QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
391 		return NULL;
392 	}
393 	/* There's something there. Move "next_idx" attention to the next ring
394 	 * entry (and prefetch it) before returning what we found. */
395 	s->dqrr.next_idx++;
396 	s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
397 	/* TODO: it's possible to do all this without conditionals, optimise it
398 	 * later. */
399 	if (!s->dqrr.next_idx)
400 		s->dqrr.valid_bit ^= QB_VALID_BIT;
401 
402 	/* If this is the final response to a volatile dequeue command
403 	   indicate that the vdq is no longer busy */
404 	flags = ldpaa_dq_flags(dq);
405 	response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
406 	if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
407 	    (flags & LDPAA_DQ_STAT_VOLATILE) &&
408 	    (flags & LDPAA_DQ_STAT_EXPIRED))
409 			atomic_inc(&s->vdq.busy);
410 
411 	qbman_cena_invalidate_prefetch(&s->sys,
412 				       QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
413 	return dq;
414 }
415 
416 /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
417 void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
418 {
419 	qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
420 }
421 
422 /*********************************/
423 /* Polling user-provided storage */
424 /*********************************/
425 
426 void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
427 				 unsigned int num_entries,
428 				 uint8_t oldtoken)
429 {
430 	memset(dq, oldtoken, num_entries * sizeof(*dq));
431 }
432 
433 int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
434 				const struct ldpaa_dq *dq,
435 				uint8_t newtoken)
436 {
437 	/* To avoid converting the little-endian DQ entry to host-endian prior
438 	 * to us knowing whether there is a valid entry or not (and run the
439 	 * risk of corrupting the incoming hardware LE write), we detect in
440 	 * hardware endianness rather than host. This means we need a different
441 	 * "code" depending on whether we are BE or LE in software, which is
442 	 * where DQRR_TOK_OFFSET comes in... */
443 	static struct qb_attr_code code_dqrr_tok_detect =
444 					QB_CODE(0, DQRR_TOK_OFFSET, 8);
445 	/* The user trying to poll for a result treats "dq" as const. It is
446 	 * however the same address that was provided to us non-const in the
447 	 * first place, for directing hardware DMA to. So we can cast away the
448 	 * const because it is mutable from our perspective. */
449 	uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
450 	uint32_t token;
451 
452 	token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
453 	if (token != newtoken)
454 		return 0;
455 
456 	/* Only now do we convert from hardware to host endianness. Also, as we
457 	 * are returning success, the user has promised not to call us again, so
458 	 * there's no risk of us converting the endianness twice... */
459 	make_le32_n(p, 16);
460 
461 	/* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
462 	 * fact "VDQCR" shows busy doesn't mean that the result we're looking at
463 	 * is from the same command. Eg. we may be looking at our 10th dequeue
464 	 * result from our first VDQCR command, yet the second dequeue command
465 	 * could have been kicked off already, after seeing the 1st result. Ie.
466 	 * the result we're looking at is not necessarily proof that we can
467 	 * reset "busy".  We instead base the decision on whether the current
468 	 * result is sitting at the first 'storage' location of the busy
469 	 * command. */
470 	if (s->vdq.storage == dq) {
471 		s->vdq.storage = NULL;
472 			atomic_inc(&s->vdq.busy);
473 	}
474 	return 1;
475 }
476 
477 /********************************/
478 /* Categorising dequeue entries */
479 /********************************/
480 
481 static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
482 {
483 	const uint32_t *p = qb_cl(dq);
484 	uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
485 
486 	return response_verb == x;
487 }
488 
489 int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
490 {
491 	return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
492 }
493 
494 /*********************************/
495 /* Parsing frame dequeue results */
496 /*********************************/
497 
498 /* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
499 
500 uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
501 {
502 	const uint32_t *p = qb_cl(dq);
503 
504 	return qb_attr_code_decode(&code_dqrr_stat, p);
505 }
506 
507 const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
508 {
509 	const uint32_t *p = qb_cl(dq);
510 
511 	return (const struct dpaa_fd *)&p[8];
512 }
513 
514 /******************/
515 /* Buffer release */
516 /******************/
517 
518 /* These should be const, eventually */
519 /* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
520 static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
521 static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
522 
523 void qbman_release_desc_clear(struct qbman_release_desc *d)
524 {
525 	uint32_t *cl;
526 
527 	memset(d, 0, sizeof(*d));
528 	cl = qb_cl(d);
529 	qb_attr_code_encode(&code_release_set_me, cl, 1);
530 }
531 
532 void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
533 {
534 	uint32_t *cl = qb_cl(d);
535 
536 	qb_attr_code_encode(&code_release_bpid, cl, bpid);
537 }
538 
539 #define RAR_IDX(rar)     ((rar) & 0x7)
540 #define RAR_VB(rar)      ((rar) & 0x80)
541 #define RAR_SUCCESS(rar) ((rar) & 0x100)
542 
543 int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
544 		      const uint64_t *buffers, unsigned int num_buffers)
545 {
546 	uint32_t *p;
547 	const uint32_t *cl = qb_cl(d);
548 	uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
549 	debug("RAR=%08x\n", rar);
550 	if (!RAR_SUCCESS(rar))
551 		return -EBUSY;
552 	BUG_ON(!num_buffers || (num_buffers > 7));
553 	/* Start the release command */
554 	p = qbman_cena_write_start(&s->sys,
555 				   QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
556 	/* Copy the caller's buffer pointers to the command */
557 	u64_to_le32_copy(&p[2], buffers, num_buffers);
558 	lwsync();
559 	/* Set the verb byte, have to substitute in the valid-bit and the number
560 	 * of buffers. */
561 	p[0] = cl[0] | RAR_VB(rar) | num_buffers;
562 	qbman_cena_write_complete(&s->sys,
563 				  QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
564 				  p);
565 	return 0;
566 }
567 
568 /*******************/
569 /* Buffer acquires */
570 /*******************/
571 
572 /* These should be const, eventually */
573 static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
574 static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
575 static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
576 
577 int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
578 		      unsigned int num_buffers)
579 {
580 	uint32_t *p;
581 	uint32_t verb, rslt, num;
582 
583 	BUG_ON(!num_buffers || (num_buffers > 7));
584 
585 	/* Start the management command */
586 	p = qbman_swp_mc_start(s);
587 
588 	if (!p)
589 		return -EBUSY;
590 
591 	/* Encode the caller-provided attributes */
592 	qb_attr_code_encode(&code_acquire_bpid, p, bpid);
593 	qb_attr_code_encode(&code_acquire_num, p, num_buffers);
594 
595 	/* Complete the management command */
596 	p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
597 
598 	/* Decode the outcome */
599 	verb = qb_attr_code_decode(&code_generic_verb, p);
600 	rslt = qb_attr_code_decode(&code_generic_rslt, p);
601 	num = qb_attr_code_decode(&code_acquire_r_num, p);
602 	BUG_ON(verb != QBMAN_MC_ACQUIRE);
603 
604 	/* Determine success or failure */
605 	if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
606 		printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
607 		       bpid, rslt);
608 		return -EIO;
609 	}
610 	BUG_ON(num > num_buffers);
611 	/* Copy the acquired buffers to the caller's array */
612 	u64_from_le32_copy(buffers, &p[2], num);
613 	return (int)num;
614 }
615