1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2009-2011 Freescale Semiconductor, Inc. 4 * Dave Liu <daveliu@freescale.com> 5 */ 6 7 /* MAXFRM - maximum frame length */ 8 #define MAXFRM_MASK 0x0000ffff 9 10 #include <common.h> 11 #include <phy.h> 12 #include <asm/types.h> 13 #include <asm/io.h> 14 #include <fsl_tgec.h> 15 16 #include "fm.h" 17 18 #define TGEC_CMD_CFG_INIT (TGEC_CMD_CFG_NO_LEN_CHK | \ 19 TGEC_CMD_CFG_RX_ER_DISC | \ 20 TGEC_CMD_CFG_STAT_CLR | \ 21 TGEC_CMD_CFG_PAUSE_IGNORE | \ 22 TGEC_CMD_CFG_CRC_FWD) 23 #define TGEC_CMD_CFG_FINAL (TGEC_CMD_CFG_NO_LEN_CHK | \ 24 TGEC_CMD_CFG_RX_ER_DISC | \ 25 TGEC_CMD_CFG_PAUSE_IGNORE | \ 26 TGEC_CMD_CFG_CRC_FWD) 27 28 static void tgec_init_mac(struct fsl_enet_mac *mac) 29 { 30 struct tgec *regs = mac->base; 31 32 /* mask all interrupt */ 33 out_be32(®s->imask, IMASK_MASK_ALL); 34 35 /* clear all events */ 36 out_be32(®s->ievent, IEVENT_CLEAR_ALL); 37 38 /* set the max receive length */ 39 out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK); 40 41 /* 42 * 1588 disable, insert second mac disable payload length check 43 * disable, normal operation, any rx error frame is discarded, clear 44 * counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no 45 * strip, Tx CRC append, Rx disable and Tx disable 46 */ 47 out_be32(®s->command_config, TGEC_CMD_CFG_INIT); 48 udelay(1000); 49 out_be32(®s->command_config, TGEC_CMD_CFG_FINAL); 50 51 /* multicast frame reception for the hash entry disable */ 52 out_be32(®s->hashtable_ctrl, 0); 53 } 54 55 static void tgec_enable_mac(struct fsl_enet_mac *mac) 56 { 57 struct tgec *regs = mac->base; 58 59 setbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN); 60 } 61 62 static void tgec_disable_mac(struct fsl_enet_mac *mac) 63 { 64 struct tgec *regs = mac->base; 65 66 clrbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN); 67 } 68 69 static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr) 70 { 71 struct tgec *regs = mac->base; 72 u32 mac_addr0, mac_addr1; 73 74 /* 75 * if a station address of 0x12345678ABCD, perform a write to 76 * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB 77 */ 78 mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \ 79 (mac_addr[1] << 8) | (mac_addr[0]); 80 out_be32(®s->mac_addr_0, mac_addr0); 81 82 mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff; 83 out_be32(®s->mac_addr_1, mac_addr1); 84 } 85 86 static void tgec_set_interface_mode(struct fsl_enet_mac *mac, 87 phy_interface_t type, int speed) 88 { 89 /* nothing right now */ 90 return; 91 } 92 93 void init_tgec(struct fsl_enet_mac *mac, void *base, 94 void *phyregs, int max_rx_len) 95 { 96 mac->base = base; 97 mac->phyregs = phyregs; 98 mac->max_rx_len = max_rx_len; 99 mac->init_mac = tgec_init_mac; 100 mac->enable_mac = tgec_enable_mac; 101 mac->disable_mac = tgec_disable_mac; 102 mac->set_mac_addr = tgec_set_mac_addr; 103 mac->set_if_mode = tgec_set_interface_mode; 104 } 105