1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2011 Freescale Semiconductor, Inc. 4 */ 5 #include <common.h> 6 #include <phy.h> 7 #include <fm_eth.h> 8 #include <asm/io.h> 9 #include <asm/immap_85xx.h> 10 #include <asm/fsl_serdes.h> 11 12 static u32 port_to_devdisr[] = { 13 [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1, 14 [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2, 15 }; 16 17 static int is_device_disabled(enum fm_port port) 18 { 19 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 20 u32 devdisr = in_be32(&gur->devdisr); 21 22 return port_to_devdisr[port] & devdisr; 23 } 24 25 void fman_disable_port(enum fm_port port) 26 { 27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 28 29 /* don't allow disabling of DTSEC1 as its needed for MDIO */ 30 if (port == FM1_DTSEC1) 31 return; 32 33 setbits_be32(&gur->devdisr, port_to_devdisr[port]); 34 } 35 36 void fman_enable_port(enum fm_port port) 37 { 38 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 39 40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]); 41 } 42 43 phy_interface_t fman_port_enet_if(enum fm_port port) 44 { 45 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 46 u32 pordevsr = in_be32(&gur->pordevsr); 47 48 if (is_device_disabled(port)) 49 return PHY_INTERFACE_MODE_NONE; 50 51 /* DTSEC1 can be SGMII, RGMII or RMII */ 52 if (port == FM1_DTSEC1) { 53 if (is_serdes_configured(SGMII_FM1_DTSEC1)) 54 return PHY_INTERFACE_MODE_SGMII; 55 if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) { 56 if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC) 57 return PHY_INTERFACE_MODE_RGMII; 58 else 59 return PHY_INTERFACE_MODE_RMII; 60 } 61 } 62 63 /* DTSEC2 only supports SGMII or RGMII */ 64 if (port == FM1_DTSEC2) { 65 if (is_serdes_configured(SGMII_FM1_DTSEC2)) 66 return PHY_INTERFACE_MODE_SGMII; 67 if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS) 68 return PHY_INTERFACE_MODE_RGMII; 69 } 70 71 return PHY_INTERFACE_MODE_NONE; 72 } 73