1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/fsl_serdes.h> 9 10 #include "fm.h" 11 12 struct fm_eth_info fm_info[] = { 13 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1) 14 FM_DTSEC_INFO_INITIALIZER(1, 1), 15 #endif 16 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2) 17 FM_DTSEC_INFO_INITIALIZER(1, 2), 18 #endif 19 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3) 20 FM_DTSEC_INFO_INITIALIZER(1, 3), 21 #endif 22 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4) 23 FM_DTSEC_INFO_INITIALIZER(1, 4), 24 #endif 25 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5) 26 FM_DTSEC_INFO_INITIALIZER(1, 5), 27 #endif 28 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6) 29 FM_DTSEC_INFO_INITIALIZER(1, 6), 30 #endif 31 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7) 32 FM_DTSEC_INFO_INITIALIZER(1, 9), 33 #endif 34 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8) 35 FM_DTSEC_INFO_INITIALIZER(1, 10), 36 #endif 37 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1) 38 FM_DTSEC_INFO_INITIALIZER(2, 1), 39 #endif 40 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2) 41 FM_DTSEC_INFO_INITIALIZER(2, 2), 42 #endif 43 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3) 44 FM_DTSEC_INFO_INITIALIZER(2, 3), 45 #endif 46 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4) 47 FM_DTSEC_INFO_INITIALIZER(2, 4), 48 #endif 49 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5) 50 FM_DTSEC_INFO_INITIALIZER(2, 5), 51 #endif 52 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6) 53 FM_DTSEC_INFO_INITIALIZER(2, 6), 54 #endif 55 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7) 56 FM_DTSEC_INFO_INITIALIZER(2, 9), 57 #endif 58 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8) 59 FM_DTSEC_INFO_INITIALIZER(2, 10), 60 #endif 61 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1) 62 FM_TGEC_INFO_INITIALIZER(1, 1), 63 #endif 64 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2) 65 FM_TGEC_INFO_INITIALIZER(1, 2), 66 #endif 67 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3) 68 FM_TGEC_INFO_INITIALIZER2(1, 3), 69 #endif 70 #if (CONFIG_SYS_NUM_FM1_10GEC >= 4) 71 FM_TGEC_INFO_INITIALIZER2(1, 4), 72 #endif 73 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1) 74 FM_TGEC_INFO_INITIALIZER(2, 1), 75 #endif 76 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2) 77 FM_TGEC_INFO_INITIALIZER(2, 2), 78 #endif 79 }; 80 81 int fm_standard_init(bd_t *bis) 82 { 83 int i; 84 struct ccsr_fman *reg; 85 86 reg = (void *)CONFIG_SYS_FSL_FM1_ADDR; 87 if (fm_init_common(0, reg)) 88 return 0; 89 90 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 91 if ((fm_info[i].enabled) && (fm_info[i].index == 1)) 92 fm_eth_initialize(reg, &fm_info[i]); 93 } 94 95 #if (CONFIG_SYS_NUM_FMAN == 2) 96 reg = (void *)CONFIG_SYS_FSL_FM2_ADDR; 97 if (fm_init_common(1, reg)) 98 return 0; 99 100 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 101 if ((fm_info[i].enabled) && (fm_info[i].index == 2)) 102 fm_eth_initialize(reg, &fm_info[i]); 103 } 104 #endif 105 106 return 1; 107 } 108 109 /* simple linear search to map from port to array index */ 110 static int fm_port_to_index(enum fm_port port) 111 { 112 int i; 113 114 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 115 if (fm_info[i].port == port) 116 return i; 117 } 118 119 return -1; 120 } 121 122 /* 123 * Determine if an interface is actually active based on HW config 124 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if 125 * the interface is not active based on HW cfg of the SoC 126 */ 127 void fman_enet_init(void) 128 { 129 int i; 130 131 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 132 phy_interface_t enet_if; 133 134 enet_if = fman_port_enet_if(fm_info[i].port); 135 if (enet_if != PHY_INTERFACE_MODE_NONE) { 136 fm_info[i].enabled = 1; 137 fm_info[i].enet_if = enet_if; 138 } else { 139 fm_info[i].enabled = 0; 140 } 141 } 142 143 return ; 144 } 145 146 void fm_disable_port(enum fm_port port) 147 { 148 int i = fm_port_to_index(port); 149 150 if (i == -1) 151 return; 152 153 fm_info[i].enabled = 0; 154 fman_disable_port(port); 155 } 156 157 void fm_enable_port(enum fm_port port) 158 { 159 int i = fm_port_to_index(port); 160 161 if (i == -1) 162 return; 163 164 fm_info[i].enabled = 1; 165 fman_enable_port(port); 166 } 167 168 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus) 169 { 170 int i = fm_port_to_index(port); 171 172 if (i == -1) 173 return; 174 175 fm_info[i].bus = bus; 176 } 177 178 void fm_info_set_phy_address(enum fm_port port, int address) 179 { 180 int i = fm_port_to_index(port); 181 182 if (i == -1) 183 return; 184 185 fm_info[i].phy_addr = address; 186 } 187 188 /* 189 * Returns the PHY address for a given Fman port 190 * 191 * The port must be set via a prior call to fm_info_set_phy_address(). 192 * A negative error code is returned if the port is invalid. 193 */ 194 int fm_info_get_phy_address(enum fm_port port) 195 { 196 int i = fm_port_to_index(port); 197 198 if (i == -1) 199 return -1; 200 201 return fm_info[i].phy_addr; 202 } 203 204 /* 205 * Returns the type of the data interface between the given MAC and its PHY. 206 * This is typically determined by the RCW. 207 */ 208 phy_interface_t fm_info_get_enet_if(enum fm_port port) 209 { 210 int i = fm_port_to_index(port); 211 212 if (i == -1) 213 return PHY_INTERFACE_MODE_NONE; 214 215 if (fm_info[i].enabled) 216 return fm_info[i].enet_if; 217 218 return PHY_INTERFACE_MODE_NONE; 219 } 220 221 static void 222 __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 223 enum fm_port port, int offset) 224 { 225 return ; 226 } 227 228 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 229 enum fm_port port, int offset) 230 __attribute__((weak, alias("__def_board_ft_fman_fixup_port"))); 231 232 static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop) 233 { 234 int off; 235 uint32_t ph; 236 phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset; 237 u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS + 238 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET; 239 240 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 241 242 if (info->enabled) { 243 fdt_fixup_phy_connection(blob, off, info->enet_if); 244 board_ft_fman_fixup_port(blob, prop, paddr, info->port, off); 245 return ; 246 } 247 248 #ifdef CONFIG_SYS_FMAN_V3 249 /* 250 * Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when 251 * FM1_10GEC1 is enabled and FM1_DTSEC9 is disabled, ensure that the 252 * dual-role MAC is not disabled, ditto for other dual-role MACs. 253 */ 254 if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) || 255 ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) || 256 ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) || 257 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) || 258 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) || 259 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) || 260 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) || 261 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2))) 262 #if (CONFIG_SYS_NUM_FMAN == 2) 263 || 264 ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) || 265 ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) || 266 ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) || 267 ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10))) 268 #endif 269 ) 270 return; 271 #endif 272 /* board code might have caused offset to change */ 273 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 274 275 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */ 276 if (paddr != dtsec1_addr) 277 fdt_status_disabled(blob, off); /* disable the MAC node */ 278 279 /* disable the fsl,dpa-ethernet node that points to the MAC */ 280 ph = fdt_get_phandle(blob, off); 281 do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph), 282 "status", "disabled", strlen("disabled") + 1, 1); 283 } 284 285 void fdt_fixup_fman_ethernet(void *blob) 286 { 287 int i; 288 289 #ifdef CONFIG_SYS_FMAN_V3 290 for (i = 0; i < ARRAY_SIZE(fm_info); i++) 291 ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac"); 292 #else 293 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 294 if (fm_info[i].type == FM_ETH_1G_E) 295 ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac"); 296 else 297 ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac"); 298 } 299 #endif 300 } 301 302 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different. 303 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card), 304 *then set the correct PHY address 305 */ 306 void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port, 307 unsigned int port_num, int phy_base_addr) 308 { 309 unsigned int regnum = 0; 310 int qsgmii; 311 int i; 312 int phy_real_addr; 313 314 qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum); 315 316 if (!qsgmii) 317 return; 318 319 for (i = base_port; i < base_port + port_num; i++) { 320 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) { 321 phy_real_addr = phy_base_addr + i - base_port; 322 fm_info_set_phy_address(i, phy_real_addr); 323 } 324 } 325 } 326 327 /*to check whether qsgmii riser card is used*/ 328 int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr, 329 unsigned int port_num, unsigned regnum) 330 { 331 int i; 332 int val; 333 334 if (!bus) 335 return 0; 336 337 for (i = phy_base_addr; i < phy_base_addr + port_num; i++) { 338 val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum); 339 if (val != MIIM_TIMEOUT) 340 return 1; 341 } 342 343 return 0; 344 } 345