1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/fsl_serdes.h> 9 10 #include "fm.h" 11 12 struct fm_eth_info fm_info[] = { 13 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1) 14 FM_DTSEC_INFO_INITIALIZER(1, 1), 15 #endif 16 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2) 17 FM_DTSEC_INFO_INITIALIZER(1, 2), 18 #endif 19 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3) 20 FM_DTSEC_INFO_INITIALIZER(1, 3), 21 #endif 22 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4) 23 FM_DTSEC_INFO_INITIALIZER(1, 4), 24 #endif 25 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5) 26 FM_DTSEC_INFO_INITIALIZER(1, 5), 27 #endif 28 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6) 29 FM_DTSEC_INFO_INITIALIZER(1, 6), 30 #endif 31 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7) 32 FM_DTSEC_INFO_INITIALIZER(1, 9), 33 #endif 34 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8) 35 FM_DTSEC_INFO_INITIALIZER(1, 10), 36 #endif 37 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1) 38 FM_DTSEC_INFO_INITIALIZER(2, 1), 39 #endif 40 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2) 41 FM_DTSEC_INFO_INITIALIZER(2, 2), 42 #endif 43 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3) 44 FM_DTSEC_INFO_INITIALIZER(2, 3), 45 #endif 46 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4) 47 FM_DTSEC_INFO_INITIALIZER(2, 4), 48 #endif 49 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5) 50 FM_DTSEC_INFO_INITIALIZER(2, 5), 51 #endif 52 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6) 53 FM_DTSEC_INFO_INITIALIZER(2, 6), 54 #endif 55 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7) 56 FM_DTSEC_INFO_INITIALIZER(2, 9), 57 #endif 58 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8) 59 FM_DTSEC_INFO_INITIALIZER(2, 10), 60 #endif 61 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1) 62 FM_TGEC_INFO_INITIALIZER(1, 1), 63 #endif 64 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2) 65 FM_TGEC_INFO_INITIALIZER(1, 2), 66 #endif 67 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3) 68 FM_TGEC_INFO_INITIALIZER2(1, 3), 69 #endif 70 #if (CONFIG_SYS_NUM_FM1_10GEC >= 4) 71 FM_TGEC_INFO_INITIALIZER2(1, 4), 72 #endif 73 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1) 74 FM_TGEC_INFO_INITIALIZER(2, 1), 75 #endif 76 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2) 77 FM_TGEC_INFO_INITIALIZER(2, 2), 78 #endif 79 }; 80 81 int fm_standard_init(bd_t *bis) 82 { 83 int i; 84 struct ccsr_fman *reg; 85 86 reg = (void *)CONFIG_SYS_FSL_FM1_ADDR; 87 if (fm_init_common(0, reg)) 88 return 0; 89 90 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 91 if ((fm_info[i].enabled) && (fm_info[i].index == 1)) 92 fm_eth_initialize(reg, &fm_info[i]); 93 } 94 95 #if (CONFIG_SYS_NUM_FMAN == 2) 96 reg = (void *)CONFIG_SYS_FSL_FM2_ADDR; 97 if (fm_init_common(1, reg)) 98 return 0; 99 100 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 101 if ((fm_info[i].enabled) && (fm_info[i].index == 2)) 102 fm_eth_initialize(reg, &fm_info[i]); 103 } 104 #endif 105 106 return 1; 107 } 108 109 /* simple linear search to map from port to array index */ 110 static int fm_port_to_index(enum fm_port port) 111 { 112 int i; 113 114 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 115 if (fm_info[i].port == port) 116 return i; 117 } 118 119 return -1; 120 } 121 122 /* 123 * Determine if an interface is actually active based on HW config 124 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if 125 * the interface is not active based on HW cfg of the SoC 126 */ 127 void fman_enet_init(void) 128 { 129 int i; 130 131 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 132 phy_interface_t enet_if; 133 134 enet_if = fman_port_enet_if(fm_info[i].port); 135 if (enet_if != PHY_INTERFACE_MODE_NONE) { 136 fm_info[i].enabled = 1; 137 fm_info[i].enet_if = enet_if; 138 } else { 139 fm_info[i].enabled = 0; 140 } 141 } 142 143 return ; 144 } 145 146 void fm_disable_port(enum fm_port port) 147 { 148 int i = fm_port_to_index(port); 149 150 fm_info[i].enabled = 0; 151 fman_disable_port(port); 152 } 153 154 void fm_enable_port(enum fm_port port) 155 { 156 int i = fm_port_to_index(port); 157 158 fm_info[i].enabled = 1; 159 fman_enable_port(port); 160 } 161 162 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus) 163 { 164 int i = fm_port_to_index(port); 165 166 if (i == -1) 167 return; 168 169 fm_info[i].bus = bus; 170 } 171 172 void fm_info_set_phy_address(enum fm_port port, int address) 173 { 174 int i = fm_port_to_index(port); 175 176 if (i == -1) 177 return; 178 179 fm_info[i].phy_addr = address; 180 } 181 182 /* 183 * Returns the PHY address for a given Fman port 184 * 185 * The port must be set via a prior call to fm_info_set_phy_address(). 186 * A negative error code is returned if the port is invalid. 187 */ 188 int fm_info_get_phy_address(enum fm_port port) 189 { 190 int i = fm_port_to_index(port); 191 192 if (i == -1) 193 return -1; 194 195 return fm_info[i].phy_addr; 196 } 197 198 /* 199 * Returns the type of the data interface between the given MAC and its PHY. 200 * This is typically determined by the RCW. 201 */ 202 phy_interface_t fm_info_get_enet_if(enum fm_port port) 203 { 204 int i = fm_port_to_index(port); 205 206 if (i == -1) 207 return PHY_INTERFACE_MODE_NONE; 208 209 if (fm_info[i].enabled) 210 return fm_info[i].enet_if; 211 212 return PHY_INTERFACE_MODE_NONE; 213 } 214 215 static void 216 __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 217 enum fm_port port, int offset) 218 { 219 return ; 220 } 221 222 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 223 enum fm_port port, int offset) 224 __attribute__((weak, alias("__def_board_ft_fman_fixup_port"))); 225 226 static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop) 227 { 228 int off; 229 uint32_t ph; 230 phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset; 231 u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS + 232 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET; 233 234 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 235 236 if (info->enabled) { 237 fdt_fixup_phy_connection(blob, off, info->enet_if); 238 board_ft_fman_fixup_port(blob, prop, paddr, info->port, off); 239 return ; 240 } 241 242 #ifdef CONFIG_SYS_FMAN_V3 243 /* 244 * Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when 245 * FM1_10GEC1 is enabled and FM1_DTSEC9 is disabled, ensure that the 246 * dual-role MAC is not disabled, ditto for other dual-role MACs. 247 */ 248 if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) || 249 ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) || 250 ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) || 251 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) || 252 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) || 253 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) || 254 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) || 255 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2))) 256 #if (CONFIG_SYS_NUM_FMAN == 2) 257 || 258 ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) || 259 ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) || 260 ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) || 261 ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10))) 262 #endif 263 ) 264 return; 265 #endif 266 /* board code might have caused offset to change */ 267 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 268 269 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */ 270 if (paddr != dtsec1_addr) 271 fdt_status_disabled(blob, off); /* disable the MAC node */ 272 273 /* disable the fsl,dpa-ethernet node that points to the MAC */ 274 ph = fdt_get_phandle(blob, off); 275 do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph), 276 "status", "disabled", strlen("disabled") + 1, 1); 277 } 278 279 void fdt_fixup_fman_ethernet(void *blob) 280 { 281 int i; 282 283 #ifdef CONFIG_SYS_FMAN_V3 284 for (i = 0; i < ARRAY_SIZE(fm_info); i++) 285 ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac"); 286 #else 287 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 288 if (fm_info[i].type == FM_ETH_1G_E) 289 ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac"); 290 else 291 ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac"); 292 } 293 #endif 294 } 295 296 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different. 297 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card), 298 *then set the correct PHY address 299 */ 300 void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port, 301 unsigned int port_num, int phy_base_addr) 302 { 303 unsigned int regnum = 0; 304 int qsgmii; 305 int i; 306 int phy_real_addr; 307 308 qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum); 309 310 if (!qsgmii) 311 return; 312 313 for (i = base_port; i < base_port + port_num; i++) { 314 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) { 315 phy_real_addr = phy_base_addr + i - base_port; 316 fm_info_set_phy_address(i, phy_real_addr); 317 } 318 } 319 } 320 321 /*to check whether qsgmii riser card is used*/ 322 int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr, 323 unsigned int port_num, unsigned regnum) 324 { 325 int i; 326 int val; 327 328 if (!bus) 329 return 0; 330 331 for (i = phy_base_addr; i < phy_base_addr + port_num; i++) { 332 val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum); 333 if (val != MIIM_TIMEOUT) 334 return 1; 335 } 336 337 return 0; 338 } 339