1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/fsl_serdes.h> 9 10 #include "fm.h" 11 12 struct fm_eth_info fm_info[] = { 13 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1) 14 FM_DTSEC_INFO_INITIALIZER(1, 1), 15 #endif 16 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2) 17 FM_DTSEC_INFO_INITIALIZER(1, 2), 18 #endif 19 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3) 20 FM_DTSEC_INFO_INITIALIZER(1, 3), 21 #endif 22 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4) 23 FM_DTSEC_INFO_INITIALIZER(1, 4), 24 #endif 25 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5) 26 FM_DTSEC_INFO_INITIALIZER(1, 5), 27 #endif 28 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6) 29 FM_DTSEC_INFO_INITIALIZER(1, 6), 30 #endif 31 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7) 32 FM_DTSEC_INFO_INITIALIZER(1, 9), 33 #endif 34 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8) 35 FM_DTSEC_INFO_INITIALIZER(1, 10), 36 #endif 37 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1) 38 FM_DTSEC_INFO_INITIALIZER(2, 1), 39 #endif 40 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2) 41 FM_DTSEC_INFO_INITIALIZER(2, 2), 42 #endif 43 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3) 44 FM_DTSEC_INFO_INITIALIZER(2, 3), 45 #endif 46 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4) 47 FM_DTSEC_INFO_INITIALIZER(2, 4), 48 #endif 49 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5) 50 FM_DTSEC_INFO_INITIALIZER(2, 5), 51 #endif 52 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6) 53 FM_DTSEC_INFO_INITIALIZER(2, 6), 54 #endif 55 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7) 56 FM_DTSEC_INFO_INITIALIZER(2, 9), 57 #endif 58 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8) 59 FM_DTSEC_INFO_INITIALIZER(2, 10), 60 #endif 61 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1) 62 FM_TGEC_INFO_INITIALIZER(1, 1), 63 #endif 64 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2) 65 FM_TGEC_INFO_INITIALIZER(1, 2), 66 #endif 67 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1) 68 FM_TGEC_INFO_INITIALIZER(2, 1), 69 #endif 70 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2) 71 FM_TGEC_INFO_INITIALIZER(2, 2), 72 #endif 73 }; 74 75 int fm_standard_init(bd_t *bis) 76 { 77 int i; 78 struct ccsr_fman *reg; 79 80 reg = (void *)CONFIG_SYS_FSL_FM1_ADDR; 81 if (fm_init_common(0, reg)) 82 return 0; 83 84 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 85 if ((fm_info[i].enabled) && (fm_info[i].index == 1)) 86 fm_eth_initialize(reg, &fm_info[i]); 87 } 88 89 #if (CONFIG_SYS_NUM_FMAN == 2) 90 reg = (void *)CONFIG_SYS_FSL_FM2_ADDR; 91 if (fm_init_common(1, reg)) 92 return 0; 93 94 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 95 if ((fm_info[i].enabled) && (fm_info[i].index == 2)) 96 fm_eth_initialize(reg, &fm_info[i]); 97 } 98 #endif 99 100 return 1; 101 } 102 103 /* simple linear search to map from port to array index */ 104 static int fm_port_to_index(enum fm_port port) 105 { 106 int i; 107 108 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 109 if (fm_info[i].port == port) 110 return i; 111 } 112 113 return -1; 114 } 115 116 /* 117 * Determine if an interface is actually active based on HW config 118 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if 119 * the interface is not active based on HW cfg of the SoC 120 */ 121 void fman_enet_init(void) 122 { 123 int i; 124 125 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 126 phy_interface_t enet_if; 127 128 enet_if = fman_port_enet_if(fm_info[i].port); 129 if (enet_if != PHY_INTERFACE_MODE_NONE) { 130 fm_info[i].enabled = 1; 131 fm_info[i].enet_if = enet_if; 132 } else { 133 fm_info[i].enabled = 0; 134 } 135 } 136 137 return ; 138 } 139 140 void fm_disable_port(enum fm_port port) 141 { 142 int i = fm_port_to_index(port); 143 144 fm_info[i].enabled = 0; 145 fman_disable_port(port); 146 } 147 148 void fm_enable_port(enum fm_port port) 149 { 150 int i = fm_port_to_index(port); 151 152 fm_info[i].enabled = 1; 153 fman_enable_port(port); 154 } 155 156 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus) 157 { 158 int i = fm_port_to_index(port); 159 160 if (i == -1) 161 return; 162 163 fm_info[i].bus = bus; 164 } 165 166 void fm_info_set_phy_address(enum fm_port port, int address) 167 { 168 int i = fm_port_to_index(port); 169 170 if (i == -1) 171 return; 172 173 fm_info[i].phy_addr = address; 174 } 175 176 /* 177 * Returns the PHY address for a given Fman port 178 * 179 * The port must be set via a prior call to fm_info_set_phy_address(). 180 * A negative error code is returned if the port is invalid. 181 */ 182 int fm_info_get_phy_address(enum fm_port port) 183 { 184 int i = fm_port_to_index(port); 185 186 if (i == -1) 187 return -1; 188 189 return fm_info[i].phy_addr; 190 } 191 192 /* 193 * Returns the type of the data interface between the given MAC and its PHY. 194 * This is typically determined by the RCW. 195 */ 196 phy_interface_t fm_info_get_enet_if(enum fm_port port) 197 { 198 int i = fm_port_to_index(port); 199 200 if (i == -1) 201 return PHY_INTERFACE_MODE_NONE; 202 203 if (fm_info[i].enabled) 204 return fm_info[i].enet_if; 205 206 return PHY_INTERFACE_MODE_NONE; 207 } 208 209 static void 210 __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 211 enum fm_port port, int offset) 212 { 213 return ; 214 } 215 216 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa, 217 enum fm_port port, int offset) 218 __attribute__((weak, alias("__def_board_ft_fman_fixup_port"))); 219 220 static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop) 221 { 222 int off; 223 uint32_t ph; 224 phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset; 225 u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS + 226 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET; 227 228 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 229 230 if (info->enabled) { 231 fdt_fixup_phy_connection(blob, off, info->enet_if); 232 board_ft_fman_fixup_port(blob, prop, paddr, info->port, off); 233 return ; 234 } 235 236 #ifdef CONFIG_SYS_FMAN_V3 237 /* 238 * Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when 239 * FM1_10GEC1 is enabled and FM1_DTSEC9 is disabled, ensure that the 240 * dual-role MAC is not disabled, ditto for other dual-role MACs. 241 */ 242 if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) || 243 ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) || 244 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) || 245 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) 246 #if (CONFIG_SYS_NUM_FMAN == 2) 247 || 248 ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) || 249 ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) || 250 ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) || 251 ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10))) 252 #endif 253 ) 254 return; 255 #endif 256 /* board code might have caused offset to change */ 257 off = fdt_node_offset_by_compat_reg(blob, prop, paddr); 258 259 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */ 260 if (paddr != dtsec1_addr) 261 fdt_status_disabled(blob, off); /* disable the MAC node */ 262 263 /* disable the fsl,dpa-ethernet node that points to the MAC */ 264 ph = fdt_get_phandle(blob, off); 265 do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph), 266 "status", "disabled", strlen("disabled") + 1, 1); 267 } 268 269 void fdt_fixup_fman_ethernet(void *blob) 270 { 271 int i; 272 273 #ifdef CONFIG_SYS_FMAN_V3 274 for (i = 0; i < ARRAY_SIZE(fm_info); i++) 275 ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac"); 276 #else 277 for (i = 0; i < ARRAY_SIZE(fm_info); i++) { 278 if (fm_info[i].type == FM_ETH_1G_E) 279 ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac"); 280 else 281 ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac"); 282 } 283 #endif 284 } 285 286 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different. 287 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card), 288 *then set the correct PHY address 289 */ 290 void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port, 291 unsigned int port_num, int phy_base_addr) 292 { 293 unsigned int regnum = 0; 294 int qsgmii; 295 int i; 296 int phy_real_addr; 297 298 qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum); 299 300 if (!qsgmii) 301 return; 302 303 for (i = base_port; i < base_port + port_num; i++) { 304 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) { 305 phy_real_addr = phy_base_addr + i - base_port; 306 fm_info_set_phy_address(i, phy_real_addr); 307 } 308 } 309 } 310 311 /*to check whether qsgmii riser card is used*/ 312 int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr, 313 unsigned int port_num, unsigned regnum) 314 { 315 int i; 316 int val; 317 318 if (!bus) 319 return 0; 320 321 for (i = phy_base_addr; i < phy_base_addr + port_num; i++) { 322 val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum); 323 if (val != MIIM_TIMEOUT) 324 return 1; 325 } 326 327 return 0; 328 } 329