xref: /openbmc/u-boot/drivers/net/cs8900.c (revision 33b1d3f4)
1 /*
2  * Cirrus Logic CS8900A Ethernet
3  *
4  * (C) 2003 Wolfgang Denk, wd@denx.de
5  *     Extension to synchronize ethaddr environment variable
6  *     against value in EEPROM
7  *
8  * (C) Copyright 2002
9  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10  * Marius Groeger <mgroeger@sysgo.de>
11  *
12  * Copyright (C) 1999 Ben Williamson <benw@pobox.com>
13  *
14  * See file CREDITS for list of people who contributed to this
15  * project.
16  *
17  * This program is loaded into SRAM in bootstrap mode, where it waits
18  * for commands on UART1 to read and write memory, jump to code etc.
19  * A design goal for this program is to be entirely independent of the
20  * target board.  Anything with a CL-PS7111 or EP7211 should be able to run
21  * this code in bootstrap mode.  All the board specifics can be handled on
22  * the host.
23  *
24  * This program is free software; you can redistribute it and/or modify
25  * it under the terms of the GNU General Public License as published by
26  * the Free Software Foundation; either version 2 of the License, or
27  * (at your option) any later version.
28  *
29  * This program is distributed in the hope that it will be useful,
30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
32  * GNU General Public License for more details.
33  *
34  * You should have received a copy of the GNU General Public License
35  * along with this program; if not, write to the Free Software
36  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37  */
38 
39 #include <common.h>
40 #include <command.h>
41 #include "cs8900.h"
42 #include <net.h>
43 
44 #undef DEBUG
45 
46 /* packet page register access functions */
47 
48 #ifdef CS8900_BUS32
49 /* we don't need 16 bit initialisation on 32 bit bus */
50 #define get_reg_init_bus(x) get_reg((x))
51 #else
52 static unsigned short get_reg_init_bus (int regno)
53 {
54 	/* force 16 bit busmode */
55 	volatile unsigned char c;
56 
57 	c = CS8900_BUS16_0;
58 	c = CS8900_BUS16_1;
59 	c = CS8900_BUS16_0;
60 	c = CS8900_BUS16_1;
61 	c = CS8900_BUS16_0;
62 
63 	CS8900_PPTR = regno;
64 	return CS8900_PDATA;
65 }
66 #endif
67 
68 static unsigned short get_reg (int regno)
69 {
70 	CS8900_PPTR = regno;
71 	return CS8900_PDATA;
72 }
73 
74 
75 static void put_reg (int regno, unsigned short val)
76 {
77 	CS8900_PPTR = regno;
78 	CS8900_PDATA = val;
79 }
80 
81 static void eth_reset (void)
82 {
83 	int tmo;
84 	unsigned short us;
85 
86 	/* reset NIC */
87 	put_reg (PP_SelfCTL, get_reg (PP_SelfCTL) | PP_SelfCTL_Reset);
88 
89 	/* wait for 200ms */
90 	udelay (200000);
91 	/* Wait until the chip is reset */
92 
93 	tmo = get_timer (0) + 1 * CONFIG_SYS_HZ;
94 	while ((((us = get_reg_init_bus (PP_SelfSTAT)) & PP_SelfSTAT_InitD) == 0)
95 		   && tmo < get_timer (0))
96 		/*NOP*/;
97 }
98 
99 static void eth_reginit (void)
100 {
101 	/* receive only error free packets addressed to this card */
102 	put_reg (PP_RxCTL, PP_RxCTL_IA | PP_RxCTL_Broadcast | PP_RxCTL_RxOK);
103 	/* do not generate any interrupts on receive operations */
104 	put_reg (PP_RxCFG, 0);
105 	/* do not generate any interrupts on transmit operations */
106 	put_reg (PP_TxCFG, 0);
107 	/* do not generate any interrupts on buffer operations */
108 	put_reg (PP_BufCFG, 0);
109 	/* enable transmitter/receiver mode */
110 	put_reg (PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx);
111 }
112 
113 void cs8900_get_enetaddr (void)
114 {
115 	int i;
116 	uchar enetaddr[6];
117 
118 	/* if the env is setup, then bail */
119 	if (eth_getenv_enetaddr("ethaddr", enetaddr))
120 		return;
121 
122 	/* verify chip id */
123 	if (get_reg_init_bus (PP_ChipID) != 0x630e)
124 		return;
125 	eth_reset ();
126 	if ((get_reg (PP_SelfSTAT) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
127 			(PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
128 
129 		/* Load the MAC from EEPROM */
130 		for (i = 0; i < 6 / 2; i++) {
131 			unsigned int Addr;
132 
133 			Addr = get_reg (PP_IA + i * 2);
134 			enetaddr[i * 2] = Addr & 0xFF;
135 			enetaddr[i * 2 + 1] = Addr >> 8;
136 		}
137 
138 		eth_setenv_enetaddr("ethaddr", enetaddr);
139 		debug("### Set environment from HW MAC addr = \"%pM\"\n", enetaddr);
140 	}
141 }
142 
143 void eth_halt (void)
144 {
145 	/* disable transmitter/receiver mode */
146 	put_reg (PP_LineCTL, 0);
147 
148 	/* "shutdown" to show ChipID or kernel wouldn't find he cs8900 ... */
149 	get_reg_init_bus (PP_ChipID);
150 }
151 
152 int eth_init (bd_t * bd)
153 {
154 	uchar enetaddr[6];
155 
156 	/* verify chip id */
157 	if (get_reg_init_bus (PP_ChipID) != 0x630e) {
158 		printf ("CS8900 Ethernet chip not found?!\n");
159 		return 0;
160 	}
161 
162 	eth_reset ();
163 	/* set the ethernet address */
164 	eth_getenv_enetaddr("ethaddr", enetaddr);
165 	put_reg (PP_IA + 0, enetaddr[0] | (enetaddr[1] << 8));
166 	put_reg (PP_IA + 2, enetaddr[2] | (enetaddr[3] << 8));
167 	put_reg (PP_IA + 4, enetaddr[4] | (enetaddr[5] << 8));
168 
169 	eth_reginit ();
170 	return 0;
171 }
172 
173 /* Get a data block via Ethernet */
174 int eth_rx (void)
175 {
176 	int i;
177 	unsigned short rxlen;
178 	unsigned short *addr;
179 	unsigned short status;
180 
181 	status = get_reg (PP_RER);
182 
183 	if ((status & PP_RER_RxOK) == 0)
184 		return 0;
185 
186 	status = CS8900_RTDATA;		/* stat */
187 	rxlen = CS8900_RTDATA;		/* len */
188 
189 #ifdef DEBUG
190 	if (rxlen > PKTSIZE_ALIGN + PKTALIGN)
191 		printf ("packet too big!\n");
192 #endif
193 	for (addr = (unsigned short *) NetRxPackets[0], i = rxlen >> 1; i > 0;
194 		 i--)
195 		*addr++ = CS8900_RTDATA;
196 	if (rxlen & 1)
197 		*addr++ = CS8900_RTDATA;
198 
199 	/* Pass the packet up to the protocol layers. */
200 	NetReceive (NetRxPackets[0], rxlen);
201 
202 	return rxlen;
203 }
204 
205 /* Send a data block via Ethernet. */
206 int eth_send (volatile void *packet, int length)
207 {
208 	volatile unsigned short *addr;
209 	int tmo;
210 	unsigned short s;
211 
212 retry:
213 	/* initiate a transmit sequence */
214 	CS8900_TxCMD = PP_TxCmd_TxStart_Full;
215 	CS8900_TxLEN = length;
216 
217 	/* Test to see if the chip has allocated memory for the packet */
218 	if ((get_reg (PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) {
219 		/* Oops... this should not happen! */
220 #ifdef DEBUG
221 		printf ("cs: unable to send packet; retrying...\n");
222 #endif
223 		for (tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; get_timer (0) < tmo;)
224 			/*NOP*/;
225 		eth_reset ();
226 		eth_reginit ();
227 		goto retry;
228 	}
229 
230 	/* Write the contents of the packet */
231 	/* assume even number of bytes */
232 	for (addr = packet; length > 0; length -= 2)
233 		CS8900_RTDATA = *addr++;
234 
235 	/* wait for transfer to succeed */
236 	tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
237 	while ((s = get_reg (PP_TER) & ~0x1F) == 0) {
238 		if (get_timer (0) >= tmo)
239 			break;
240 	}
241 
242 	/* nothing */ ;
243 	if ((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) {
244 #ifdef DEBUG
245 		printf ("\ntransmission error %#x\n", s);
246 #endif
247 	}
248 
249 	return 0;
250 }
251 
252 static void cs8900_e2prom_ready(void)
253 {
254 	while (get_reg(PP_SelfSTAT) & SI_BUSY)
255 		;
256 }
257 
258 /***********************************************************/
259 /* read a 16-bit word out of the EEPROM                    */
260 /***********************************************************/
261 
262 int cs8900_e2prom_read(unsigned char addr, unsigned short *value)
263 {
264 	cs8900_e2prom_ready();
265 	put_reg(PP_EECMD, EEPROM_READ_CMD | addr);
266 	cs8900_e2prom_ready();
267 	*value = get_reg(PP_EEData);
268 
269 	return 0;
270 }
271 
272 
273 /***********************************************************/
274 /* write a 16-bit word into the EEPROM                     */
275 /***********************************************************/
276 
277 int cs8900_e2prom_write(unsigned char addr, unsigned short value)
278 {
279 	cs8900_e2prom_ready();
280 	put_reg(PP_EECMD, EEPROM_WRITE_EN);
281 	cs8900_e2prom_ready();
282 	put_reg(PP_EEData, value);
283 	put_reg(PP_EECMD, EEPROM_WRITE_CMD | addr);
284 	cs8900_e2prom_ready();
285 	put_reg(PP_EECMD, EEPROM_WRITE_DIS);
286 	cs8900_e2prom_ready();
287 
288 	return 0;
289 }
290