12439e4bfSJean-Christophe PLAGNIOL-VILLARD /* 22439e4bfSJean-Christophe PLAGNIOL-VILLARD * Cirrus Logic CS8900A Ethernet 32439e4bfSJean-Christophe PLAGNIOL-VILLARD * 4b1c0eaacSBen Warren * (C) 2009 Ben Warren , biggerbadderben@gmail.com 5b1c0eaacSBen Warren * Converted to use CONFIG_NET_MULTI API 6b1c0eaacSBen Warren * 72439e4bfSJean-Christophe PLAGNIOL-VILLARD * (C) 2003 Wolfgang Denk, wd@denx.de 82439e4bfSJean-Christophe PLAGNIOL-VILLARD * Extension to synchronize ethaddr environment variable 92439e4bfSJean-Christophe PLAGNIOL-VILLARD * against value in EEPROM 102439e4bfSJean-Christophe PLAGNIOL-VILLARD * 112439e4bfSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2002 122439e4bfSJean-Christophe PLAGNIOL-VILLARD * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 132439e4bfSJean-Christophe PLAGNIOL-VILLARD * Marius Groeger <mgroeger@sysgo.de> 142439e4bfSJean-Christophe PLAGNIOL-VILLARD * 152439e4bfSJean-Christophe PLAGNIOL-VILLARD * Copyright (C) 1999 Ben Williamson <benw@pobox.com> 162439e4bfSJean-Christophe PLAGNIOL-VILLARD * 172439e4bfSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 182439e4bfSJean-Christophe PLAGNIOL-VILLARD * project. 192439e4bfSJean-Christophe PLAGNIOL-VILLARD * 202439e4bfSJean-Christophe PLAGNIOL-VILLARD * This program is loaded into SRAM in bootstrap mode, where it waits 212439e4bfSJean-Christophe PLAGNIOL-VILLARD * for commands on UART1 to read and write memory, jump to code etc. 222439e4bfSJean-Christophe PLAGNIOL-VILLARD * A design goal for this program is to be entirely independent of the 232439e4bfSJean-Christophe PLAGNIOL-VILLARD * target board. Anything with a CL-PS7111 or EP7211 should be able to run 242439e4bfSJean-Christophe PLAGNIOL-VILLARD * this code in bootstrap mode. All the board specifics can be handled on 252439e4bfSJean-Christophe PLAGNIOL-VILLARD * the host. 262439e4bfSJean-Christophe PLAGNIOL-VILLARD * 272439e4bfSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or modify 282439e4bfSJean-Christophe PLAGNIOL-VILLARD * it under the terms of the GNU General Public License as published by 292439e4bfSJean-Christophe PLAGNIOL-VILLARD * the Free Software Foundation; either version 2 of the License, or 302439e4bfSJean-Christophe PLAGNIOL-VILLARD * (at your option) any later version. 312439e4bfSJean-Christophe PLAGNIOL-VILLARD * 322439e4bfSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 332439e4bfSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 342439e4bfSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 352439e4bfSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 362439e4bfSJean-Christophe PLAGNIOL-VILLARD * 372439e4bfSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 382439e4bfSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 392439e4bfSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 402439e4bfSJean-Christophe PLAGNIOL-VILLARD */ 412439e4bfSJean-Christophe PLAGNIOL-VILLARD 422439e4bfSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 432439e4bfSJean-Christophe PLAGNIOL-VILLARD #include <command.h> 44b1c0eaacSBen Warren #include <asm/io.h> 452439e4bfSJean-Christophe PLAGNIOL-VILLARD #include <net.h> 46b1c0eaacSBen Warren #include <malloc.h> 47b1c0eaacSBen Warren #include "cs8900.h" 482439e4bfSJean-Christophe PLAGNIOL-VILLARD 492439e4bfSJean-Christophe PLAGNIOL-VILLARD #undef DEBUG 502439e4bfSJean-Christophe PLAGNIOL-VILLARD 512439e4bfSJean-Christophe PLAGNIOL-VILLARD /* packet page register access functions */ 522439e4bfSJean-Christophe PLAGNIOL-VILLARD 53b1c0eaacSBen Warren #ifdef CONFIG_CS8900_BUS32 54b1c0eaacSBen Warren 55b1c0eaacSBen Warren #define REG_WRITE(v, a) writel((v),(a)) 56b1c0eaacSBen Warren #define REG_READ(a) readl((a)) 57b1c0eaacSBen Warren 582439e4bfSJean-Christophe PLAGNIOL-VILLARD /* we don't need 16 bit initialisation on 32 bit bus */ 59830c7b67SBen Warren #define get_reg_init_bus(r,d) get_reg((r),(d)) 60b1c0eaacSBen Warren 612439e4bfSJean-Christophe PLAGNIOL-VILLARD #else 62b1c0eaacSBen Warren 63b1c0eaacSBen Warren #define REG_WRITE(v, a) writew((v),(a)) 64b1c0eaacSBen Warren #define REG_READ(a) readw((a)) 65b1c0eaacSBen Warren 66b1c0eaacSBen Warren static u16 get_reg_init_bus(struct eth_device *dev, int regno) 672439e4bfSJean-Christophe PLAGNIOL-VILLARD { 682439e4bfSJean-Christophe PLAGNIOL-VILLARD /* force 16 bit busmode */ 69b1c0eaacSBen Warren volatile u8 c; 70b1c0eaacSBen Warren struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv); 71b1c0eaacSBen Warren uint8_t volatile * const iob = (uint8_t volatile * const)dev->iobase; 722439e4bfSJean-Christophe PLAGNIOL-VILLARD 73b1c0eaacSBen Warren c = readb(iob); 74b1c0eaacSBen Warren c = readb(iob + 1); 75b1c0eaacSBen Warren c = readb(iob); 76b1c0eaacSBen Warren c = readb(iob + 1); 77b1c0eaacSBen Warren c = readb(iob); 782439e4bfSJean-Christophe PLAGNIOL-VILLARD 79b1c0eaacSBen Warren REG_WRITE(regno, &priv->regs->pptr); 80b1c0eaacSBen Warren return REG_READ(&priv->regs->pdata); 812439e4bfSJean-Christophe PLAGNIOL-VILLARD } 822439e4bfSJean-Christophe PLAGNIOL-VILLARD #endif 832439e4bfSJean-Christophe PLAGNIOL-VILLARD 84b1c0eaacSBen Warren static u16 get_reg(struct eth_device *dev, int regno) 852439e4bfSJean-Christophe PLAGNIOL-VILLARD { 86b1c0eaacSBen Warren struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv); 87b1c0eaacSBen Warren REG_WRITE(regno, &priv->regs->pptr); 88b1c0eaacSBen Warren return REG_READ(&priv->regs->pdata); 892439e4bfSJean-Christophe PLAGNIOL-VILLARD } 902439e4bfSJean-Christophe PLAGNIOL-VILLARD 912439e4bfSJean-Christophe PLAGNIOL-VILLARD 92b1c0eaacSBen Warren static void put_reg(struct eth_device *dev, int regno, u16 val) 932439e4bfSJean-Christophe PLAGNIOL-VILLARD { 94b1c0eaacSBen Warren struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv); 95b1c0eaacSBen Warren REG_WRITE(regno, &priv->regs->pptr); 96b1c0eaacSBen Warren REG_WRITE(val, &priv->regs->pdata); 972439e4bfSJean-Christophe PLAGNIOL-VILLARD } 982439e4bfSJean-Christophe PLAGNIOL-VILLARD 99b1c0eaacSBen Warren static void cs8900_reset(struct eth_device *dev) 1002439e4bfSJean-Christophe PLAGNIOL-VILLARD { 1012439e4bfSJean-Christophe PLAGNIOL-VILLARD int tmo; 102b1c0eaacSBen Warren u16 us; 1032439e4bfSJean-Christophe PLAGNIOL-VILLARD 1042439e4bfSJean-Christophe PLAGNIOL-VILLARD /* reset NIC */ 105b1c0eaacSBen Warren put_reg(dev, PP_SelfCTL, get_reg(dev, PP_SelfCTL) | PP_SelfCTL_Reset); 1062439e4bfSJean-Christophe PLAGNIOL-VILLARD 1072439e4bfSJean-Christophe PLAGNIOL-VILLARD /* wait for 200ms */ 1082439e4bfSJean-Christophe PLAGNIOL-VILLARD udelay(200000); 1092439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Wait until the chip is reset */ 1102439e4bfSJean-Christophe PLAGNIOL-VILLARD 1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD tmo = get_timer(0) + 1 * CONFIG_SYS_HZ; 112b1c0eaacSBen Warren while ((((us = get_reg_init_bus(dev, PP_SelfSTAT)) & 113b1c0eaacSBen Warren PP_SelfSTAT_InitD) == 0) && tmo < get_timer(0)) 1142439e4bfSJean-Christophe PLAGNIOL-VILLARD /*NOP*/; 1152439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1162439e4bfSJean-Christophe PLAGNIOL-VILLARD 117b1c0eaacSBen Warren static void cs8900_reginit(struct eth_device *dev) 1182439e4bfSJean-Christophe PLAGNIOL-VILLARD { 1192439e4bfSJean-Christophe PLAGNIOL-VILLARD /* receive only error free packets addressed to this card */ 120b1c0eaacSBen Warren put_reg(dev, PP_RxCTL, 121b1c0eaacSBen Warren PP_RxCTL_IA | PP_RxCTL_Broadcast | PP_RxCTL_RxOK); 1222439e4bfSJean-Christophe PLAGNIOL-VILLARD /* do not generate any interrupts on receive operations */ 123b1c0eaacSBen Warren put_reg(dev, PP_RxCFG, 0); 1242439e4bfSJean-Christophe PLAGNIOL-VILLARD /* do not generate any interrupts on transmit operations */ 125b1c0eaacSBen Warren put_reg(dev, PP_TxCFG, 0); 1262439e4bfSJean-Christophe PLAGNIOL-VILLARD /* do not generate any interrupts on buffer operations */ 127b1c0eaacSBen Warren put_reg(dev, PP_BufCFG, 0); 1282439e4bfSJean-Christophe PLAGNIOL-VILLARD /* enable transmitter/receiver mode */ 129b1c0eaacSBen Warren put_reg(dev, PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx); 1302439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1312439e4bfSJean-Christophe PLAGNIOL-VILLARD 132b1c0eaacSBen Warren void cs8900_get_enetaddr(struct eth_device *dev) 1332439e4bfSJean-Christophe PLAGNIOL-VILLARD { 1342439e4bfSJean-Christophe PLAGNIOL-VILLARD int i; 1352439e4bfSJean-Christophe PLAGNIOL-VILLARD 1362439e4bfSJean-Christophe PLAGNIOL-VILLARD /* verify chip id */ 137b1c0eaacSBen Warren if (get_reg_init_bus(dev, PP_ChipID) != 0x630e) 1382439e4bfSJean-Christophe PLAGNIOL-VILLARD return; 139b1c0eaacSBen Warren cs8900_reset(dev); 140b1c0eaacSBen Warren if ((get_reg(dev, PP_SelfSTAT) & 141b1c0eaacSBen Warren (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) == 1422439e4bfSJean-Christophe PLAGNIOL-VILLARD (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) { 1432439e4bfSJean-Christophe PLAGNIOL-VILLARD 1442439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Load the MAC from EEPROM */ 145b1c0eaacSBen Warren for (i = 0; i < 3; i++) { 146b1c0eaacSBen Warren u32 Addr; 1472439e4bfSJean-Christophe PLAGNIOL-VILLARD 148b1c0eaacSBen Warren Addr = get_reg(dev, PP_IA + i * 2); 149b1c0eaacSBen Warren dev->enetaddr[i * 2] = Addr & 0xFF; 150b1c0eaacSBen Warren dev->enetaddr[i * 2 + 1] = Addr >> 8; 1512439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1522439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1532439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1542439e4bfSJean-Christophe PLAGNIOL-VILLARD 155b1c0eaacSBen Warren void cs8900_halt(struct eth_device *dev) 1562439e4bfSJean-Christophe PLAGNIOL-VILLARD { 1572439e4bfSJean-Christophe PLAGNIOL-VILLARD /* disable transmitter/receiver mode */ 158b1c0eaacSBen Warren put_reg(dev, PP_LineCTL, 0); 1592439e4bfSJean-Christophe PLAGNIOL-VILLARD 1602439e4bfSJean-Christophe PLAGNIOL-VILLARD /* "shutdown" to show ChipID or kernel wouldn't find he cs8900 ... */ 161b1c0eaacSBen Warren get_reg_init_bus(dev, PP_ChipID); 1622439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1632439e4bfSJean-Christophe PLAGNIOL-VILLARD 164b1c0eaacSBen Warren static int cs8900_init(struct eth_device *dev, bd_t * bd) 1652439e4bfSJean-Christophe PLAGNIOL-VILLARD { 166b1c0eaacSBen Warren uchar *enetaddr = dev->enetaddr; 167b1c0eaacSBen Warren u16 id; 1680a5238ceSMike Frysinger 1692439e4bfSJean-Christophe PLAGNIOL-VILLARD /* verify chip id */ 170b1c0eaacSBen Warren id = get_reg_init_bus(dev, PP_ChipID); 171b1c0eaacSBen Warren if (id != 0x630e) { 172b1c0eaacSBen Warren printf ("CS8900 Ethernet chip not found: " 173b1c0eaacSBen Warren "ID=0x%04x instead 0x%04x\n", id, 0x630e); 174b1c0eaacSBen Warren return 1; 1752439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1762439e4bfSJean-Christophe PLAGNIOL-VILLARD 177b1c0eaacSBen Warren cs8900_reset (dev); 1782439e4bfSJean-Christophe PLAGNIOL-VILLARD /* set the ethernet address */ 179b1c0eaacSBen Warren put_reg(dev, PP_IA + 0, enetaddr[0] | (enetaddr[1] << 8)); 180b1c0eaacSBen Warren put_reg(dev, PP_IA + 2, enetaddr[2] | (enetaddr[3] << 8)); 181b1c0eaacSBen Warren put_reg(dev, PP_IA + 4, enetaddr[4] | (enetaddr[5] << 8)); 1822439e4bfSJean-Christophe PLAGNIOL-VILLARD 183b1c0eaacSBen Warren cs8900_reginit(dev); 1842439e4bfSJean-Christophe PLAGNIOL-VILLARD return 0; 1852439e4bfSJean-Christophe PLAGNIOL-VILLARD } 1862439e4bfSJean-Christophe PLAGNIOL-VILLARD 1872439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Get a data block via Ethernet */ 188b1c0eaacSBen Warren static int cs8900_recv(struct eth_device *dev) 1892439e4bfSJean-Christophe PLAGNIOL-VILLARD { 1902439e4bfSJean-Christophe PLAGNIOL-VILLARD int i; 191b1c0eaacSBen Warren u16 rxlen; 192b1c0eaacSBen Warren u16 *addr; 193b1c0eaacSBen Warren u16 status; 1942439e4bfSJean-Christophe PLAGNIOL-VILLARD 195b1c0eaacSBen Warren struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv); 196b1c0eaacSBen Warren 197b1c0eaacSBen Warren status = get_reg(dev, PP_RER); 1982439e4bfSJean-Christophe PLAGNIOL-VILLARD 1992439e4bfSJean-Christophe PLAGNIOL-VILLARD if ((status & PP_RER_RxOK) == 0) 2002439e4bfSJean-Christophe PLAGNIOL-VILLARD return 0; 2012439e4bfSJean-Christophe PLAGNIOL-VILLARD 202b1c0eaacSBen Warren status = REG_READ(&priv->regs->rtdata); 203b1c0eaacSBen Warren rxlen = REG_READ(&priv->regs->rtdata); 2042439e4bfSJean-Christophe PLAGNIOL-VILLARD 2052439e4bfSJean-Christophe PLAGNIOL-VILLARD if (rxlen > PKTSIZE_ALIGN + PKTALIGN) 206b1c0eaacSBen Warren debug("packet too big!\n"); 207b1c0eaacSBen Warren for (addr = (u16 *) NetRxPackets[0], i = rxlen >> 1; i > 0; 2082439e4bfSJean-Christophe PLAGNIOL-VILLARD i--) 209b1c0eaacSBen Warren *addr++ = REG_READ(&priv->regs->rtdata); 2102439e4bfSJean-Christophe PLAGNIOL-VILLARD if (rxlen & 1) 211b1c0eaacSBen Warren *addr++ = REG_READ(&priv->regs->rtdata); 2122439e4bfSJean-Christophe PLAGNIOL-VILLARD 2132439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Pass the packet up to the protocol layers. */ 2142439e4bfSJean-Christophe PLAGNIOL-VILLARD NetReceive (NetRxPackets[0], rxlen); 2152439e4bfSJean-Christophe PLAGNIOL-VILLARD return rxlen; 2162439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2172439e4bfSJean-Christophe PLAGNIOL-VILLARD 2182439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Send a data block via Ethernet. */ 219b1c0eaacSBen Warren static int cs8900_send(struct eth_device *dev, 220b1c0eaacSBen Warren volatile void *packet, int length) 2212439e4bfSJean-Christophe PLAGNIOL-VILLARD { 222b1c0eaacSBen Warren volatile u16 *addr; 2232439e4bfSJean-Christophe PLAGNIOL-VILLARD int tmo; 224b1c0eaacSBen Warren u16 s; 225b1c0eaacSBen Warren struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv); 2262439e4bfSJean-Christophe PLAGNIOL-VILLARD 2272439e4bfSJean-Christophe PLAGNIOL-VILLARD retry: 2282439e4bfSJean-Christophe PLAGNIOL-VILLARD /* initiate a transmit sequence */ 229b1c0eaacSBen Warren REG_WRITE(PP_TxCmd_TxStart_Full, &priv->regs->txcmd); 230b1c0eaacSBen Warren REG_WRITE(length, &priv->regs->txlen); 2312439e4bfSJean-Christophe PLAGNIOL-VILLARD 2322439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Test to see if the chip has allocated memory for the packet */ 233b1c0eaacSBen Warren if ((get_reg(dev, PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) { 2342439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Oops... this should not happen! */ 235b1c0eaacSBen Warren debug("cs: unable to send packet; retrying...\n"); 236b1c0eaacSBen Warren for (tmo = get_timer(0) + 5 * CONFIG_SYS_HZ; 237b1c0eaacSBen Warren get_timer(0) < tmo;) 2382439e4bfSJean-Christophe PLAGNIOL-VILLARD /*NOP*/; 239b1c0eaacSBen Warren cs8900_reset(dev); 240b1c0eaacSBen Warren cs8900_reginit(dev); 2412439e4bfSJean-Christophe PLAGNIOL-VILLARD goto retry; 2422439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2432439e4bfSJean-Christophe PLAGNIOL-VILLARD 2442439e4bfSJean-Christophe PLAGNIOL-VILLARD /* Write the contents of the packet */ 2452439e4bfSJean-Christophe PLAGNIOL-VILLARD /* assume even number of bytes */ 2462439e4bfSJean-Christophe PLAGNIOL-VILLARD for (addr = packet; length > 0; length -= 2) 247b1c0eaacSBen Warren REG_WRITE(*addr++, &priv->regs->rtdata); 2482439e4bfSJean-Christophe PLAGNIOL-VILLARD 2492439e4bfSJean-Christophe PLAGNIOL-VILLARD /* wait for transfer to succeed */ 2506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD tmo = get_timer(0) + 5 * CONFIG_SYS_HZ; 251b1c0eaacSBen Warren while ((s = get_reg(dev, PP_TER) & ~0x1F) == 0) { 2522439e4bfSJean-Christophe PLAGNIOL-VILLARD if (get_timer(0) >= tmo) 2532439e4bfSJean-Christophe PLAGNIOL-VILLARD break; 2542439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2552439e4bfSJean-Christophe PLAGNIOL-VILLARD 2562439e4bfSJean-Christophe PLAGNIOL-VILLARD /* nothing */ ; 2572439e4bfSJean-Christophe PLAGNIOL-VILLARD if((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) { 258b1c0eaacSBen Warren debug("\ntransmission error %#x\n", s); 2592439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2602439e4bfSJean-Christophe PLAGNIOL-VILLARD 2612439e4bfSJean-Christophe PLAGNIOL-VILLARD return 0; 2622439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2632439e4bfSJean-Christophe PLAGNIOL-VILLARD 264b1c0eaacSBen Warren static void cs8900_e2prom_ready(struct eth_device *dev) 2652439e4bfSJean-Christophe PLAGNIOL-VILLARD { 266b1c0eaacSBen Warren while (get_reg(dev, PP_SelfSTAT) & SI_BUSY) 26713e0b8f7SGuennadi Liakhovetski ; 2682439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2692439e4bfSJean-Christophe PLAGNIOL-VILLARD 2702439e4bfSJean-Christophe PLAGNIOL-VILLARD /***********************************************************/ 2712439e4bfSJean-Christophe PLAGNIOL-VILLARD /* read a 16-bit word out of the EEPROM */ 2722439e4bfSJean-Christophe PLAGNIOL-VILLARD /***********************************************************/ 2732439e4bfSJean-Christophe PLAGNIOL-VILLARD 274b1c0eaacSBen Warren int cs8900_e2prom_read(struct eth_device *dev, 275b1c0eaacSBen Warren u8 addr, u16 *value) 2762439e4bfSJean-Christophe PLAGNIOL-VILLARD { 277b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 278b1c0eaacSBen Warren put_reg(dev, PP_EECMD, EEPROM_READ_CMD | addr); 279b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 280b1c0eaacSBen Warren *value = get_reg(dev, PP_EEData); 2812439e4bfSJean-Christophe PLAGNIOL-VILLARD 2822439e4bfSJean-Christophe PLAGNIOL-VILLARD return 0; 2832439e4bfSJean-Christophe PLAGNIOL-VILLARD } 2842439e4bfSJean-Christophe PLAGNIOL-VILLARD 2852439e4bfSJean-Christophe PLAGNIOL-VILLARD 2862439e4bfSJean-Christophe PLAGNIOL-VILLARD /***********************************************************/ 2872439e4bfSJean-Christophe PLAGNIOL-VILLARD /* write a 16-bit word into the EEPROM */ 2882439e4bfSJean-Christophe PLAGNIOL-VILLARD /***********************************************************/ 2892439e4bfSJean-Christophe PLAGNIOL-VILLARD 290b1c0eaacSBen Warren int cs8900_e2prom_write(struct eth_device *dev, u8 addr, u16 value) 2912439e4bfSJean-Christophe PLAGNIOL-VILLARD { 292b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 293b1c0eaacSBen Warren put_reg(dev, PP_EECMD, EEPROM_WRITE_EN); 294b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 295b1c0eaacSBen Warren put_reg(dev, PP_EEData, value); 296b1c0eaacSBen Warren put_reg(dev, PP_EECMD, EEPROM_WRITE_CMD | addr); 297b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 298b1c0eaacSBen Warren put_reg(dev, PP_EECMD, EEPROM_WRITE_DIS); 299b1c0eaacSBen Warren cs8900_e2prom_ready(dev); 3002439e4bfSJean-Christophe PLAGNIOL-VILLARD 3012439e4bfSJean-Christophe PLAGNIOL-VILLARD return 0; 3022439e4bfSJean-Christophe PLAGNIOL-VILLARD } 303b1c0eaacSBen Warren 304b1c0eaacSBen Warren int cs8900_initialize(u8 dev_num, int base_addr) 305b1c0eaacSBen Warren { 306b1c0eaacSBen Warren struct eth_device *dev; 307b1c0eaacSBen Warren struct cs8900_priv *priv; 308b1c0eaacSBen Warren 309b1c0eaacSBen Warren dev = malloc(sizeof(*dev)); 310b1c0eaacSBen Warren if (!dev) { 311b1c0eaacSBen Warren return 0; 312b1c0eaacSBen Warren } 313b1c0eaacSBen Warren memset(dev, 0, sizeof(*dev)); 314b1c0eaacSBen Warren 315b1c0eaacSBen Warren priv = malloc(sizeof(*priv)); 316b1c0eaacSBen Warren if (!priv) { 317*07c96606SMatthias Kaehlcke free(dev); 318b1c0eaacSBen Warren return 0; 319b1c0eaacSBen Warren } 320b1c0eaacSBen Warren memset(priv, 0, sizeof(*priv)); 321b1c0eaacSBen Warren priv->regs = (struct cs8900_regs *)base_addr; 322b1c0eaacSBen Warren 323b1c0eaacSBen Warren dev->iobase = base_addr; 324b1c0eaacSBen Warren dev->priv = priv; 325b1c0eaacSBen Warren dev->init = cs8900_init; 326b1c0eaacSBen Warren dev->halt = cs8900_halt; 327b1c0eaacSBen Warren dev->send = cs8900_send; 328b1c0eaacSBen Warren dev->recv = cs8900_recv; 329497ab0eeSHui.Tang 330497ab0eeSHui.Tang /* Load MAC address from EEPROM */ 331497ab0eeSHui.Tang cs8900_get_enetaddr(dev); 332497ab0eeSHui.Tang 333b1c0eaacSBen Warren sprintf(dev->name, "%s-%hu", CS8900_DRIVERNAME, dev_num); 334b1c0eaacSBen Warren 335b1c0eaacSBen Warren eth_register(dev); 336b1c0eaacSBen Warren return 0; 337b1c0eaacSBen Warren } 338