1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <malloc.h> 16 #include <mapmem.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/io.h> 20 21 #include "sf_internal.h" 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 /* Read commands array */ 26 static u8 spi_read_cmds_array[] = { 27 CMD_READ_ARRAY_SLOW, 28 CMD_READ_ARRAY_FAST, 29 CMD_READ_DUAL_OUTPUT_FAST, 30 CMD_READ_DUAL_IO_FAST, 31 CMD_READ_QUAD_OUTPUT_FAST, 32 CMD_READ_QUAD_IO_FAST, 33 }; 34 35 #ifdef CONFIG_SPI_FLASH_MACRONIX 36 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 37 { 38 u8 qeb_status; 39 int ret; 40 41 ret = spi_flash_cmd_read_status(flash, &qeb_status); 42 if (ret < 0) 43 return ret; 44 45 if (qeb_status & STATUS_QEB_MXIC) { 46 debug("SF: mxic: QEB is already set\n"); 47 } else { 48 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 49 if (ret < 0) 50 return ret; 51 } 52 53 return ret; 54 } 55 #endif 56 57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 58 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 59 { 60 u8 qeb_status; 61 int ret; 62 63 ret = spi_flash_cmd_read_config(flash, &qeb_status); 64 if (ret < 0) 65 return ret; 66 67 if (qeb_status & STATUS_QEB_WINSPAN) { 68 debug("SF: winspan: QEB is already set\n"); 69 } else { 70 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 71 if (ret < 0) 72 return ret; 73 } 74 75 return ret; 76 } 77 #endif 78 79 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 80 { 81 switch (idcode0) { 82 #ifdef CONFIG_SPI_FLASH_MACRONIX 83 case SPI_FLASH_CFI_MFR_MACRONIX: 84 return spi_flash_set_qeb_mxic(flash); 85 #endif 86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 87 case SPI_FLASH_CFI_MFR_SPANSION: 88 case SPI_FLASH_CFI_MFR_WINBOND: 89 return spi_flash_set_qeb_winspan(flash); 90 #endif 91 #ifdef CONFIG_SPI_FLASH_STMICRO 92 case SPI_FLASH_CFI_MFR_STMICRO: 93 debug("SF: QEB is volatile for %02x flash\n", idcode0); 94 return 0; 95 #endif 96 default: 97 printf("SF: Need set QEB func for %02x flash\n", idcode0); 98 return -1; 99 } 100 } 101 102 #ifdef CONFIG_SPI_FLASH_BAR 103 static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0) 104 { 105 u8 curr_bank = 0; 106 int ret; 107 108 if (flash->size <= SPI_FLASH_16MB_BOUN) 109 goto bank_end; 110 111 switch (idcode0) { 112 case SPI_FLASH_CFI_MFR_SPANSION: 113 flash->bank_read_cmd = CMD_BANKADDR_BRRD; 114 flash->bank_write_cmd = CMD_BANKADDR_BRWR; 115 default: 116 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR; 117 flash->bank_write_cmd = CMD_EXTNADDR_WREAR; 118 } 119 120 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 121 &curr_bank, 1); 122 if (ret) { 123 debug("SF: fail to read bank addr register\n"); 124 return ret; 125 } 126 127 bank_end: 128 flash->bank_curr = curr_bank; 129 return 0; 130 } 131 #endif 132 133 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 134 struct spi_flash *flash) 135 { 136 const struct spi_flash_params *params; 137 u8 cmd; 138 u16 jedec = idcode[1] << 8 | idcode[2]; 139 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 140 141 /* Validate params from spi_flash_params table */ 142 params = spi_flash_params_table; 143 for (; params->name != NULL; params++) { 144 if ((params->jedec >> 16) == idcode[0]) { 145 if ((params->jedec & 0xFFFF) == jedec) { 146 if (params->ext_jedec == 0) 147 break; 148 else if (params->ext_jedec == ext_jedec) 149 break; 150 } 151 } 152 } 153 154 if (!params->name) { 155 printf("SF: Unsupported flash IDs: "); 156 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 157 idcode[0], jedec, ext_jedec); 158 return -EPROTONOSUPPORT; 159 } 160 161 /* Assign spi data */ 162 flash->spi = spi; 163 flash->name = params->name; 164 flash->memory_map = spi->memory_map; 165 flash->dual_flash = flash->spi->option; 166 167 /* Assign spi flash flags */ 168 if (params->flags & SST_WR) 169 flash->flags |= SNOR_F_SST_WR; 170 171 /* Assign spi_flash ops */ 172 #ifndef CONFIG_DM_SPI_FLASH 173 flash->write = spi_flash_cmd_write_ops; 174 #if defined(CONFIG_SPI_FLASH_SST) 175 if (flash->flags & SNOR_F_SST_WR) { 176 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 177 flash->write = sst_write_bp; 178 else 179 flash->write = sst_write_wp; 180 } 181 #endif 182 flash->erase = spi_flash_cmd_erase_ops; 183 flash->read = spi_flash_cmd_read_ops; 184 #endif 185 186 /* lock hooks are flash specific - assign them based on idcode0 */ 187 switch (idcode[0]) { 188 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) 189 case SPI_FLASH_CFI_MFR_STMICRO: 190 case SPI_FLASH_CFI_MFR_SST: 191 flash->flash_lock = stm_lock; 192 flash->flash_unlock = stm_unlock; 193 flash->flash_is_locked = stm_is_locked; 194 #endif 195 break; 196 default: 197 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]); 198 } 199 200 /* Compute the flash size */ 201 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 202 /* 203 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 204 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 205 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 206 * have 256b pages. 207 */ 208 if (ext_jedec == 0x4d00) { 209 if ((jedec == 0x0215) || (jedec == 0x216)) 210 flash->page_size = 256; 211 else 212 flash->page_size = 512; 213 } else { 214 flash->page_size = 256; 215 } 216 flash->page_size <<= flash->shift; 217 flash->sector_size = params->sector_size << flash->shift; 218 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 219 #ifdef CONFIG_SF_DUAL_FLASH 220 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 221 flash->size <<= 1; 222 #endif 223 224 /* Compute erase sector and command */ 225 if (params->flags & SECT_4K) { 226 flash->erase_cmd = CMD_ERASE_4K; 227 flash->erase_size = 4096 << flash->shift; 228 } else if (params->flags & SECT_32K) { 229 flash->erase_cmd = CMD_ERASE_32K; 230 flash->erase_size = 32768 << flash->shift; 231 } else { 232 flash->erase_cmd = CMD_ERASE_64K; 233 flash->erase_size = flash->sector_size; 234 } 235 236 /* Now erase size becomes valid sector size */ 237 flash->sector_size = flash->erase_size; 238 239 /* Look for the fastest read cmd */ 240 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 241 if (cmd) { 242 cmd = spi_read_cmds_array[cmd - 1]; 243 flash->read_cmd = cmd; 244 } else { 245 /* Go for default supported read cmd */ 246 flash->read_cmd = CMD_READ_ARRAY_FAST; 247 } 248 249 /* Not require to look for fastest only two write cmds yet */ 250 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 251 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 252 else 253 /* Go for default supported write cmd */ 254 flash->write_cmd = CMD_PAGE_PROGRAM; 255 256 /* Read dummy_byte: dummy byte is determined based on the 257 * dummy cycles of a particular command. 258 * Fast commands - dummy_byte = dummy_cycles/8 259 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 260 * For I/O commands except cmd[0] everything goes on no.of lines 261 * based on particular command but incase of fast commands except 262 * data all go on single line irrespective of command. 263 */ 264 switch (flash->read_cmd) { 265 case CMD_READ_QUAD_IO_FAST: 266 flash->dummy_byte = 2; 267 break; 268 case CMD_READ_ARRAY_SLOW: 269 flash->dummy_byte = 0; 270 break; 271 default: 272 flash->dummy_byte = 1; 273 } 274 275 #ifdef CONFIG_SPI_FLASH_STMICRO 276 if (params->flags & E_FSR) 277 flash->flags |= SNOR_F_USE_FSR; 278 #endif 279 280 /* Configure the BAR - discover bank cmds and read current bank */ 281 #ifdef CONFIG_SPI_FLASH_BAR 282 int ret = spi_flash_read_bank(flash, idcode[0]); 283 if (ret < 0) 284 return ret; 285 #endif 286 287 /* Flash powers up read-only, so clear BP# bits */ 288 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 289 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 290 defined(CONFIG_SPI_FLASH_SST) 291 spi_flash_cmd_write_status(flash, 0); 292 #endif 293 294 return 0; 295 } 296 297 #if CONFIG_IS_ENABLED(OF_CONTROL) 298 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 299 { 300 fdt_addr_t addr; 301 fdt_size_t size; 302 int node; 303 304 /* If there is no node, do nothing */ 305 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 306 if (node < 0) 307 return 0; 308 309 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 310 if (addr == FDT_ADDR_T_NONE) { 311 debug("%s: Cannot decode address\n", __func__); 312 return 0; 313 } 314 315 if (flash->size != size) { 316 debug("%s: Memory map must cover entire device\n", __func__); 317 return -1; 318 } 319 flash->memory_map = map_sysmem(addr, size); 320 321 return 0; 322 } 323 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ 324 325 /** 326 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 327 * 328 * @spi: Bus to probe 329 * @flashp: Pointer to place to put flash info, which may be NULL if the 330 * space should be allocated 331 */ 332 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 333 { 334 u8 idcode[5]; 335 int ret; 336 337 /* Setup spi_slave */ 338 if (!spi) { 339 printf("SF: Failed to set up slave\n"); 340 return -ENODEV; 341 } 342 343 /* Claim spi bus */ 344 ret = spi_claim_bus(spi); 345 if (ret) { 346 debug("SF: Failed to claim SPI bus: %d\n", ret); 347 return ret; 348 } 349 350 /* Read the ID codes */ 351 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 352 if (ret) { 353 printf("SF: Failed to get idcodes\n"); 354 goto err_read_id; 355 } 356 357 #ifdef DEBUG 358 printf("SF: Got idcodes\n"); 359 print_buffer(0, idcode, 1, sizeof(idcode), 0); 360 #endif 361 362 if (spi_flash_validate_params(spi, idcode, flash)) { 363 ret = -EINVAL; 364 goto err_read_id; 365 } 366 367 /* Set the quad enable bit - only for quad commands */ 368 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 369 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 370 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 371 if (spi_flash_set_qeb(flash, idcode[0])) { 372 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 373 ret = -EINVAL; 374 goto err_read_id; 375 } 376 } 377 378 #if CONFIG_IS_ENABLED(OF_CONTROL) 379 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 380 debug("SF: FDT decode error\n"); 381 ret = -EINVAL; 382 goto err_read_id; 383 } 384 #endif 385 #ifndef CONFIG_SPL_BUILD 386 printf("SF: Detected %s with page size ", flash->name); 387 print_size(flash->page_size, ", erase size "); 388 print_size(flash->erase_size, ", total "); 389 print_size(flash->size, ""); 390 if (flash->memory_map) 391 printf(", mapped at %p", flash->memory_map); 392 puts("\n"); 393 #endif 394 #ifndef CONFIG_SPI_FLASH_BAR 395 if (((flash->dual_flash == SF_SINGLE_FLASH) && 396 (flash->size > SPI_FLASH_16MB_BOUN)) || 397 ((flash->dual_flash > SF_SINGLE_FLASH) && 398 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 399 puts("SF: Warning - Only lower 16MiB accessible,"); 400 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 401 } 402 #endif 403 #ifdef CONFIG_SPI_FLASH_MTD 404 ret = spi_flash_mtd_register(flash); 405 #endif 406 407 err_read_id: 408 spi_release_bus(spi); 409 return ret; 410 } 411 412 #ifndef CONFIG_DM_SPI_FLASH 413 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 414 { 415 struct spi_flash *flash; 416 417 /* Allocate space if needed (not used by sf-uclass */ 418 flash = calloc(1, sizeof(*flash)); 419 if (!flash) { 420 debug("SF: Failed to allocate spi_flash\n"); 421 return NULL; 422 } 423 424 if (spi_flash_probe_slave(bus, flash)) { 425 spi_free_slave(bus); 426 free(flash); 427 return NULL; 428 } 429 430 return flash; 431 } 432 433 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 434 unsigned int max_hz, unsigned int spi_mode) 435 { 436 struct spi_slave *bus; 437 438 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 439 if (!bus) 440 return NULL; 441 return spi_flash_probe_tail(bus); 442 } 443 444 #ifdef CONFIG_OF_SPI_FLASH 445 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 446 int spi_node) 447 { 448 struct spi_slave *bus; 449 450 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 451 if (!bus) 452 return NULL; 453 return spi_flash_probe_tail(bus); 454 } 455 #endif 456 457 void spi_flash_free(struct spi_flash *flash) 458 { 459 #ifdef CONFIG_SPI_FLASH_MTD 460 spi_flash_mtd_unregister(); 461 #endif 462 spi_free_slave(flash->spi); 463 free(flash); 464 } 465 466 #else /* defined CONFIG_DM_SPI_FLASH */ 467 468 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, 469 void *buf) 470 { 471 struct spi_flash *flash = dev_get_uclass_priv(dev); 472 473 return spi_flash_cmd_read_ops(flash, offset, len, buf); 474 } 475 476 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, 477 const void *buf) 478 { 479 struct spi_flash *flash = dev_get_uclass_priv(dev); 480 481 #if defined(CONFIG_SPI_FLASH_SST) 482 if (flash->flags & SNOR_F_SST_WR) { 483 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 484 return sst_write_bp(flash, offset, len, buf); 485 else 486 return sst_write_wp(flash, offset, len, buf); 487 } 488 #endif 489 490 return spi_flash_cmd_write_ops(flash, offset, len, buf); 491 } 492 493 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) 494 { 495 struct spi_flash *flash = dev_get_uclass_priv(dev); 496 497 return spi_flash_cmd_erase_ops(flash, offset, len); 498 } 499 500 int spi_flash_std_probe(struct udevice *dev) 501 { 502 struct spi_slave *slave = dev_get_parent_priv(dev); 503 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 504 struct spi_flash *flash; 505 506 flash = dev_get_uclass_priv(dev); 507 flash->dev = dev; 508 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); 509 return spi_flash_probe_slave(slave, flash); 510 } 511 512 static const struct dm_spi_flash_ops spi_flash_std_ops = { 513 .read = spi_flash_std_read, 514 .write = spi_flash_std_write, 515 .erase = spi_flash_std_erase, 516 }; 517 518 static const struct udevice_id spi_flash_std_ids[] = { 519 { .compatible = "spi-flash" }, 520 { } 521 }; 522 523 U_BOOT_DRIVER(spi_flash_std) = { 524 .name = "spi_flash_std", 525 .id = UCLASS_SPI_FLASH, 526 .of_match = spi_flash_std_ids, 527 .probe = spi_flash_std_probe, 528 .priv_auto_alloc_size = sizeof(struct spi_flash), 529 .ops = &spi_flash_std_ops, 530 }; 531 532 #endif /* CONFIG_DM_SPI_FLASH */ 533